JPS63527U - - Google Patents
Info
- Publication number
- JPS63527U JPS63527U JP9334986U JP9334986U JPS63527U JP S63527 U JPS63527 U JP S63527U JP 9334986 U JP9334986 U JP 9334986U JP 9334986 U JP9334986 U JP 9334986U JP S63527 U JPS63527 U JP S63527U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- output transistor
- latch
- load
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Electronic Switches (AREA)
Description
第１図は本考案に係る負荷駆動回路の実施例を
示す回路図、第２図ａ乃至ｄは第１図回路の各部
信号波形を示すタイミングチヤート、第３図は本
考案の他の実施例を示す回路図、第４図は従来の
負荷駆動回路を示す回路図である。
１……制御回路、Ｑ１……出力トランジスタ、
Ｑ２……小信号トランジスタ、Ｑ３……ラツチト
ランジスタ、Ｃ１……バイパスコンデンサ、Ｌ…
…負荷、Ｇ……排他的論理和ゲート。
FIG. 1 is a circuit diagram showing an embodiment of the load driving circuit according to the present invention, FIGS. 2 a to d are timing charts showing signal waveforms at various parts of the circuit in FIG. 1, and FIG. 3 is another embodiment of the present invention. FIG. 4 is a circuit diagram showing a conventional load drive circuit. 1...control circuit, Q1 ...output transistor,
Q2 ...Small signal transistor, Q3 ...Latch transistor, C1 ...Bypass capacitor, L...
...Load, G...Exclusive OR gate.
Claims (1)
スタと、 前記出力トランジスタと小信号トランジスタと
の間に直列接続されたラツチトランジスタ及びバ
イパスコンデンサとを備え、前記出力トランジス
タはラツチトランジスタのオンによつてオン状態
が維持されると共に、負荷の過負荷時にはラツチ
トランジスタがカツトオフとなり、出力トランジ
スタがオフ状態となるように構成されていること
を特徴とする負荷駆動回路。[Claims for Utility Model Registration] An output transistor that drives a load, a small signal transistor that drives the output transistor, and a latch transistor and a bypass capacitor that are connected in series between the output transistor and the small signal transistor. , wherein the output transistor is maintained in an on state by turning on a latch transistor, and when the load is overloaded, the latch transistor is cut off and the output transistor is turned off. drive circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9334986U JPS63527U (en) | 1986-06-20 | 1986-06-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9334986U JPS63527U (en) | 1986-06-20 | 1986-06-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63527U true JPS63527U (en) | 1988-01-05 |
Family
ID=30955860
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9334986U Pending JPS63527U (en) | 1986-06-20 | 1986-06-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63527U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03103629U (en) * | 1990-02-05 | 1991-10-28 |
-
1986
- 1986-06-20 JP JP9334986U patent/JPS63527U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03103629U (en) * | 1990-02-05 | 1991-10-28 |
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