JPS634199U - - Google Patents
Info
- Publication number
- JPS634199U JPS634199U JP1986097136U JP9713686U JPS634199U JP S634199 U JPS634199 U JP S634199U JP 1986097136 U JP1986097136 U JP 1986097136U JP 9713686 U JP9713686 U JP 9713686U JP S634199 U JPS634199 U JP S634199U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- motor
- pulse signal
- signal
- phase pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000004069 differentiation Effects 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Control Of Direct Current Motors (AREA)
Description
第１図は、本考案に係るＤＣモータ制御回路の
一実施例を示す回路図、第２図はパルス発生回路
の出力である二相パルス信号を示すタイミングチ
ヤート、第３図はパルス列１が固定しＯＮ信号と
して微分回路２１２に入力された時の入力と出力
を示したタイミングチヤート、第４図はパルス列
１が微分回路２１２に入力された時の入力と出力
とを示したタイミングチヤート、第５図は従来の
ＤＣモータ制御回路を示している。
１０…ＤＣモータ、２０…ＤＣモータ制御回路
、２１…出力回路、２１１…駆動回路、２１２，
２１３…微分回路、２２…パルス発生回路。
Fig. 1 is a circuit diagram showing one embodiment of the DC motor control circuit according to the present invention, Fig. 2 is a timing chart showing a two-phase pulse signal that is the output of the pulse generation circuit, and Fig. 3 is a fixed pulse train 1. FIG. 4 is a timing chart showing the input and output when pulse train 1 is input to the differentiating circuit 212 as an ON signal. FIG. The figure shows a conventional DC motor control circuit. 10...DC motor, 20...DC motor control circuit, 21...output circuit, 211...drive circuit, 212,
213...differentiation circuit, 22...pulse generation circuit.
Claims (1)
流れる電流の大きさ及び向きを制御するＤＣモー
タ制御回路において、二相パルス信号を出力する
パルス発生回路と、出力回路とを具備しているが
、前記出力回路には、４つのＦＥＴを組合わせる
ことによりＤＣモータに流れる電流を制御する駆
動回路と、前記二相パルス信号が固定しＯＮ信号
として入力された時にはＯＦＦ信号を出力する微
分回路とを具備し、前記ＤＣモータから接地側に
流れる電流を制御する各ＦＥＴのゲートに前記二
相パルス信号を前記微分回路を介して各々送出し
たことを特徴とするＤＣモータ制御回路。 A DC motor control circuit that controls the magnitude and direction of a current flowing through a DC motor by controlling the pulse width of a two-phase pulse signal includes a pulse generation circuit that outputs a two-phase pulse signal and an output circuit, The output circuit includes a drive circuit that controls the current flowing to the DC motor by combining four FETs, and a differentiation circuit that outputs an OFF signal when the two-phase pulse signal is fixed and input as an ON signal. A DC motor control circuit, characterized in that the two-phase pulse signal is sent to the gate of each FET for controlling the current flowing from the DC motor to the ground side via the differentiating circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986097136U JPS634199U (en) | 1986-06-24 | 1986-06-24 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986097136U JPS634199U (en) | 1986-06-24 | 1986-06-24 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS634199U true JPS634199U (en) | 1988-01-12 |
Family
ID=30963759
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1986097136U Pending JPS634199U (en) | 1986-06-24 | 1986-06-24 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS634199U (en) |
-
1986
- 1986-06-24 JP JP1986097136U patent/JPS634199U/ja active Pending
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