JPH0366591U - - Google Patents

Info

Publication number
JPH0366591U
JPH0366591U JP12601089U JP12601089U JPH0366591U JP H0366591 U JPH0366591 U JP H0366591U JP 12601089 U JP12601089 U JP 12601089U JP 12601089 U JP12601089 U JP 12601089U JP H0366591 U JPH0366591 U JP H0366591U
Authority
JP
Japan
Prior art keywords
field effect
power supplies
transistors
drive circuit
positive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12601089U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12601089U priority Critical patent/JPH0366591U/ja
Publication of JPH0366591U publication Critical patent/JPH0366591U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例を示す回路図、第2
図はインバータ装置の一例を示す回路図、第3図
は従来のゲートドライブ回路の一例を示す回路図
である。 1……インバータ、2a〜2f……MOS型電
界効果トランジスタ、4……ゲート駆動回路、1
1,14,15,18,21,30……抵抗、1
6,17,19,20……トランジスタ。
Figure 1 is a circuit diagram showing one embodiment of the present invention;
The figure is a circuit diagram showing an example of an inverter device, and FIG. 3 is a circuit diagram showing an example of a conventional gate drive circuit. 1... Inverter, 2a to 2f... MOS field effect transistor, 4... Gate drive circuit, 1
1, 14, 15, 18, 21, 30...Resistance, 1
6, 17, 19, 20...transistor.

Claims (1)

【実用新案登録請求の範囲】 MOS型電界効果トランジスタをブリツジ接続
して成る電力変換装置のゲートドライブ回路にお
いて、 前記各電界効果トランジスタに設けられるドラ
イブ用正、負電源と、 前記ドライブ用正、負電源間に直列接続され、
制御信号により駆動制御される出力用第1、第2
トランジスタと、 前記第1、第2トランジスタの共通接続点と前記
電界効果トランジスタのゲートを結ぶ電路に介挿
された第1抵抗と、 前記出力用第1、第2トランジスタのベースに
各々接続された第2、第3抵抗とを備えたことを
特徴とするゲートドライブ回路。
[Claims for Utility Model Registration] A gate drive circuit for a power conversion device comprising bridge-connected MOS field effect transistors, comprising: positive and negative power supplies for driving provided in each of the field effect transistors; and positive and negative power supplies for driving. connected in series between power supplies,
The first and second outputs are driven and controlled by control signals.
a first resistor inserted in an electric path connecting a common connection point of the first and second transistors and the gate of the field effect transistor; and a first resistor connected to the bases of the first and second output transistors, respectively. A gate drive circuit comprising second and third resistors.
JP12601089U 1989-10-27 1989-10-27 Pending JPH0366591U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12601089U JPH0366591U (en) 1989-10-27 1989-10-27

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12601089U JPH0366591U (en) 1989-10-27 1989-10-27

Publications (1)

Publication Number Publication Date
JPH0366591U true JPH0366591U (en) 1991-06-27

Family

ID=31673850

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12601089U Pending JPH0366591U (en) 1989-10-27 1989-10-27

Country Status (1)

Country Link
JP (1) JPH0366591U (en)

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