JPS6253596U - - Google Patents

Info

Publication number
JPS6253596U
JPS6253596U JP14490985U JP14490985U JPS6253596U JP S6253596 U JPS6253596 U JP S6253596U JP 14490985 U JP14490985 U JP 14490985U JP 14490985 U JP14490985 U JP 14490985U JP S6253596 U JPS6253596 U JP S6253596U
Authority
JP
Japan
Prior art keywords
relay
rated operating
voltage
circuit
operating voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14490985U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14490985U priority Critical patent/JPS6253596U/ja
Publication of JPS6253596U publication Critical patent/JPS6253596U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Relay Circuits (AREA)
  • Control Of High-Frequency Heating Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案のリレー駆動回路の要部電気回
路図で、第2図は本考案のリレー駆動回路のタイ
ムチヤート、第3図は従来のリレー駆動回路の要
部電気回路図で、第4図はそのタイムチヤートで
ある。 符号、9:リレー駆動用トランジスタ、10:
第1のリレー、11:第2のリレー、D:第1
の信号出力、D:第2の信号出力、R,R
:抵抗。
Fig. 1 is an electrical circuit diagram of the main part of the relay drive circuit of the present invention, Fig. 2 is a time chart of the relay drive circuit of the invention, and Fig. 3 is an electrical circuit diagram of the main part of the conventional relay drive circuit. Figure 4 is the time chart. Code, 9: Relay driving transistor, 10:
1st relay, 11: 2nd relay, D 1 : 1st
signal output, D 2 : second signal output, R 1 , R 2
:resistance.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 定格操作電圧の異なる、高定格操作電圧の第1
のリレーと低定格操作電圧の第2のリレーとを同
一のリレー駆動用トランジスタの出力回路に並列
に挿入し、リレー制御回路の第1の信号出力にて
上記第1及び第2のリレー端子間に上記第1のリ
レーの定格操作電圧を与えると共に、リレー制御
回路の第2の信号出力にて上記第1及び第2のリ
レー端子間に上記第1のリレーの開放電圧と第2
のリレーの開放電圧との中間電圧を与えるバイア
ス回路を上記リレー駆動用トランジスタの入力回
路としたことを特徴とするリレー駆動回路。
The first high rated operating voltage with different rated operating voltages.
A relay with a low rated operating voltage and a second relay with a low rated operating voltage are inserted in parallel into the output circuit of the same relay driving transistor, and the first signal output of the relay control circuit is used to connect the first and second relay terminals. The rated operating voltage of the first relay is applied to the rated operating voltage of the first relay, and the open voltage of the first relay and the second
A relay drive circuit characterized in that an input circuit of the relay drive transistor is a bias circuit that provides an intermediate voltage between the open circuit voltage of the relay.
JP14490985U 1985-09-20 1985-09-20 Pending JPS6253596U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14490985U JPS6253596U (en) 1985-09-20 1985-09-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14490985U JPS6253596U (en) 1985-09-20 1985-09-20

Publications (1)

Publication Number Publication Date
JPS6253596U true JPS6253596U (en) 1987-04-02

Family

ID=31055953

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14490985U Pending JPS6253596U (en) 1985-09-20 1985-09-20

Country Status (1)

Country Link
JP (1) JPS6253596U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009177812A (en) * 2008-01-25 2009-08-06 Schneider Electric Automation Gmbh Relay circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009177812A (en) * 2008-01-25 2009-08-06 Schneider Electric Automation Gmbh Relay circuit

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