JPS6351482U - - Google Patents

Info

Publication number
JPS6351482U
JPS6351482U JP14621786U JP14621786U JPS6351482U JP S6351482 U JPS6351482 U JP S6351482U JP 14621786 U JP14621786 U JP 14621786U JP 14621786 U JP14621786 U JP 14621786U JP S6351482 U JPS6351482 U JP S6351482U
Authority
JP
Japan
Prior art keywords
contact
layer made
substrate body
conductive pattern
terminal portion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14621786U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14621786U priority Critical patent/JPS6351482U/ja
Publication of JPS6351482U publication Critical patent/JPS6351482U/ja
Pending legal-status Critical Current

Links

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  • Contacts (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図乃至第3図は本考案の一実施例を示すも
ので、第1図は平面図、第2図は縦断側面図、第
3図は要部の拡大断面図である。また、第4図は
本考案の第2の実施例を示す縦断側面図、第5図
及び第6図は従来例を示す夫々第1図及び第2図
相当図である。 図中、5は基板本体、6は導電パターン層、7
はターミナル部、8はICベアチツプ、9はボン
デイングワイヤ、10,13は接点部、11は中
間層、12は接点層を示す。
1 to 3 show an embodiment of the present invention, in which FIG. 1 is a plan view, FIG. 2 is a vertical side view, and FIG. 3 is an enlarged sectional view of the main part. Further, FIG. 4 is a longitudinal sectional side view showing a second embodiment of the present invention, and FIGS. 5 and 6 are views corresponding to FIGS. 1 and 2, respectively, showing a conventional example. In the figure, 5 is the substrate body, 6 is a conductive pattern layer, and 7 is a conductive pattern layer.
1 is a terminal portion, 8 is an IC bare chip, 9 is a bonding wire, 10 and 13 are contact portions, 11 is an intermediate layer, and 12 is a contact layer.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 基板本体上に、ICベアチツプがボンデイング
ワイヤを介して接続されるターミナル部及びスイ
ツチ機構の一部を構成する接点部を形成したもの
であつて、前記ターミナル部及び接点部を、前記
基板本体上に形成された銅等の導電材料より成る
導電パターン層と、この導電パターン層上に形成
されたニツケル等の硬度が高い導電材料より成る
中間層と、この中間層上に形成された金等の接触
抵抗が小さい接点材料より成る接点層とから構成
したことを特徴とするプリント配線基板。
A terminal portion to which an IC bare chip is connected via a bonding wire and a contact portion constituting a part of a switch mechanism are formed on the substrate body, and the terminal portion and the contact portion are formed on the substrate body. Contact between a formed conductive pattern layer made of a conductive material such as copper, an intermediate layer formed on this conductive pattern layer made of a hard conductive material such as nickel, and gold etc. formed on this intermediate layer. 1. A printed wiring board comprising a contact layer made of a contact material with low resistance.
JP14621786U 1986-09-24 1986-09-24 Pending JPS6351482U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14621786U JPS6351482U (en) 1986-09-24 1986-09-24

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14621786U JPS6351482U (en) 1986-09-24 1986-09-24

Publications (1)

Publication Number Publication Date
JPS6351482U true JPS6351482U (en) 1988-04-07

Family

ID=31058483

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14621786U Pending JPS6351482U (en) 1986-09-24 1986-09-24

Country Status (1)

Country Link
JP (1) JPS6351482U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58130594A (en) * 1982-01-29 1983-08-04 株式会社東芝 Printed circuit board

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58130594A (en) * 1982-01-29 1983-08-04 株式会社東芝 Printed circuit board

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