JPS6349841A - Automatic program converter - Google Patents

Automatic program converter

Info

Publication number
JPS6349841A
JPS6349841A JP19320386A JP19320386A JPS6349841A JP S6349841 A JPS6349841 A JP S6349841A JP 19320386 A JP19320386 A JP 19320386A JP 19320386 A JP19320386 A JP 19320386A JP S6349841 A JPS6349841 A JP S6349841A
Authority
JP
Japan
Prior art keywords
loop
arithmetic
regression
program
detector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19320386A
Other languages
Japanese (ja)
Inventor
Kimiharu Okabe
岡部 公治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP19320386A priority Critical patent/JPS6349841A/en
Publication of JPS6349841A publication Critical patent/JPS6349841A/en
Pending legal-status Critical Current

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  • Devices For Executing Special Programs (AREA)

Abstract

PURPOSE:To execute a program at high speed by analyzing the regression arithmetic by a deleting method detector after detecting it by a detector and then deleting the regression arithmetic by a DO loop dividing device or an arithmetic order exchanging device. CONSTITUTION:A DO loop detecting device 2 writes the parts of a program excluding a DO loop to an output buffer as they are and the part of the DO loop to a work register 3 respectively. A regression arithmetic detector 4 detects the presence or absence of the regression arithmetic contained in the DO loop to write this loop to the buffer 8 as it is as long as it contains no regression arithmetic. While the DO loop is sent to a regression arithmetic deleting method detector 5 if the DO loop contains the regression arithmetic. The device 5 analyzes the deleting method and writes the regression arithmetic to the buffer 8 as it is when the deletion of the regression arithmetic is impossible. The regression arithmetic is sent to a DO loop dividing device 6 in the division mode of the DO loop and to an arithmetic order changing device 7 in an arithmetic order exchange mode. Both devices 6 and 7 performs the division of a single DO loop and the exchange of the arithmetic order in the DO loop and write the results of said division and exchange to an output buffer 8.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は並列に動作できる複数の演算処理装置を備え、
高速に処理を行う計算機システムで使用して効果をあげ
るために、プログラムを並列処理が可能なように変換す
るプログラム自動変換装置に関するものである。
[Detailed Description of the Invention] Industrial Application Field The present invention includes a plurality of arithmetic processing units that can operate in parallel,
The present invention relates to an automatic program conversion device that converts programs to enable parallel processing in order to be used effectively in computer systems that perform high-speed processing.

従来の技術 従来のプログラム変換装置では、たとえば下記のDOル
ープは回帰演算となるが、このDOループが、回帰演算
であることを発見し、並列処理することをやめる。
2. Description of the Related Art In a conventional program conversion device, for example, the DO loop shown below is a regression operation, but it is discovered that this DO loop is a regression operation, and parallel processing is stopped.

DO10!−1.N A (N =A (1)本l B (r)=A (1)+A (1+1)10  C0
NTINUE 発明が解決しようとする問題点 しかし、このような従来のプログラム変換装置では、コ
ーディングの改良によって回帰性が除去されるようなり
○ループでも、そのまま逐次処理されるためプログラム
の高速な実行を妨げ、この解決には、人手による入念な
プログラムの見直しが必要という問題がある。
DO10! -1. N A (N = A (1) books l B (r) = A (1) + A (1 + 1) 10 C0
NTINUE Problems to be Solved by the Invention However, with such conventional program conversion devices, improvements in coding have removed recursion, and loops are still processed sequentially, which hinders high-speed program execution. , To solve this problem, there is a problem that requires careful manual review of the program.

本発明は上記問題点に鑑み、DOループ中の回帰演算を
検出し、除去するプログラム自動変換装置である。
In view of the above problems, the present invention is an automatic program conversion device that detects and eliminates regression operations in DO loops.

問題点を解決するための手段 上記問題点を解決するために本発明のプログラム自動変
換装置は、入出カプログラムを保持するためのバッファ
、DO文の検出装置、回帰演算の検出装置、回帰演算の
除去方法検出装置、DO小ループ割装置、および6A算
順序交換装置という構成を持つものである。
Means for Solving the Problems In order to solve the above problems, the automatic program conversion device of the present invention includes a buffer for holding an input/output program, a DO statement detection device, a regression operation detection device, and a regression operation detection device. This system includes a removal method detection device, a DO small loop division device, and a 6A arithmetic order exchange device.

作用 本発明は上記した機構によって、入力バッファのプログ
ラムから、DO文の検出=2によって検出された一連の
DOループは、ワークレジスタに格納される。回帰演算
の検出装置によって検出された回帰演算は、回帰演算の
除去方法検出装置によって解析され、DOループ分割装
置、または演算順序交換装置によりプログラムが変更さ
れて出力バッファに出力されることを特徴とするプログ
ラム自動変換装置である。
Operation According to the present invention, a series of DO loops detected from the input buffer program by DO statement detection=2 are stored in the work register by the above-described mechanism. The regression operation detected by the regression operation detection device is analyzed by the regression operation removal method detection device, the program is changed by the DO loop division device or the operation order exchange device, and the program is output to the output buffer. This is an automatic program conversion device.

実施例 以下本発明の一実施例のプログラム自動変換装置につい
て、図面を参照しながら説明する。図は本発明の一実施
例の全体構成を示すブロック図で、入カブソファ1、D
Oループ検出装置2、ワークレジスタ3、回帰演算検出
装置4、回帰演算除去方法検出装置5、DOループ分割
装置6、演算順序交換装置7、及び出力装置8などから
構成される。
Embodiment Hereinafter, an automatic program conversion device according to an embodiment of the present invention will be described with reference to the drawings. The figure is a block diagram showing the overall configuration of an embodiment of the present invention.
It is comprised of an O-loop detection device 2, a work register 3, a regression operation detection device 4, a regression operation removal method detection device 5, a DO loop division device 6, an operation order exchange device 7, an output device 8, and the like.

図において、被変換プログラムは、まず入力バッファ1
に読み込まれる。DOループ検出装N2は、プログラム
のDOループ以外の部分はそのまま出カバソファ8に書
き出し、DOループの部分はワークレジスタ3に書き出
す。回帰演算検出装置4は、DOループ中の回帰演算の
有無を検出し、なければそのまま出力バッファ8に書き
出し、あれば回帰演算除去方法検出装置5に送る。回帰
演算除去方法検出装置5は、除去方法を解析し、除去で
きない場合はそのまま出力バッファ8に書き出し、DO
ループの分割による場合はDOループ分割装置6に、演
算順序交換による場合は演算順序交換装置7に送る。D
O小ループ割装置6、演算順序交換装置7はそれぞれ1
つのDOループの分割、DOループ内の演算順序の交換
をおこなった後、出力バッファ8に書き出す。
In the figure, the program to be converted first starts with input buffer 1.
is loaded into. The DO loop detection device N2 writes out the portion of the program other than the DO loop as it is to the output sofa 8, and writes out the DO loop portion to the work register 3. The regression operation detection device 4 detects the presence or absence of a regression operation in the DO loop, writes it out as is to the output buffer 8 if it is not present, and sends it to the regression operation removal method detection device 5 if it exists. The regression calculation removal method detection device 5 analyzes the removal method, and if it cannot be removed, writes it out as it is to the output buffer 8 and outputs the DO
If the loop is divided, it is sent to the DO loop dividing device 6, and if it is based on operation order exchange, it is sent to the operation order exchange device 7. D
O small loop dividing device 6 and operation order exchange device 7 are each 1
After dividing the two DO loops and exchanging the order of operations within the DO loops, the data is written to the output buffer 8.

先程のDOループの場合、回帰演算除去装置5によりD
O小ループ割装置6に送られ、そこで下記のように変更
される。
In the case of the previous DO loop, D
It is sent to the O small loop divider 6, where it is modified as follows.

DO  10 1=1.N C(1) =A N> Δ(1) =A (1) +1 10  C0NTINUE DO 20 1=l、N B N)冨A(1)+C(1) 20  C0NTTNUE 発明の効果 以上述べてきたように、本発明によればDOループ中に
回帰演算を持つプログラムを複数の演算処理装置を持つ
計算機システムで実行する場合、従来のように逐次的に
処理を行ったり、人手によりプログラムを修正するので
はなく、DOループ中の回帰演算を自動的に除去し、プ
ログラムが高速に実行できるという効果が得られる。
DO 10 1=1. N C(1) =A N> Δ(1) =A (1) +1 10 C0NTINUE DO 20 1=l, N B N) Tow A(1)+C(1) 20 C0NTTNUE Effects of the invention As stated above According to the present invention, when a program having a regression operation in a DO loop is executed on a computer system having a plurality of arithmetic processing units, there is no need to perform sequential processing or manually modify the program as in the past. Instead, the regression operation in the DO loop is automatically removed and the program can be executed at high speed.

【図面の簡単な説明】[Brief explanation of the drawing]

図は本発明の一実施例のプログラム自動変換装置のシス
テム構成を示すブロック図である。 ■・・・・・・入カバソファ、2・・・・・・D○ルー
プ検出装置、3・・・・・・ワークレジスタ、4・・・
・・・回帰演算検出装置、5・・・・・・回帰演算除去
方法検出装置、6・・・・・・DO小ループ割装置ファ
イル、7・・・・・・演算順序交換装置、8・・・・・
・出カバソファ。
The figure is a block diagram showing the system configuration of an automatic program conversion device according to an embodiment of the present invention. ■...Input cover sofa, 2...D○ loop detection device, 3...Work register, 4...
... Regression calculation detection device, 5 ... Regression calculation removal method detection device, 6 ... DO small loop division device file, 7 ... ... Operation order exchange device, 8.・・・・・・
・Outside sofa.

Claims (1)

【特許請求の範囲】[Claims] 入力プログラム中のDOループの有無を検出する手段と
、前記DOループ中における回帰演算の有無を検出する
手段と、回帰演算を生じている計算式の交換、またはD
Oループの分割によって回帰演算をなくす手段を持ち、
前記プログラム中の前記DOループを回帰演算を含まな
いものに変換することを特徴とするプログラム自動変換
装置。
A means for detecting the presence or absence of a DO loop in an input program, a means for detecting the presence or absence of a regression operation in the DO loop, and an exchange of a calculation formula causing the regression operation, or D
It has a means of eliminating regression operations by dividing the O-loop,
An automatic program conversion device characterized in that the DO loop in the program is converted into one that does not include a regression operation.
JP19320386A 1986-08-19 1986-08-19 Automatic program converter Pending JPS6349841A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19320386A JPS6349841A (en) 1986-08-19 1986-08-19 Automatic program converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19320386A JPS6349841A (en) 1986-08-19 1986-08-19 Automatic program converter

Publications (1)

Publication Number Publication Date
JPS6349841A true JPS6349841A (en) 1988-03-02

Family

ID=16304015

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19320386A Pending JPS6349841A (en) 1986-08-19 1986-08-19 Automatic program converter

Country Status (1)

Country Link
JP (1) JPS6349841A (en)

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