JPS6349658U - - Google Patents
Info
- Publication number
- JPS6349658U JPS6349658U JP14250986U JP14250986U JPS6349658U JP S6349658 U JPS6349658 U JP S6349658U JP 14250986 U JP14250986 U JP 14250986U JP 14250986 U JP14250986 U JP 14250986U JP S6349658 U JPS6349658 U JP S6349658U
- Authority
- JP
- Japan
- Prior art keywords
- level
- input
- resistance element
- variable
- variable resistance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 5
- 230000003321 amplification Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
Landscapes
- Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)
Description
第１図は本考案の一実施例を示す回路図、第２
図および第３図は第１図の特性図、第４図は従来
の回路図、第５図は第４図の特性図である。
Ｒ１〜Ｒ１２……抵抗、ＡＭＰ……増幅回路、
Ｄ１．Ｄ２……ダイオード、Ｃ……コンデンサ、
Ｑ１〜Ｑ３……トランジスタ、Ｓ……スイツチ。
Figure 1 is a circuit diagram showing one embodiment of the present invention, Figure 2 is a circuit diagram showing an embodiment of the present invention.
3 and 3 are characteristic diagrams of FIG. 1, FIG. 4 is a conventional circuit diagram, and FIG. 5 is a characteristic diagram of FIG. 4. R1 to R12 ...Resistance, AMP...Amplification circuit,
D1 . D2 ...Diode, C...Capacitor,
Q1 to Q3 ...Transistor, S...Switch.
Claims (1)
端子に入力される信号の最大許容入力レベルを設
定するレベル設定手段と、この手段により最大許
容入力レベルの設定された入力信号を増幅する増
幅回路と、この増幅回路の出力信号の一部を整流
する整流手段と、この整流手段の整流電圧により
出力抵抗を決定する第１の可変抵抗素子と、この
第１の可変抵抗素子により出力抵抗を決定し、前
記レベル手段のレベルを可変する第２の可変抵抗
素子とを具備し、テープの種別の違いで前記第１
の可変抵抗素子の抵抗値の可変範囲を可変する可
変手段により前記レベル設定手段の最大許容入力
レベルを可変可能とした自動録音レベル調整回路
。 An input terminal into which a recorded signal is input, a level setting means for setting the maximum permissible input level of the signal input to this input terminal, and an amplifier circuit for amplifying the input signal having the maximum permissible input level set by this means. a rectifier that rectifies a part of the output signal of the amplifier circuit; a first variable resistance element that determines the output resistance based on the rectified voltage of the rectifier; and a first variable resistance element that determines the output resistance. and a second variable resistance element for varying the level of the level means, and the first variable resistance element varies depending on the type of tape.
An automatic recording level adjustment circuit in which the maximum permissible input level of the level setting means can be varied by a variable means for varying the variable range of the resistance value of the variable resistance element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14250986U JPS6349658U (en) | 1986-09-19 | 1986-09-19 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14250986U JPS6349658U (en) | 1986-09-19 | 1986-09-19 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6349658U true JPS6349658U (en) | 1988-04-04 |
Family
ID=31051307
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14250986U Pending JPS6349658U (en) | 1986-09-19 | 1986-09-19 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6349658U (en) |
-
1986
- 1986-09-19 JP JP14250986U patent/JPS6349658U/ja active Pending
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