JPS6347272B2 - - Google Patents

Info

Publication number
JPS6347272B2
JPS6347272B2 JP57066822A JP6682282A JPS6347272B2 JP S6347272 B2 JPS6347272 B2 JP S6347272B2 JP 57066822 A JP57066822 A JP 57066822A JP 6682282 A JP6682282 A JP 6682282A JP S6347272 B2 JPS6347272 B2 JP S6347272B2
Authority
JP
Japan
Prior art keywords
coining
lead
leads
inner lead
lead frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57066822A
Other languages
Japanese (ja)
Other versions
JPS58182858A (en
Inventor
Shoichi Ogura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP6682282A priority Critical patent/JPS58182858A/en
Publication of JPS58182858A publication Critical patent/JPS58182858A/en
Publication of JPS6347272B2 publication Critical patent/JPS6347272B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【発明の詳細な説明】 本発明はリードフレームに係り、特に半導体集
積回路装置(以下ICと呼ぶ)用リードフレーム
に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a lead frame, and particularly to a lead frame for a semiconductor integrated circuit device (hereinafter referred to as an IC).

ICを作るには、例えば樹脂封止型ICの場合金
属薄板にエツチング又はプレス加工にてタブ(素
子固着部)及び複数のリードを形成したリードフ
レームを使用し、タブにIC素子を固着した後イ
ンナーリード先端とIC素子の電極とを金属細線
で接続し、該IC素子及びインナーリード部を樹
脂封止することにより組立てられる。
To make an IC, for example, in the case of a resin-sealed IC, a lead frame is used that has a tab (element fixing part) and multiple leads formed on a thin metal plate by etching or press processing, and after fixing the IC element to the tab. It is assembled by connecting the tip of the inner lead and the electrode of the IC element with a thin metal wire, and sealing the IC element and the inner lead portion with resin.

金属細線による接続は通常自動ボンダーにて行
なわれるが、ここでリードフレームとして重要な
要件は、各インナーリード先端のボンデイングさ
れるべき部分が定められた位置にあることであ
る。これは、もしインナーリードの変形により、
先端位置が定められた位置からずれると、自動ボ
ンダーでの金属細線とインナーリードとの接続が
できず、ICとして致命的な欠陥を生ずることに
なるからである。
Connections using thin metal wires are usually made using an automatic bonder, but an important requirement for the lead frame here is that the portion of each inner lead tip to be bonded be in a predetermined position. This is because if the inner lead is deformed,
This is because if the tip position deviates from the predetermined position, the automatic bonder will not be able to connect the thin metal wire to the inner lead, resulting in a fatal defect in the IC.

一般に従来のリードフレームは、第1図の平面
図に示すように、各インナーリード2が樹脂止用
ダムバー3からタブ1に向けて細長く導出された
形状である為、強度が弱く極めて変形が生じ易
い。この変形は、リードフレーム素材の内部応力
が打抜き加工により変形として現われたり、また
はその後のメツキ工程や組立工程における取扱い
作業により生じるものである。
In general, in conventional lead frames, each inner lead 2 has a shape in which each inner lead 2 is elongated from the resin-fixing dam bar 3 toward the tab 1, as shown in the plan view of FIG. easy. This deformation is caused by internal stress in the lead frame material appearing as deformation due to punching, or by handling operations during the subsequent plating or assembly process.

近年、ICの機能拡大に伴い、リード本数の増
加や高密度化、小型化が要求されており、各イン
ナーリードはより長くまた細くなつている為、形
しやすい傾向はさらに大きくなつている。しかる
に、プレス打抜き又はエツチング加工によるリー
ドフレームの製造法では、インナーリード間の最
小間隔はリードフレームの板厚程度が限界であつ
た。
In recent years, with the expansion of IC functionality, there has been a demand for an increase in the number of leads, higher density, and miniaturization, and each inner lead is becoming longer and thinner, making it easier to shape. However, in the lead frame manufacturing method using press punching or etching, the minimum distance between inner leads is limited to the thickness of the lead frame.

そこで従来のリードフレームでは、該欠点を少
しでも補う為、第2図の斜視図に示すように、プ
レス打抜き又はエツチング加工によりリードを形
成した後、さらに同一又は別の金型でインナーリ
ード先端に押し潰し加工(コイニング)を施し、
金属細線でボンデイングできる面積をできるだけ
広くとつていた。すなわち、インナーリード間の
間隙はプレス打抜き又はエツチング加工による限
界まで狭くし、さらにコイニングを施してインナ
ーリード先端幅を広くしていた。この場合、コイ
ニングの深さは全てのインナーリードにおいて均
一であり、そのためコイニングによるリード幅の
広がりは、インナーリードのコイニングされる面
積に比例することとなる。しかし、自動ボンダー
で金属細線接続を行なう為IC素子の各電極の配
置等によつては、全てのリード形状及びリード幅
を同一に設計できない場合も多い。この場合、幅
の狭いインナーリードのボンデイング面積を十分
にとるようにコイニングすると、逆に幅の広いイ
ンナーリードのボンデイング面積が広がり過ぎ、
リード間の間隙が狭くなつてリードのわずかの変
形でリード同志がシヨートしたり、リードと隣接
の金属細線とのシヨート、又はリード間の電気的
特性が悪くなる等の種々の欠陥を生ずる。
Therefore, in order to compensate for this defect even slightly, in conventional lead frames, after forming the leads by press punching or etching, as shown in the perspective view of Figure 2, the tips of the inner leads are formed using the same or another mold. Crushed processing (coining) is applied,
The area that could be bonded with thin metal wire was made as large as possible. That is, the gap between the inner leads is narrowed to the limit by press punching or etching, and coining is further performed to widen the tip width of the inner leads. In this case, the depth of coining is uniform for all the inner leads, and therefore the expansion of the lead width due to coining is proportional to the coined area of the inner leads. However, since thin metal wires are connected using an automatic bonder, it is often not possible to design all the lead shapes and lead widths to be the same, depending on the arrangement of each electrode of the IC element. In this case, if coining is done to ensure a sufficient bonding area for the narrow inner lead, the bonding area for the wide inner lead will become too wide.
As the gap between the leads becomes narrower, a slight deformation of the leads causes various defects such as shorting of the leads, shorting of the leads and adjacent thin metal wires, and deterioration of the electrical characteristics between the leads.

そこで、本発明の目的は自動ボンダーでより確
実に金属細線接続ができるようにし、かつ前記欠
陥をなくしたリードフレームを提供することにあ
る。
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a lead frame that allows fine metal wire connections to be made more reliably using an automatic bonder and eliminates the aforementioned defects.

以下に本発明による実施例を説明する。第3図
は本発明の実施例の平面図を示すもので、鎖線は
コイニング加工前のインナーリード形状、実線は
コイニング加工後のインナーリード形状を示す。
すなわち本発明のリードフレームは、IC素子を
固着するタブ1と、その周辺に配置されそれぞれ
先端部のコイニング深さの異なるインナーリード
2a,2bとからなる。ここで2aはコイニング
深さの深いインナーリード、2bはコイニング深
さの浅いインナーリードで、2aの方がコイニン
グ深さが深いのでコイニングによつて押し潰され
た量が多くなつている。例えばリードフレームを
順送り形式のプレス型によつて製造する場合、通
常インナーリード先端のコイニングはインナーリ
ードを形成した後行なわれるが、第3図に示すよ
うに、まずインナーリード2aの先端のみをリー
ドの変形やリード間の電気的特性を考慮してリー
ド間隔αが最小となるようにコイニング量を決
め、Aというコイニング押型で加工し、続いてイ
ンナーリード2bの先端についても同様にリード
間隔βが最小となるようにしてBというコイニン
グ押型で加工すると、AとBという高さの違つた
コイニング押型によつてそれぞれ独立に任意のコ
イニング深さをとることができる。又、第4図の
斜視図に示すように、インナーリード先端に当た
る押型面を、2aをコイニングする部分4aと2
bをコイニングする部分4bとの2面に分けて階
段状にしておけば、一回のプレス工程で任意のイ
ンナーリード先端について、任意のコイニング深
さを得ることができる。
Examples according to the present invention will be described below. FIG. 3 shows a plan view of an embodiment of the present invention, in which the chain line shows the shape of the inner lead before the coining process, and the solid line shows the shape of the inner lead after the coining process.
That is, the lead frame of the present invention consists of a tab 1 for fixing an IC element, and inner leads 2a and 2b arranged around the tab 1 and having different coining depths at their tips. Here, 2a is an inner lead with a deep coining depth, and 2b is an inner lead with a shallow coining depth.Since 2a has a deeper coining depth, the amount crushed by coining is larger. For example, when manufacturing a lead frame using a progressive press die, the coining of the tips of the inner leads is usually carried out after forming the inner leads, but as shown in FIG. 3, first only the tips of the inner leads 2a are coined. The amount of coining is determined so that the lead spacing α is minimized by taking into consideration the deformation of the lead and the electrical characteristics between the leads, and processing is performed using a coining die A. Then, the tip of the inner lead 2b is similarly set so that the lead spacing β is If the coining die B is used to minimize the depth of coining, then the coining dies A and B, which have different heights, can be used to independently create an arbitrary coining depth. In addition, as shown in the perspective view of FIG.
If the portion 4b and the portion 4b to be coined are divided into two sides and made into a stepped shape, it is possible to obtain any coining depth for any tip of the inner lead in one press step.

本発明によれば、インナーリード先端の幅に合
つた最適なコイニング深さを選択することができ
るので、インナーリード先端同志が接触しない範
囲の最大面積が得られ、自動ボンダーでのワイヤ
ーボンデイングを極めて確実なものとする利点が
ある。
According to the present invention, it is possible to select the optimum coining depth that matches the width of the inner lead tips, so the maximum area within which the inner lead tips do not touch each other can be obtained, making wire bonding with an automatic bonder extremely easy. This has the advantage of making it more reliable.

尚、上述の実施例はリードフレームを順送り形
式のプレス型によつて製造する場合について述べ
たが、エツチングにより製造したリードフレーム
についても、コイニング工程を上述のごとく行な
えばよいことは言うまでもない。
Incidentally, although the above-mentioned embodiment has been described in the case where the lead frame is manufactured using a progressive press mold, it goes without saying that the coining process may be carried out as described above also for lead frames manufactured by etching.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のリードフレームを示す平面図、
第2図は従来のリードフレームのコイニング加工
が施されたインナーリード先端の斜視図、第3図
は本発明の実施例によるリードフレームの中央部
の平面図で、図中鎖線はコイニング加工前のイン
ナーリード形状、実線はコイニング加工後のイン
ナーリード形状を示す。第4図は本発明を実施す
るのに用いるコイニング押型の一例を示す斜視図
である。 1…タブ、2…インナーリード、2a…コイニ
ング深さの深いインナーリード、2b…コイニン
グ深さの浅いインナーリード、3…ダムバー、4
a…2aをコイニングする部分、4b…2bをコ
イニングする部分。
Figure 1 is a plan view showing a conventional lead frame.
Fig. 2 is a perspective view of the tip of the inner lead of a conventional lead frame that has been subjected to coining processing, and Fig. 3 is a plan view of the central part of the lead frame according to the embodiment of the present invention. Inner lead shape, the solid line shows the inner lead shape after coining processing. FIG. 4 is a perspective view showing an example of a coining die used to carry out the present invention. 1...Tab, 2...Inner lead, 2a...Inner lead with deep coining depth, 2b...Inner lead with shallow coining depth, 3...Dam bar, 4
a...Part for coining 2a, 4b...Part for coining 2b.

Claims (1)

【特許請求の範囲】[Claims] 1 複数のインナーリードのボンデイング部がコ
イニング加工されているリードフレームにおい
て、前記ボンデイング部のコイニングされる部分
の面積に応じてコイニング量が2種以上となつて
いることを特徴とするリードフレーム。
1. A lead frame in which bonding portions of a plurality of inner leads are coined, characterized in that the amount of coining is two or more types depending on the area of the coined portion of the bonding portion.
JP6682282A 1982-04-21 1982-04-21 Lead frame Granted JPS58182858A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6682282A JPS58182858A (en) 1982-04-21 1982-04-21 Lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6682282A JPS58182858A (en) 1982-04-21 1982-04-21 Lead frame

Publications (2)

Publication Number Publication Date
JPS58182858A JPS58182858A (en) 1983-10-25
JPS6347272B2 true JPS6347272B2 (en) 1988-09-21

Family

ID=13326920

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6682282A Granted JPS58182858A (en) 1982-04-21 1982-04-21 Lead frame

Country Status (1)

Country Link
JP (1) JPS58182858A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0648872Y2 (en) * 1986-02-21 1994-12-12 住友金属鉱山株式会社 Lead frame
JPH03187252A (en) * 1989-12-15 1991-08-15 Sanyo Electric Co Ltd Manufacture of lead frame

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS501658A (en) * 1973-05-07 1975-01-09
JPS5666061A (en) * 1979-11-05 1981-06-04 Hitachi Ltd Lead frame

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5840614Y2 (en) * 1981-01-16 1983-09-13 セイコーインスツルメンツ株式会社 semiconductor equipment

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS501658A (en) * 1973-05-07 1975-01-09
JPS5666061A (en) * 1979-11-05 1981-06-04 Hitachi Ltd Lead frame

Also Published As

Publication number Publication date
JPS58182858A (en) 1983-10-25

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