JPH05114680A - Manufacture of lead frame - Google Patents

Manufacture of lead frame

Info

Publication number
JPH05114680A
JPH05114680A JP27578191A JP27578191A JPH05114680A JP H05114680 A JPH05114680 A JP H05114680A JP 27578191 A JP27578191 A JP 27578191A JP 27578191 A JP27578191 A JP 27578191A JP H05114680 A JPH05114680 A JP H05114680A
Authority
JP
Japan
Prior art keywords
lead
etching
region
forming
lead frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP27578191A
Other languages
Japanese (ja)
Other versions
JP2632456B2 (en
Inventor
Shigeaki Kubota
恵彬 久保田
Keiichi Tsujimoto
圭一 辻本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsui High Tec Inc
Original Assignee
Mitsui High Tec Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsui High Tec Inc filed Critical Mitsui High Tec Inc
Priority to JP27578191A priority Critical patent/JP2632456B2/en
Publication of JPH05114680A publication Critical patent/JPH05114680A/en
Application granted granted Critical
Publication of JP2632456B2 publication Critical patent/JP2632456B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385Shape, e.g. interlocking features

Abstract

PURPOSE:To form a precise pattern with high accuracy by forming a thin wall- thickness section containing no residual stress in at least an area which becomes the leading edge section of inner leads by etching and the remaining area by pressing. CONSTITUTION:After the area of a belt-like material other than areas for forming the leading edges of inner leads 12 and another areas for forming die pads 11 is coated with a resist pattern by a photolithographical method, a thin wall-thickness section R1 is formed by etching the belt-like material by using the resist pattern as a mask. Then, after forming another resist pattern by using the metallic wire material, the leading edge sections of the inner leads 12 and die pads 11 are formed by etching. In addition, the remaining area is patterned by loading the metallic wire material in a metallic mold equipped with trimming dies for part of the lead 12, a damper 13, part of an outer lead 14, etc., and performing press working. Therefore, a high accuracy lead frame which is less in process stress, such as torsion, etc., can be obtained without side etching.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、リードフレームの製造
方法に係り、特に高密度のリードフレームの製造方法に
関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead frame manufacturing method, and more particularly to a high density lead frame manufacturing method.

【0002】[0002]

【従来の技術】IC,LSIなどの半導体装置用リ−ド
フレ−ムは、フォトエッチング法またはプレス加工のい
ずれかの方法によって、0.25mmあるいは0.15mm
の板厚の金属条材の不要部分を除去することによって形
状加工したのち、所定部分にめっきを行うめっき工程、
テープを貼着しインナーリード相互間を固定する固定工
程等を経て形成される。
2. Description of the Related Art Lead frames for semiconductor devices such as ICs and LSIs are 0.25 mm or 0.15 mm in size by either a photo etching method or a press working method.
After performing shape processing by removing unnecessary portions of the metal strip having the plate thickness of, a plating step of plating a predetermined portion,
It is formed through a fixing process of attaching a tape and fixing the inner leads to each other.

【0003】ところで、半導体装置の高密度化・高集積
化および薄型化に伴い、チップ面積が増大すると共にリ
―ドピン数が増加するものの、パッケ―ジは従来通りか
もしくは小型化・薄型化の傾向にある。
By the way, as the chip area increases and the number of lead pins increases as the semiconductor device becomes higher in density, higher in integration, and thinner, the package is the same as the conventional package or the package is made smaller and thinner. There is a tendency.

【0004】従って、同一面積内においてインナ−リ―
ドの本数が増加すれば、当然ながらインナ−リ―ドの幅
および隣接するインナ−リ―ドとの間隔は狭くなる。こ
のため、リードフレームの加工精度も極めて高いものが
要求されるようになってきており、強度の低下によるイ
ンナ−リ―ドの変形およびその変形によるインナ−リ―
ド間の短絡等の不良が問題となっている。
Therefore, the inner reel is formed within the same area.
As the number of the leads increases, the width of the inner leads and the space between the inner leads adjacent to each other naturally decrease. For this reason, extremely high processing accuracy of the lead frame has been demanded, and deformation of the inner lead due to deterioration of strength and inner lead due to the deformation.
A problem such as a short circuit between terminals is a problem.

【0005】そこで本発明者らは、先にインナーリード
をエッチング法で形成するとともに、アウターリードを
プレス加工法で形成することによりリードフレームを形
成する方法を提案している(特公平3−6663号公
報)。
Therefore, the present inventors have proposed a method of forming a lead frame by first forming the inner lead by an etching method and forming the outer lead by a press working method (Japanese Patent Publication No. 3-6663). Publication).

【0006】しかしながら、インナーリードをエッチン
グによって成形しても、板厚に対してリード幅が狭いた
め、リード断面が長方形状になり、ワイヤボンディング
の際にキャピラリの当たり具合によってリードが捩れた
り、リード位置が変位するなどの問題が残っていた。
However, even if the inner lead is formed by etching, the lead width is narrow with respect to the plate thickness, so the lead cross section becomes rectangular, and the lead is twisted due to the contact of the capillary during wire bonding, or the lead is twisted. Problems such as displacement of the position remained.

【0007】また、近年パッケージの薄型化が望まれる
中で、リードフレームに用いる素材の板厚も薄くなりつ
つあるが、アウターリードが薄くなることで、実装後の
リードの曲りも深刻な問題となっている。
In addition, with the recent demand for thinner packages, the thickness of the material used for the lead frame is becoming thinner. However, as the outer leads become thinner, bending of the leads after mounting becomes a serious problem. Is becoming

【0008】[0008]

【発明が解決しようとする課題】このように、半導体装
置の高集積化に伴い、リ−ド間隔およびリード幅は小さ
くなる一方であり、加工精度の向上が大きな問題となっ
ていた。
As described above, with the high integration of semiconductor devices, the lead interval and the lead width are becoming smaller, and the improvement of processing accuracy has been a serious problem.

【0009】従って、リードフレーム全体の板厚を薄く
する必要がある。しかしながら、リードフレーム全体を
肉薄にすると、全体の強度が低下して搬送、取扱いおよ
び位置決めの際にリードフレームの変形、損傷が生じ半
導体装置の信頼性および歩留まり低下の原因となってい
た。
Therefore, it is necessary to reduce the plate thickness of the entire lead frame. However, if the entire lead frame is made thin, the strength of the entire lead frame is reduced, and the lead frame is deformed and damaged during transportation, handling, and positioning, which causes a decrease in reliability and yield of the semiconductor device.

【0010】また、パッケージの薄型化への要求が強ま
っており、樹脂厚の薄型化に伴う樹脂の密着性の問題と
ともにダイパッド領域の厚さも問題となっている。
Further, there is an increasing demand for thinner packages, and the thickness of the die pad region has become a problem as well as the problem of resin adhesion accompanying the thinner resin thickness.

【0011】本発明は、前記実情に鑑みてなされたもの
で、製造が容易で信頼性の高いリードフレームを提供す
ることを目的とする。
The present invention has been made in view of the above circumstances, and an object thereof is to provide a lead frame which is easy to manufacture and has high reliability.

【0012】[0012]

【課題を解決するための手段】そこで本発明では、金属
条材の所定の領域を所定の厚さとなるまでエッチング除
去し肉薄部を形成したのち、この肉薄部内に少なくとも
インナーリード先端領域が形成されるように、少なくと
もインナーリードの先端領域をエッチングで形状加工す
るとともに、アウターリードなどをプレス法で形状加工
するようにしている。
In the present invention, therefore, a thin region is formed by etching away a predetermined region of a metal strip to a predetermined thickness, and at least an inner lead tip region is formed in the thin region. As described above, at least the tip region of the inner lead is processed by etching, and the outer lead and the like are processed by the pressing method.

【0013】望ましくは、肉薄部内に半導体チップ搭載
用のパッドも含まれるようにしている。
Desirably, a pad for mounting a semiconductor chip is also included in the thin portion.

【0014】さらにインナーリードの内、アウターリー
ドと平行に伸びる領域は、プレス加工により形成される
ようにしている。
Further, a region of the inner lead extending in parallel with the outer lead is formed by press working.

【0015】[0015]

【作用】上記構成によれば、少なくともインナーリード
先端部となる領域にエッチングにより残留応力のない肉
薄部を形成してエッチングで形状加工するとともに、残
る領域はプレス加工により形状加工を行うようにしてい
るため、外枠は、肉厚で強固である一方、寸法精度の厳
しいインナーリード部等の領域は肉薄部からの加工であ
り、高精度の微細パターンの形成が可能となる。
According to the above structure, at least the region which becomes the tip of the inner lead is formed with a thin portion having no residual stress by etching, and the shape is processed by etching, while the remaining region is processed by pressing. Therefore, while the outer frame is thick and strong, the region such as the inner lead portion where the dimensional accuracy is severe is processed from the thin portion, and it is possible to form a highly precise fine pattern.

【0016】また、半導体チップ搭載用のパッドも肉薄
とすることにより、パッケージの厚さをさらに薄くする
ことが可能となる。
Further, by making the pad for mounting the semiconductor chip thin, it becomes possible to further reduce the thickness of the package.

【0017】さらにまた、パッドの裏面にエッチングに
より複数の凹部を形成するようにしてもよく、このよう
にすることにより、樹脂との密着性が向上し、樹脂厚が
小さくても、パッケージの抜けや剥がれを防ぎ、信頼性
の高いものを得ることができる。
Furthermore, a plurality of recesses may be formed on the back surface of the pad by etching. By doing so, the adhesiveness with the resin is improved and the package is removed even if the resin thickness is small. It is possible to prevent peeling and obtain a highly reliable product.

【0018】さらにインナーリードの内、比較的リード
間隔の大きい領域であるアウターリードと平行に伸びる
領域は、肉厚のままにしプレス加工により形成するよう
にすればさらに機械的強度の高いものを得ることができ
る。
Further, among the inner leads, the region extending in parallel with the outer leads, which is a region having a relatively large lead interval, is formed by pressing while leaving the wall thickness as it is, so that one having higher mechanical strength can be obtained. be able to.

【0019】ここで、肉薄部は外枠等の肉厚部の約1/
2程度の肉厚を有するように加工するのが望ましい。
Here, the thin portion is approximately 1 / thick of the thick portion of the outer frame or the like.
It is desirable to process so as to have a wall thickness of about 2.

【0020】インナーリード先端等の形状加工のエッチ
ングに際し、出発材料が肉薄となっているため、アンダ
ーカットが少なく高精度のパターン形成が可能となる。
Since the starting material is thin when etching the shape of the inner lead tip or the like, it is possible to form a highly accurate pattern with less undercut.

【0021】[0021]

【実施例】以下、本発明の実施例について、図面を参照
しつつ詳細に説明する。
Embodiments of the present invention will now be described in detail with reference to the drawings.

【0022】本発明実施例の方法によって形成されるリ
―ドフレ―ムは、図1(a) に平面図、図1(b) にその断
面図、図2に部分斜視図を示す如く、ダイパッド11お
よびインナーリード12の先端領域R1はサイドバーな
どの外側領域の肉厚の1/2程度に肉薄化したのちエッ
チングで形状加工し、一方インナーリードの内、比較的
リード間隔の大きい領域(R2)であるアウターリード
と平行に伸びる領域およびアウターリード、サイドバー
などは、肉厚のままプレス加工で成形するようにしたこ
とを特徴とするものである。
The lead frame formed by the method of the embodiment of the present invention has a die pad as shown in FIG. 1 (a) which is a plan view, FIG. 1 (b) is its sectional view and FIG. 2 is a partial perspective view. The tip regions R1 of the inner leads 11 and the inner leads 12 are thinned to about ½ of the thickness of the outer regions such as side bars and then processed by etching, while the inner leads have relatively large lead intervals (R2). The region extending in parallel with the outer lead, the outer lead, the side bar, and the like are characterized in that they are formed by press working as they are.

【0023】すなわち、ダイパッド11とそのまわりに
放射状に配列されたインナーリード先端領域R1と、イ
ンナーリードの平行領域、ダムバー13、アウターリー
ド14、サイドバー15,16などの形成された外側領
域R2とから構成されている。必要に応じて裏面にポリ
イミドテープを貼着しても良い。
That is, the die pad 11 and the inner lead tip region R1 radially arranged around the die pad 11 and the outer region R2 in which the inner lead parallel region, the dam bar 13, the outer lead 14, the side bars 15 and 16 are formed. It consists of If necessary, a polyimide tape may be attached to the back surface.

【0024】次に、このリ−ドフレ−ムの製造方法につ
いて説明する。
Next, a method for manufacturing this lead frame will be described.

【0025】まず、フォトリソ法を用いて帯条材料のイ
ンナーリード12先端形成領域およびダイパッド11形
成領域を除く領域をレジストパターンで被覆する。
First, a region of the strip material excluding the inner lead 12 tip forming region and the die pad 11 forming region is covered with a resist pattern by photolithography.

【0026】この後、このレジストパターンをマスクと
し、約1/2の深さまでエッチングし、肉薄領域R1を
形成する。
Then, using this resist pattern as a mask, etching is performed to a depth of about 1/2 to form a thin region R1.

【0027】このようにして肉薄領域の形成された金属
条材を用いて、レジストパターンを形成しこれをマスク
としてエッチングを行いインナーリード12の先端部お
よびダイパッド11の形状加工を行う。
A resist pattern is formed using the metal strip in which the thin region is formed in this manner, and etching is performed using the resist pattern as a mask to shape the tips of the inner leads 12 and the die pad 11.

【0028】そしてさらに、インナーリード12の一
部、ダムバー13、アウターリード14の一部などの抜
き型を具備した金型に装着し、プレス加工を行なうこと
により、残る領域をパタ―ニングする。
Then, the inner lead 12, a part of the dam bar 13, the outer lead 14 and the like are attached to a die equipped with a punching die, and press working is performed to pattern the remaining region.

【0029】続いて、必要に応じて裏面全体にインナー
リード固定用のポリイミドテープを貼着し、めっき工程
を経て、リードフレームの形状加工が終了する。
Subsequently, if necessary, a polyimide tape for fixing the inner leads is attached to the entire back surface, and after the plating process, the lead frame is shaped.

【0030】このようにして形成されたリ―ドフレ―ム
は、微細なインナーリード先端部の形状加工のためのエ
ッチング工程の出発材料が肉薄となっているため、サイ
ドエッチングもなく高精度でかつ捩じれなどの加工応力
の少ないリードフレームを得ることができ、従って、後
続工程における加熱工程を経ても変形の少ないリードフ
レームを得ることが可能となる。
In the lead frame thus formed, the starting material for the etching process for processing the fine shape of the inner lead tip portion is thin, so that there is no side etching and there is high precision. It is possible to obtain a lead frame with less processing stress such as twisting, and thus it is possible to obtain a lead frame with less deformation even after a heating process in a subsequent process.

【0031】さらにまた、リード間隔を良好に維持し、
ボンディング性を高めることが可能となる。
Furthermore, the lead spacing is maintained well,
The bondability can be improved.

【0032】また、半導体チップ搭載用のパッドも肉薄
となっているため、パッケージの厚さをさらに薄くする
ことが可能となる。
Further, since the pad for mounting the semiconductor chip is also thin, the thickness of the package can be further reduced.

【0033】このリードフレームは、素子チップの搭
載、ワイヤボンディング、樹脂封止などの工程を経て半
導体素子として完成されるが、薄型でかつ極めて信頼性
の高いものとなっている。
Although this lead frame is completed as a semiconductor element through steps such as mounting of element chips, wire bonding, and resin sealing, it is thin and extremely reliable.

【0034】なお、前記実施例では、インナーリード部
先端とダイパッドのみを肉薄部としたが、図3(a) およ
び(b) に示すように、インナーリード先端部形成領域R
3のみをハーフエッチングで肉薄とし、ダイパッド裏面
には複数の凹部Hを形成するようにしてもよい。このよ
うにすることにより、樹脂との密着性が向上し、樹脂厚
が小さくても、パッケージの抜けや剥がれを防ぎ、信頼
性の高いものを得ることができる。
In the above embodiment, only the inner lead tip and the die pad are made thin, but as shown in FIGS. 3A and 3B, the inner lead tip forming region R is formed.
Only 3 may be thinned by half etching to form a plurality of recesses H on the back surface of the die pad. By doing so, the adhesiveness with the resin is improved, and even if the resin thickness is small, it is possible to prevent the package from coming off or peeling and obtain a highly reliable package.

【0035】[0035]

【発明の効果】以上説明してきたように、本発明によれ
ば、少なくともインナーリード先端部となる領域にエッ
チングにより残留応力のない肉薄部を形成してエッチン
グで形状加工するとともに、残る領域はプレス加工によ
り形状加工を行うようにしているため、外枠は、肉厚で
強固である一方、寸法精度の厳しいインナーリード部等
の領域は肉薄部からの加工であり、高精度の微細パター
ンの形成が可能となる。
As described above, according to the present invention, a thin portion having no residual stress is formed by etching in at least a region which will be the tip of the inner lead, and the shape is processed by etching, while the remaining region is pressed. Since the shape is processed by processing, the outer frame is thick and strong, while the area such as the inner lead part where the dimensional accuracy is severe is processed from the thin part, forming a highly precise fine pattern. Is possible.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施例の方法で形成されたリー
ドフレームを示す図
FIG. 1 is a diagram showing a lead frame formed by the method of the first embodiment of the present invention.

【図2】同リードフレームの要部斜視図FIG. 2 is a perspective view of a main part of the lead frame.

【図3】本発明の第2の実施例の方法で形成されたリー
ドフレームを示す図
FIG. 3 is a diagram showing a lead frame formed by the method of the second embodiment of the present invention.

【符号の説明】[Explanation of symbols]

11 ダイパッド 12 インナ−リ−ド 13 ダムバー 14 アウターリード 15 サイドバー 16 サイドバー H 凹部 11 Die Pad 12 Inner Lead 13 Dam Bar 14 Outer Lead 15 Side Bar 16 Side Bar H Recess

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 半導体チップを搭載するためのダイパッ
ドと、前記パッドから所定の間隔をおいて配列されたイ
ンナーリードと、前記インナーリードに連設されたアウ
ターリードとを有するリードフレームの製造方法におい
て、 金属条材の少なくともインナーリード先端形成領域を含
む領域をエッチングによって肉薄化する肉薄化工程と前
記金属条材をレジストパターンを介してエッチングする
ことにより、インナーリードの少なくとも一部を形成す
る第1の形状加工工程と、 残る領域をプレスにより形状加工する第2の形状加工工
程とを含むことを特徴とするリードフレームの製造方
法。
1. A method of manufacturing a lead frame, comprising: a die pad for mounting a semiconductor chip; inner leads arranged at a predetermined distance from the pads; and outer leads connected to the inner leads. A thinning step of thinning a region of the metal strip including at least an inner lead tip forming region by etching, and forming at least a part of the inner lead by etching the metal strip through a resist pattern; And a second shape processing step of forming the remaining region by pressing.
【請求項2】 前記肉薄化工程は、ダイパッド形成領域
を含むように肉薄化する工程であることを特徴とする請
求項1に記載のリードフレームの製造方法。
2. The method of manufacturing a lead frame according to claim 1, wherein the thinning step is a step of thinning the die pad to include a die pad forming region.
【請求項3】 前記第2の形状加工工程は、インナーリ
ードの内、アウターリードと平行に伸びる領域のプレス
加工を含む工程であることを特徴とする請求項1に記載
のリードフレームの製造方法。
3. The method of manufacturing a lead frame according to claim 1, wherein the second shape processing step includes a step of pressing a region of the inner lead extending in parallel with the outer lead. ..
JP27578191A 1991-10-23 1991-10-23 Lead frame manufacturing method Expired - Fee Related JP2632456B2 (en)

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JPH05114680A true JPH05114680A (en) 1993-05-07
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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07176669A (en) * 1993-12-17 1995-07-14 Sumitomo Metal Ind Ltd Method for reducing internal stress of thin metal plate for electronic appliance
WO1996005612A1 (en) * 1994-08-09 1996-02-22 National Semiconductor Corporation A fine pitch lead frame and method for manufacturing same
EP0921562A2 (en) * 1997-10-28 1999-06-09 Texas Instruments Incorporated Improvements in or relating to lead frames
KR100585586B1 (en) * 1999-02-18 2006-06-07 삼성테크윈 주식회사 The fabrication method of semiconductor lead frame
JP2012222081A (en) * 2011-04-06 2012-11-12 Sumitomo Metal Mining Co Ltd Lead frame and manufacturing method thereof
US10522298B2 (en) 2009-04-16 2019-12-31 Vishay Sprague, Inc. Methods of manufacturing a hermetically sealed wet electrolytic capacitor and a hermetically sealed wet electrolytic capacitor

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07176669A (en) * 1993-12-17 1995-07-14 Sumitomo Metal Ind Ltd Method for reducing internal stress of thin metal plate for electronic appliance
WO1996005612A1 (en) * 1994-08-09 1996-02-22 National Semiconductor Corporation A fine pitch lead frame and method for manufacturing same
EP0921562A2 (en) * 1997-10-28 1999-06-09 Texas Instruments Incorporated Improvements in or relating to lead frames
EP0921562A3 (en) * 1997-10-28 2002-06-05 Texas Instruments Incorporated Improvements in or relating to lead frames
US6635407B1 (en) 1997-10-28 2003-10-21 Texas Instruments Incorporated Two pass process for producing a fine pitch lead frame by etching
KR100585586B1 (en) * 1999-02-18 2006-06-07 삼성테크윈 주식회사 The fabrication method of semiconductor lead frame
US10522298B2 (en) 2009-04-16 2019-12-31 Vishay Sprague, Inc. Methods of manufacturing a hermetically sealed wet electrolytic capacitor and a hermetically sealed wet electrolytic capacitor
JP2012222081A (en) * 2011-04-06 2012-11-12 Sumitomo Metal Mining Co Ltd Lead frame and manufacturing method thereof

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