JPS6343913B2 - - Google Patents

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Publication number
JPS6343913B2
JPS6343913B2 JP60231117A JP23111785A JPS6343913B2 JP S6343913 B2 JPS6343913 B2 JP S6343913B2 JP 60231117 A JP60231117 A JP 60231117A JP 23111785 A JP23111785 A JP 23111785A JP S6343913 B2 JPS6343913 B2 JP S6343913B2
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JP
Japan
Prior art keywords
layer
substrate
mixed crystal
thickness
stress
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP60231117A
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Japanese (ja)
Other versions
JPS61142786A (en
Inventor
Takashi Kajimura
Takaro Kuroda
Shigeo Yamashita
Michiharu Nakamura
Junichi Umeda
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Hitachi Ltd
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Hitachi Ltd
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Priority to JP23111785A priority Critical patent/JPS61142786A/en
Publication of JPS61142786A publication Critical patent/JPS61142786A/en
Publication of JPS6343913B2 publication Critical patent/JPS6343913B2/ja
Granted legal-status Critical Current

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Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は、高信頼性,長寿命の半導体レーザ装
置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a highly reliable and long-life semiconductor laser device.

〔発明の背景〕[Background of the invention]

半導体レーザ装置は、小形,高効率で、大量生
産が可能なことから、レーザプリンタ等の情報端
末機器やビデオデイスク,測距計等の光源として
多種の応用が考えられている。この際、レーザ光
の波長が短い方が、感度や分解能向上の点から好
ましく、また操作上の容易さからも、低しきい
値,高信頼性の可視域に発振波長を持つ半導体レ
ーザ装置の実用化が望まれている。
Semiconductor laser devices are compact, highly efficient, and can be mass-produced, and are therefore being considered for a variety of applications as light sources for information terminal equipment such as laser printers, video disks, distance meters, and the like. In this case, the shorter the wavelength of the laser light, the better from the viewpoint of improving sensitivity and resolution, and from the viewpoint of ease of operation, a semiconductor laser device with an oscillation wavelength in the visible range with a low threshold and high reliability is used. It is hoped that it will be put into practical use.

従来0.8μm帯で開発されてきたGa1-xAlxAs半
導体レーザにおいて、活性層のXを0.15−0.35、
クラツド層のXを0.5〜0.8とすることにより、波
長7600Å以下の可視半導体レーザを容易に作製で
きる(例えばクツセル他、アツプライド・フイジ
ツクス・レター第28巻,1976年,第598頁(H.
Kressel et al.,Appl.Phys.Lett.Vol.28,No.10,
1976,P.598)参照)。この場合、GaAs基板と成
長層の格子定数のミスマツチング混晶比Xの増大
と共に大きくなるため、成長層面内の応力、特に
活性層にかかる応力が、従来の0.83μmのレーザ
に比べて1ケタ以上大きくなることが、素子の長
寿命,高信頼性を得る上で重要な問題である。
In Ga 1-x Al x As semiconductor lasers that have been developed in the 0.8 μm band, the active layer X is 0.15-0.35,
By setting X of the cladding layer to 0.5 to 0.8, a visible semiconductor laser with a wavelength of 7600 Å or less can be easily produced (for example, Kutsel et al., Applied Physics Letters Vol. 28, 1976, p. 598 (H.
Kressel et al., Appl.Phys.Lett.Vol.28, No.10,
(1976, p. 598)). In this case, the mismatching of the lattice constants between the GaAs substrate and the grown layer increases as the mixed crystal ratio Increasing the size is an important issue in obtaining long life and high reliability of the device.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、この活性層にかかる応力を低
減する新しい半導体レーザ装置の構成を提供する
ことにある。
An object of the present invention is to provide a new semiconductor laser device configuration that reduces stress applied to this active layer.

〔発明の概要〕[Summary of the invention]

第1は従来通りGaAs基板を用いこの上部に
GaAlAs層のバツフア層を介してGaAlAs系のダ
ブルヘテロ構造を持つ多層膜を成長させるもので
ある。
The first is to use a GaAs substrate as before.
A GaAlAs double heterostructure multilayer film is grown through a GaAlAs buffer layer.

第2は従来通りGaAs基板を用いこの上部にGa
(AsSb)層のバツフア層を介してGaAlAs系のダ
ブルヘテロ構造を持つ多層膜を成長させるもので
ある。
The second method uses a GaAs substrate as before, and Ga on the top of it.
This method grows a GaAlAs-based multilayer film with a double heterostructure through a buffer layer of (AsSb) layers.

第3は従来通りGaAs基板を用いこの上部に
(InGa)As層のバツフア層を介してGaAlAs系の
ダブルヘテロ構造を持つ多層膜を成長させるもの
である。
The third method uses a GaAs substrate as in the past, and grows a GaAlAs-based double heterostructure multilayer film on top of the GaAs substrate with a buffer layer of (InGa)As layer interposed therebetween.

また、第4としてGaAlAs系のダブルヘテロ構
造を持つ多層膜をGa1-xAlxAs混晶基板上に成長
させるもの、第5としてGa(AsSb)混晶基板上
にGaAlAs系のダブルヘテロ構造を持つ多層膜を
成長させるもの、第6として(InGa)As混晶基
板上にGaAlAs系のダブルヘテロ構造を持つ多層
膜を成長させるものもある。
The fourth method is to grow a multilayer film with a GaAlAs-based double heterostructure on a Ga 1-x Al x As mixed crystal substrate, and the fifth method is to grow a GaAlAs-based double heterostructure on a Ga(AsSb) mixed crystal substrate. A sixth method is to grow a multilayer film having a GaAlAs double heterostructure on an (InGa)As mixed crystal substrate.

〔発明の実施例〕[Embodiments of the invention]

以下、実施例により各々について詳細に説明す
る。
Hereinafter, each will be explained in detail using examples.

第1の形態は基板としてGaAlAs混晶基板を用
いるものである。
The first form uses a GaAlAs mixed crystal substrate as the substrate.

第1図はGaAlAs系半導体レーザの積層構造の
フアブリペロ共振器を構成する鏡面に平行な平面
で切断した断面図である。同時に各層の厚さをd1
〜d5に表示した。
FIG. 1 is a cross-sectional view taken along a plane parallel to a mirror surface constituting a Fabry-Perot resonator having a stacked structure of a GaAlAs semiconductor laser. At the same time, the thickness of each layer is d 1
Shown at ~ d5 .

各半導体層を次の如く構成することにより本発
明の目的を達することができる。
The object of the present invention can be achieved by configuring each semiconductor layer as follows.

Ga1-xAlxAs混晶基板(0.02x0.4) (厚さd1)1上に n型Ga1-yAlyAs層(0.5y0.8) (厚さd2) 2 Ga1-zAlzAs層(0.15z0.35) (厚さd3) 3 p型Ga1-uAluAs層(0.5u0.8) (厚さd4) 4 およびp型GaAs層5の各層を周知の液相エ
ピタキシヤル法で成長させる。層2と層4は反
対導電型となす。この場合 z−0.075xz+0.025の関係を満たす如
く混晶基板を選定する。
Ga 1-x Al x As mixed crystal substrate (0.02x0.4) (thickness d 1 ) n-type Ga 1-y Al y As layer (0.5y0.8) (thickness d 2 ) 2 Ga 1 -z Al z As layer (0.15z0.35) (thickness d 3 ) 3 p-type Ga 1-u Al u As layer (0.5u0.8) (thickness d 4 ) 4 and each layer of p-type GaAs layer 5 is grown by the well-known liquid phase epitaxial method. Layer 2 and layer 4 are of opposite conductivity type. In this case, the mixed crystal substrate is selected so as to satisfy the relationship z-0.075xz+0.025.

なお、各層の厚さは大略次の範囲で選択す
る。
Note that the thickness of each layer is approximately selected within the following range.

50μmd1200μm,1μmd23μm, 0.05μmd30.5μm,1μmd43μm, 0.5μmd53μm。50μmd 1 200μm, 1μmd 2 3μm, 0.05μmd 3 0.5μm, 1μmd 4 3μm, 0.5μmd 5 3μm.

次いで層5上にAl2O3膜をCVD法によつて厚さ
3000Åに形成する。通常のフオトリソグラフ技術
によつてAl2O3膜を幅5μmのストライプ状に選択
的に除去する。この窓を通してZn拡散し、Zn拡
散領域8を形成する。Al2O3膜を除去して後p側
電極7としてCr―Au,n側電極6として
AuGeNi―Auを蒸着で形成する。半導体レーザ
装置の相対する端面9,10をへき開により相互
に平行な共振反射面を作製する。
Next, an Al 2 O 3 film is deposited on layer 5 to a certain thickness using the CVD method.
Formed at 3000Å. The Al 2 O 3 film is selectively removed in stripes with a width of 5 μm using a conventional photolithography technique. Zn is diffused through this window to form a Zn diffusion region 8. After removing the Al 2 O 3 film, Cr-Au is used as the p-side electrode 7, and Cr-Au is used as the n-side electrode 6.
Form AuGeNi-Au by vapor deposition. Mutually parallel resonant reflection surfaces are fabricated by cleaving opposing end surfaces 9 and 10 of the semiconductor laser device.

この構造の素子における活性層中の応力を計算
した例が第2図である。各パラメータは図中に例
示した。実線は引張り応力、破線は圧縮応力を示
す。横軸は基板の混晶比xで、縦軸は活性層中の
応力を表わす。ここでは活性層中のAlAsの混晶
比zが0.15および0.2の場合が示してある。図よ
り或るzに対してxをある範囲に設定することに
より活性層中の応力を著しく低減できる範囲があ
ることがわかる。
FIG. 2 shows an example of calculating the stress in the active layer in an element with this structure. Each parameter is illustrated in the figure. Solid lines indicate tensile stress and dashed lines indicate compressive stress. The horizontal axis represents the mixed crystal ratio x of the substrate, and the vertical axis represents the stress in the active layer. Here, cases are shown in which the AlAs mixed crystal ratio z in the active layer is 0.15 and 0.2. The figure shows that there is a range in which the stress in the active layer can be significantly reduced by setting x within a certain range for a certain z.

検討の結果、活性層中の応力が最も小さくなる
基板の混晶比xは Xz−0.025(この時、y=u=0.6) であることが判明した。また活性層中の応力を
108dyn/cm2以内にするにはz−0.075xz+
0.025とすればよいことが判明した。このもよう
を第3図に示した。活性層中の応力は各層の厚み
d2〜d5に対してはゆるやかに変化する量であるこ
とが計算より確められており、実用的な素子構造
に対しては上記関係は誤差範囲内でほぼ満足され
る。活性層中のAlAsの混晶比zが大きくなると、
yおよびuを0.6以上にする必要がある。この場
合も応力が最小となる範囲は第3図の領域内に含
まれる。
As a result of the study, it was found that the mixed crystal ratio x of the substrate at which the stress in the active layer is minimized is Xz-0.025 (at this time, y=u=0.6). Also, the stress in the active layer
To keep it within 10 8 dyn/cm 2 , use z−0.075xz+
It turned out that 0.025 is sufficient. This situation is shown in Figure 3. The stress in the active layer depends on the thickness of each layer.
It has been confirmed through calculations that the values d 2 to d 5 change slowly, and the above relationship is almost satisfied within the error range for a practical device structure. As the AlAs mixed crystal ratio z in the active layer increases,
It is necessary to make y and u 0.6 or more. In this case as well, the range where the stress is minimum is included in the area shown in FIG.

以上述べたごとくGaAlAs系可視半導体レーザ
において、z−0.075xz+0.025なる関係を
満足する混晶比(x)を有する基板を使用するこ
とにより、活性層の応力集中が緩和され、素子の
長寿命化が期待される。なお混晶基板の作成は液
相厚膜成長法で行なうことができる。
As mentioned above, in GaAlAs-based visible semiconductor lasers, by using a substrate with a mixed crystal ratio (x) that satisfies the relationship z-0.075xz+0.025, stress concentration in the active layer is alleviated and the device has a long lifespan. It is expected that Note that the mixed crystal substrate can be created by a liquid phase thick film growth method.

第2の形態はGaAs基板上部にGaAlAs層のバ
ツフア層を介してGaAlAs系のダブルヘテロ構造
を構成するものである。
In the second form, a GaAlAs-based double heterostructure is formed on top of a GaAs substrate with a buffer layer of GaAlAs interposed therebetween.

第4図がこの形態の半導体レーザ装置の例を示
すものである。第1図と同様にフアブリペロ共振
器を構成する鏡面に平行な平面で切断した主要部
断面図である。
FIG. 4 shows an example of a semiconductor laser device of this form. FIG. 2 is a cross-sectional view of the main parts of the Fabry-Perot resonator taken along a plane parallel to a mirror surface constituting the Fabry-Perot resonator, similar to FIG. 1;

(100)面を表面に持つn型GaAs基板41上
に次の各層を周知の液相連続エピタキシヤル法に
よつて成長する。
The following layers are grown on an n-type GaAs substrate 41 having a (100) plane on its surface by a well-known liquid phase continuous epitaxial method.

n型Ga1-zAlzAs(0<z0.8) (厚さd42)42, n型Ga1-yAlyAs(0.5y0.8) (厚さd43)43, Ga1-xAlxAs(0.15x0.35) (厚さd44)44, p型Ga1-uAluAs(0.5<u0.8) (厚さd45)45, p型GaAs(厚さd46)46 である。ここで層42はバツフア層で本発明にお
いて特に重要な層である。厚さとしては6μm〜
20μmが適当である。
n-type Ga 1-z Al z As (0<z0.8) (thickness d 42 ) 42, n-type Ga 1-y Al y As (0.5y0.8) (thickness d 43 ) 43, Ga 1- x Al x As (0.15x0.35) (thickness d 44 ) 44, p-type Ga 1-u Al u As (0.5<u0.8) (thickness d 45 ) 45, p-type GaAs (thickness d 46) )46. Here, the layer 42 is a buffer layer and is a particularly important layer in the present invention. Thickness: 6μm~
20 μm is appropriate.

層44は活性層で、これをはさむ層43,45
はクラツド層である。これまでの一般的なダブル
ヘテロ構造と同様に設計すれば良い。一般には、
活性層44は0.05μm〜0.2μmの厚さ、クラツド層
は大略1μm〜3μmの厚さとしている。
Layer 44 is an active layer, and layers 43 and 45 sandwich this layer.
is the clad layer. It can be designed in the same way as conventional double heterostructures. In general,
The active layer 44 has a thickness of 0.05 .mu.m to 0.2 .mu.m, and the cladding layer has a thickness of approximately 1 .mu.m to 3 .mu.m.

第5図に本構造の素子における活性層44中の
応力のバツフア層の厚さに対する変化の状況を示
す。第5図の例は、x=0.2,y=u=0.6,d41
100μm,d43=1μm,d44=0.1μm,d45=2μm,d46
=1μmである。横軸はバツフア層42の厚さd42
縦軸は活性層中の応力を示す。なお、図中Aで矢
印した点は従来構造における活性層の応力を示
す。
FIG. 5 shows how the stress in the active layer 44 changes with respect to the thickness of the buffer layer in the device of this structure. The example in Figure 5 is x=0.2, y=u=0.6, d 41 =
100μm, d43 = 1μm, d44 = 0.1μm, d45 = 2μm, d46
= 1 μm. The horizontal axis is the thickness d 42 of the buffer layer 42,
The vertical axis indicates stress in the active layer. Note that the point marked with an arrow A in the figure indicates the stress in the active layer in the conventional structure.

図より、活性層中の応力を188dyn/cm2以下に
するには、バツフアの組成z=0.3の場合13μm以
上、z=0.6の場合6μm以上によればよいことが
わかる。活性層中の応力は、バツフア層以外の各
層の厚みd3〜d6に対しては、それぞれの厚みが
2μm程度以下の場合、ゆるやかに変化する量であ
ることが計算より確かめられており、実用的な素
子構造に対しては、上記関係は誤差範囲内でほぼ
満足される。
From the figure, it can be seen that in order to reduce the stress in the active layer to 18 8 dyn/cm 2 or less, the buffer composition should be 13 μm or more when z=0.3, and 6 μm or more when z=0.6. The stress in the active layer is determined by the thickness of each layer d 3 to d 6 other than the buffer layer.
It has been confirmed through calculations that the amount changes slowly when it is about 2 μm or less, and for a practical device structure, the above relationship is almost satisfied within the error range.

以上述べたごとく(GaAl)As系可視レーザに
おいて、AlAs混晶比(z)が0.3程度以上、厚さ
6μm〜20μm程度のバツフア層を設けることによ
り、活性層中の応力が緩和され、素子の長寿命化
が期待できる。
As mentioned above, in (GaAl)As-based visible lasers, when the AlAs mixed crystal ratio (z) is about 0.3 or more and the thickness is
By providing a buffer layer with a thickness of approximately 6 μm to 20 μm, stress in the active layer is alleviated, and a longer life of the device can be expected.

第3ないし第6の形態は(GaAl)As系可視半
導体レーザの成長に際し、Ga(AsSb)又は
(InGa)As系三元混晶をバツフア層あるいは、
混晶基板として用いることによつて、活性層の応
力低減をはかることを特徴とする。
In the third to sixth forms, when growing a (GaAl)As-based visible semiconductor laser, Ga(AsSb) or (InGa)As-based ternary mixed crystal is used as a buffer layer or
It is characterized by reducing stress in the active layer by using it as a mixed crystal substrate.

以下にその内容を説明する。 The contents will be explained below.

室温において、GaAs,AlAs,GaSb,InAsの
格子定数は、それぞれ5653Å,5662Å,6095Å,
6058Åであり、その差をGaAsの格子定数を基準
とした百分率で表わすと、AlAsは+0.16%,
GaSbは+7.52%,InAsは+6.92%である。これ
らの系の混晶(Ga1-xAlxAs,Ga(As1-ySby),
(InzGa1-z)Asでは、格子定数が混晶比x,y,
zに比例的に変化するというVegardの方則がよ
くなりたつているから、混晶比Xの y=(0.16/7.52)X=0.0213X z=(0.16/6.92)X=0.0231X 先にのべた第1および第2の応力を低減した半
導体レーザの形態のうち、第2の形態の半導体レ
ーザにおいて混晶比z0.3の組成のバツフア層
を6〜20μm程度設けるものは、これと同じ格子
定数に対応するy≧0.00639のGa(As1-ySby)系
又は、z0.00693の(InzGa1-z)As系のバツフ
ア層を同じ厚みだけつけることで代替できる。ま
た、第1の形態であるX0.1の混晶基板を用い
る代りに、y0.00213のGa(As1-ySby)系、又
はz0.00231の(InzGa1-z)As系混晶基板で代
替できる。
At room temperature, the lattice constants of GaAs, AlAs, GaSb, and InAs are 5653 Å, 5662 Å, 6095 Å, respectively.
6058 Å, and when the difference is expressed as a percentage based on the lattice constant of GaAs, it is +0.16% for AlAs,
GaSb is +7.52%, and InAs is +6.92%. Mixed crystals of these systems (Ga 1-x Al x As, Ga(As 1-y Sb y ),
(In z Ga 1-z )As, the lattice constant is the mixed crystal ratio x, y,
Since Vegard's law that changes proportionally to z has become better, the mixed crystal ratio X y = (0.16/7.52) Among the first and second stress-reduced semiconductor laser forms, the second form of semiconductor laser has a buffer layer with a composition of about 6 to 20 μm having a mixed crystal ratio of z0.3, which has the same lattice constant. It can be replaced by applying a Ga (As 1-y Sb y )-based buffer layer with y≧0.00639 or (In z Ga 1-z ) As-based buffer layer with z0.00693 to the same thickness. Moreover , instead of using the mixed crystal substrate of Can be replaced with a mixed crystal substrate.

従つて、Ga(As1-ySby)(0y0.003),(Inz
Ga1-z)As(0z0.003)を用いることによつ
て本発明の目的を達成することが出来る。
Therefore, Ga(As 1-y Sb y ) (0y0.003), (In z
The object of the present invention can be achieved by using Ga 1-z )As (0z0.003).

これらの形態は、GaAlAs系のバツフア層や混
晶基板を用いる場合に比べて次の点で有利であ
る。
These forms have the following advantages over the case of using a GaAlAs-based buffer layer or a mixed crystal substrate.

厚さ10μm〜20μmのバツフア層をつける際に、
もしもGaAs基板上にバツフア層をつける成長
と、その上にレーザ構造を作製する成長とを分離
できれば、この方法はきわめて再現性よく行なえ
る。(GaAl)As系でx0.5以上のバツフア層で
は、表面が空気中で直ちに酸化されてしまうため
にこのような2回の成長に分離できない。一方、
Ga(As1-ySby)又は(InzGa1-z)Asの場合にはこ
のような問題は全く無い。また、例えば800℃で
の、y〜z〜0.1の混晶をGaリツチ溶液から液相
成長する場合の偏析係数はSbで−0.5,Inで−0.2
の程度であり、組成の制御は容易である。
When applying a buffer layer with a thickness of 10 μm to 20 μm,
If the growth of the buffer layer on the GaAs substrate can be separated from the growth of the laser structure on top of it, this method can be performed with great reproducibility. In the case of a (GaAl)As-based buffer layer of x0.5 or more, the surface is immediately oxidized in the air, so it cannot be separated into two growths like this. on the other hand,
In the case of Ga(As 1-y Sb y ) or (In z Ga 1-z )As, there is no such problem at all. For example, when a mixed crystal of y~z~0.1 is grown in liquid phase from a Ga-rich solution at 800°C, the segregation coefficient is -0.5 for Sb and -0.2 for In.
The composition can be easily controlled.

x0.1の組成の(Ga1-xAlx)Asと同じ格子定
数の混晶基板の作製においても、yz0.002
(0.2%)と非常に小さいため、結晶中のSb,Inの
密度は−5×1019コ/c.c.と通常のドーパント程度
で良く、基板としての結晶の品質を劣化させるこ
となく作製できる。また、Sb,Inの偏析係数が
小さいため、均一組成の基板が得やすい。
Even in the production of a mixed crystal substrate with the same lattice constant as (Ga 1-x Al x )As with a composition of x0.1, yz0.002
(0.2%), the density of Sb and In in the crystal can be -5×10 19 co/cc, which is about the same as a normal dopant, and it can be manufactured without deteriorating the quality of the crystal as a substrate. Furthermore, since the segregation coefficients of Sb and In are small, it is easy to obtain a substrate with a uniform composition.

具体例をもつて第4および第6の形態を説明す
る。
The fourth and sixth embodiments will be explained using specific examples.

第4図を用いて説明する。 This will be explained using FIG.

n形GaAs基板41上に、n形Ga(As0.88Sb0.12
層又はn形(In0.12Ga0.88)As層42,n形
(Ga0.4Al0.6)As層43,p形(Ga0.8Al0.2)As層
44,p形(Ga0.4Al0.6)As層45,p形GaAs
層46を液相成長法で連絡に成長する。液相成長
法は通常のスライドボート法で行ない、各層の厚
さは42が10μm、43が2μm、44が0.1μm、
45が2μm、46が1μmである。
On the n-type GaAs substrate 41, n-type Ga (As 0.88 Sb 0.12 )
layers or n-type (In 0.12 Ga 0.88 ) As layer 42, n-type (Ga 0.4 Al 0.6 ) As layer 43, p-type (Ga 0.8 Al 0.2 ) As layer 44, p-type (Ga 0.4 Al 0.6 ) As layer 45, p-type GaAs
Layer 46 is grown continuously by liquid phase epitaxy. The liquid phase growth method was carried out by the usual slide boat method, and the thickness of each layer was 10 μm for 42, 2 μm for 43, 0.1 μm for 44,
45 is 2 μm, and 46 is 1 μm.

次いで層46上にSiO2膜をCVD法によつて厚
さ3000Åに形成する。通常のフオトリソグラフイ
技術によつてSiO2膜を幅5μmのストライブ状に
選択的に除去する。その後、p側電極として
AuZn、n側電極としてAuSnを蒸着で形成する。
レーザ長は300μmである。半導体レーザ装置の相
対する端面をへき開により相互に平行な共振反射
面を作製する。
Next, a SiO 2 film is formed on layer 46 to a thickness of 3000 Å by CVD. The SiO 2 film is selectively removed in stripes with a width of 5 μm using a conventional photolithography technique. After that, as a p-side electrode
AuZn and AuSn are formed by vapor deposition as the n-side electrode.
The laser length is 300μm. Mutually parallel resonant reflection surfaces are created by cleaving the opposing end faces of the semiconductor laser device.

上記レーザ室温において750nmでレーザ発振
し、しきい電流密度は1KA/cm2程度と低く、ま
た従来の0.83μm帯の素子と同程度の寿命が得ら
れた。
The above laser oscillated at 750 nm at room temperature, had a low threshold current density of about 1 KA/cm 2 , and had a lifetime comparable to conventional 0.83 μm band devices.

更に、n形Ga(As1-0.002Sb0.002)基板又は、n
形(In0.002Ga1-0.002)As基板を用意し、この上部
に前述の43,44,45,46と組成と厚みを
持つた半導体層を同様の液相成長法で連続的に成
長した。本構造のレーザ装置も、前述と同程度の
低しきい電流密度と、長寿命を得ることが出来
る。
Furthermore, an n-type Ga (As 1-0.002 Sb 0.002 ) substrate or an n-type Ga (As 1-0.002 Sb 0.002 ) substrate or
A (In 0.002 Ga 1-0.002 ) As substrate was prepared, and semiconductor layers having the compositions and thicknesses 43, 44, 45, and 46 described above were successively grown on the substrate by the same liquid phase growth method. The laser device with this structure can also achieve a low threshold current density and a long life similar to those described above.

Ga(AsSb)系、又は(InGa)As系のバツフア
層あるいは、混晶基板は、GaAs基板上に気相成
長したもの、あるいはCVD法で成長したものを
用いることもでき、同様の特性が得られた。
Ga(AsSb)-based or (InGa)As-based buffer layers or mixed crystal substrates can be grown in vapor phase on a GaAs substrate or by CVD, and similar characteristics can be obtained. It was done.

なお、本発明においてはプレーナ・ストライプ
構造の半導体レーザに関する実施例について詳述
したが、埋め込みヘテロ構造、Channeled
Substrate Planar構造等種々の構造のレーザに
おいても本発明を用いることにより同様の特性が
得られた。
In the present invention, an embodiment related to a semiconductor laser with a planar stripe structure has been described in detail, but a buried heterostructure, a channeled
Similar characteristics were obtained by using the present invention in lasers with various structures such as a substrate planar structure.

〔発明の効果〕〔Effect of the invention〕

本発明は実用的な可視半導体レーザを提供し得
る効果を有する。
The present invention has the effect of providing a practical visible semiconductor laser.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の半導体レーザ装置の斜視図、
第2図は基板の混晶比と活性層応力の関係を示す
図、第3図は活性層の混晶比と基板の混晶比の領
域を示す図、第4図は本発明の別な実施形態を示
す半導体レーザ装置の断面図、第5図はバツフア
層の厚さと活性層の応力の関係を示す図である。 1……GaAlAs基板、2,4……クラツド層、
3……活性層、6,7……電極、9,10……結
晶端面、41……GaAs基板、42……バツフア
層。
FIG. 1 is a perspective view of a semiconductor laser device of the present invention;
Fig. 2 is a diagram showing the relationship between the mixed crystal ratio of the substrate and the stress in the active layer, Fig. 3 is a diagram showing the range of the mixed crystal ratio of the active layer and the mixed crystal ratio of the substrate, and Fig. 4 is a diagram showing the relationship between the mixed crystal ratio of the substrate and the stress of the active layer. FIG. 5, which is a cross-sectional view of the semiconductor laser device according to the embodiment, is a diagram showing the relationship between the thickness of the buffer layer and the stress of the active layer. 1...GaAlAs substrate, 2, 4...cladding layer,
3... Active layer, 6, 7... Electrode, 9, 10... Crystal end face, 41... GaAs substrate, 42... Buffer layer.

Claims (1)

【特許請求の範囲】[Claims] 1 GaAs基板と、該GaAs基板上に形成された
(Ga1-xAlx)As,Ga(As1-ySby)または(Ioz
Ga1-z)Asから成るバツフア層と、該バツフア層
上に形成されたGaAlAs系のダブルヘテロ構造を
有する半導体レーザ装置において、上記バツフア
層の混晶比x,y,zは各々、0.3×0.8,
0.00639y0.01704,0.00693z0.01848,
であり、かつ上記バツフア層の厚さは6μm〜
20μmであることを特徴とする半導体レーザ装置。
1 GaAs substrate and (G a1-x Al x ) As, Ga (As 1-y S by ) or (I oz
In a semiconductor laser device having a buffer layer made of (G a1-z ) As and a GaAlAs-based double heterostructure formed on the buffer layer, the mixed crystal ratios x, y, and z of the buffer layer are each 0.3× 0.8,
0.00639y0.01704, 0.00693z0.01848,
, and the thickness of the buffer layer is 6 μm ~
A semiconductor laser device characterized by a diameter of 20 μm.
JP23111785A 1985-10-18 1985-10-18 Semiconductor laser device Granted JPS61142786A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23111785A JPS61142786A (en) 1985-10-18 1985-10-18 Semiconductor laser device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23111785A JPS61142786A (en) 1985-10-18 1985-10-18 Semiconductor laser device

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP18455682A Division JPS5878490A (en) 1982-10-22 1982-10-22 Semiconductor laser device

Publications (2)

Publication Number Publication Date
JPS61142786A JPS61142786A (en) 1986-06-30
JPS6343913B2 true JPS6343913B2 (en) 1988-09-01

Family

ID=16918555

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23111785A Granted JPS61142786A (en) 1985-10-18 1985-10-18 Semiconductor laser device

Country Status (1)

Country Link
JP (1) JPS61142786A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6345303U (en) * 1986-09-12 1988-03-26

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4971885A (en) * 1973-09-21 1974-07-11
JPS49113591A (en) * 1973-02-26 1974-10-30
JPS52127190A (en) * 1976-04-19 1977-10-25 Matsushita Electric Ind Co Ltd Semiconductor laser device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49113591A (en) * 1973-02-26 1974-10-30
JPS4971885A (en) * 1973-09-21 1974-07-11
JPS52127190A (en) * 1976-04-19 1977-10-25 Matsushita Electric Ind Co Ltd Semiconductor laser device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6345303U (en) * 1986-09-12 1988-03-26

Also Published As

Publication number Publication date
JPS61142786A (en) 1986-06-30

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