JPS6343390A - Hybrid integrated circuit board - Google Patents
Hybrid integrated circuit boardInfo
- Publication number
- JPS6343390A JPS6343390A JP18634286A JP18634286A JPS6343390A JP S6343390 A JPS6343390 A JP S6343390A JP 18634286 A JP18634286 A JP 18634286A JP 18634286 A JP18634286 A JP 18634286A JP S6343390 A JPS6343390 A JP S6343390A
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- hybrid integrated
- circuit board
- electrodes
- present
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000006378 damage Effects 0.000 description 8
- 238000000034 method Methods 0.000 description 5
- 239000000758 substrate Substances 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
Landscapes
- Structure Of Printed Boards (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、混成集積回路の組立工程における生製品の電
気的破壊を防止できる混成集積回路用基板に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a substrate for a hybrid integrated circuit that can prevent electrical damage to a raw product during the assembly process of the hybrid integrated circuit.
第3肉に従来の混成集積回路基板に、所要部品を搭載し
次状態の平面図金示す。図において、基板の一辺に沿っ
て形成された外部引出し端子接続用電極1,1.・・・
・・・はそれぞれ電気的に独立となっている。なお、図
において、5に搭載電子部品である。The third step is to show the plan view of the next state in which the required components are mounted on the conventional hybrid integrated circuit board. In the figure, external lead terminal connection electrodes 1, 1. ...
... are electrically independent. In addition, in the figure, 5 is a mounted electronic component.
上述した従来の混成集積回路用基板は、その外部引き出
し端子接続用電極が電気的に独立となっているため、そ
の基板を用いた混成集積回路を組立てる途中工程におい
て、基板上に搭載する部品とその電極間の電気的接続用
パターンがあたかもアンテナのような構造となり、搭載
部品が電気的破壊、特に静電破壊にいたる危険性が高い
という欠点がある。In the conventional hybrid integrated circuit board mentioned above, the electrodes for connecting the external lead terminals are electrically independent, so during the process of assembling a hybrid integrated circuit using the board, the parts mounted on the board and the The disadvantage is that the electrical connection pattern between the electrodes has a structure similar to that of an antenna, and there is a high risk of electrical damage, especially electrostatic damage, to the mounted components.
本発明の混成集積回路用基板は、外部引き出し端子接続
用電極の全てを予じめ電気的に接続しである。In the hybrid integrated circuit board of the present invention, all of the electrodes for connecting external lead terminals are electrically connected in advance.
次に本発明について図面を参照して説シjする。 Next, the present invention will be explained with reference to the drawings.
第1図は本発明の一実施例の混成集積回路用基板に所要
部品を搭載した工程途中の平面図でちる。FIG. 1 is a plan view of one embodiment of the present invention in the middle of a process in which necessary components are mounted on a hybrid integrated circuit board.
図において、外部引き出し端子接続用’%Fj= 1
* 1 t・・・・・・の間は破壊防止用接続パターン
2により、予じめ全べて相互接続されている。そして、
所要部品5の搭載およびワイヤボンディングが終了した
後に、切断部3で切断し、それぞれ独立した接続用電極
となる。In the figure, '%Fj = 1 for external lead terminal connection
*1 t... are all interconnected in advance by the connection pattern 2 for prevention of destruction. and,
After the mounting of the necessary parts 5 and the wire bonding are completed, the electrodes are cut at the cutting part 3 to become independent connection electrodes.
本発明の基板を用いた混成集積回路を製造する場合、そ
の組立工程中において所要部品5の搭載〜
工程以降では、基板上の搭載部品5は常に静電破壊等の
電気的破壊に致る危険を有しているが、本基板上の各電
極lは全て同電位に保たれるため、基板の一部に異常電
圧が印加されても、搭載部品が破壊する危険が無い。こ
の状態は組立工程がさらに進み、接続パターン2を切断
するまで続く。When manufacturing a hybrid integrated circuit using the substrate of the present invention, during the assembly process, the components 5 mounted on the substrate are always at risk of electrical damage such as electrostatic damage. However, since all the electrodes l on this board are kept at the same potential, there is no risk of damage to the mounted components even if an abnormal voltage is applied to a part of the board. This state continues until the assembly process progresses further and the connection pattern 2 is cut.
このため、混成集積回路の製造工程の大部分の工程での
電気的破壊の発生を防ぐことが可能となる。Therefore, it is possible to prevent electrical breakdown in most steps of manufacturing the hybrid integrated circuit.
第2図に本発明の他の実施例で、一枚の基板よシ複数の
製品を製造する例であシ、各ブロックAI、A2.A3
.A4は第1図と同様であυ、切断部4が各製品を共通
につらぬいている。FIG. 2 shows another embodiment of the present invention in which a plurality of products are manufactured from one substrate, each block AI, A2. A3
.. A4 is similar to FIG. 1, and the cutting section 4 passes through each product in common.
以上説明したように本発明は、混成集積回路用基板にお
いて、外部引出し端子接続用電極を相互に電気的接続を
とることによシ混成集積回路の製造工程中での電気的破
壊を防止する効果がある。As explained above, the present invention has the effect of preventing electrical breakdown during the manufacturing process of a hybrid integrated circuit by electrically connecting electrodes for connecting external lead terminals to each other in a hybrid integrated circuit board. There is.
第1図は本発明の一実施例の所要部品搭載済みの平面図
、第2図は第1図の例の複数を一枚の基板に構成した例
の平面図、第3図は従来の混成集積回路用基板に所要部
品を搭載し次状態の平面図である。
1・・・・・・外部引出し端子接続用電極、2・・・用
破壊防止用接続パターン、3,4・・・・・・切断部、
5・・・・・・搭載部品。Fig. 1 is a plan view of an embodiment of the present invention in which the necessary components are mounted, Fig. 2 is a plan view of an example in which a plurality of the examples shown in Fig. 1 are configured on one board, and Fig. 3 is a plan view of a conventional hybrid structure. FIG. 3 is a plan view of the next state after the required components are mounted on the integrated circuit board. 1... Electrode for connecting external lead-out terminals, 2... Connection pattern for preventing destruction, 3, 4... Cutting portion,
5... Installed parts.
Claims (1)
ることを特徴とする混成集積回路用基板。A hybrid integrated circuit board characterized in that all electrodes for connecting external lead terminals are electrically connected.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18634286A JPS6343390A (en) | 1986-08-08 | 1986-08-08 | Hybrid integrated circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18634286A JPS6343390A (en) | 1986-08-08 | 1986-08-08 | Hybrid integrated circuit board |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6343390A true JPS6343390A (en) | 1988-02-24 |
JPH0515318B2 JPH0515318B2 (en) | 1993-03-01 |
Family
ID=16186676
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18634286A Granted JPS6343390A (en) | 1986-08-08 | 1986-08-08 | Hybrid integrated circuit board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6343390A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102686014A (en) * | 2011-02-04 | 2012-09-19 | 株式会社电装 | Electronic control device including interrrupt wire |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5956237A (en) * | 1993-12-24 | 1999-09-21 | Ibiden Co., Ltd. | Primary printed wiring board |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55127096A (en) * | 1979-03-23 | 1980-10-01 | Nippon Electric Co | Method of fabricating printed circuit board |
JPS55173174U (en) * | 1979-05-29 | 1980-12-12 | ||
JPS5630786A (en) * | 1979-08-21 | 1981-03-27 | Fujitsu Ltd | Method of manufacturing printed circuit board |
JPS5843607A (en) * | 1981-09-09 | 1983-03-14 | Hitachi Ltd | Manufacture of surface acoustic wave filter |
JPS598420A (en) * | 1982-07-06 | 1984-01-17 | Citizen Watch Co Ltd | Surface acoustic wave element and its manufacture |
-
1986
- 1986-08-08 JP JP18634286A patent/JPS6343390A/en active Granted
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55127096A (en) * | 1979-03-23 | 1980-10-01 | Nippon Electric Co | Method of fabricating printed circuit board |
JPS55173174U (en) * | 1979-05-29 | 1980-12-12 | ||
JPS5630786A (en) * | 1979-08-21 | 1981-03-27 | Fujitsu Ltd | Method of manufacturing printed circuit board |
JPS5843607A (en) * | 1981-09-09 | 1983-03-14 | Hitachi Ltd | Manufacture of surface acoustic wave filter |
JPS598420A (en) * | 1982-07-06 | 1984-01-17 | Citizen Watch Co Ltd | Surface acoustic wave element and its manufacture |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102686014A (en) * | 2011-02-04 | 2012-09-19 | 株式会社电装 | Electronic control device including interrrupt wire |
Also Published As
Publication number | Publication date |
---|---|
JPH0515318B2 (en) | 1993-03-01 |
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