JPS6341937U - - Google Patents
Info
- Publication number
- JPS6341937U JPS6341937U JP1986134852U JP13485286U JPS6341937U JP S6341937 U JPS6341937 U JP S6341937U JP 1986134852 U JP1986134852 U JP 1986134852U JP 13485286 U JP13485286 U JP 13485286U JP S6341937 U JPS6341937 U JP S6341937U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- converter
- output
- converts
- bit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000001360 synchronised effect Effects 0.000 claims description 6
- 238000001514 detection method Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 2
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/10—Calibration or testing
- H03M1/1009—Calibration
- H03M1/1033—Calibration over the full range of the converter, e.g. for correcting differential non-linearity
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986134852U JPH066630Y2 (ja) | 1986-09-04 | 1986-09-04 | D/aコンバ−タの歪低減回路 |
US07/090,544 US4808998A (en) | 1986-09-04 | 1987-08-28 | Distortion reduction circuit for a D/A converter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986134852U JPH066630Y2 (ja) | 1986-09-04 | 1986-09-04 | D/aコンバ−タの歪低減回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6341937U true JPS6341937U (US08197722-20120612-C00042.png) | 1988-03-19 |
JPH066630Y2 JPH066630Y2 (ja) | 1994-02-16 |
Family
ID=15137976
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1986134852U Expired - Lifetime JPH066630Y2 (ja) | 1986-09-04 | 1986-09-04 | D/aコンバ−タの歪低減回路 |
Country Status (2)
Country | Link |
---|---|
US (1) | US4808998A (US08197722-20120612-C00042.png) |
JP (1) | JPH066630Y2 (US08197722-20120612-C00042.png) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02128522A (ja) * | 1988-11-09 | 1990-05-16 | Nakamichi Corp | デグリッチ回路 |
US5198814A (en) * | 1990-11-28 | 1993-03-30 | Nec Corporation | Digital-to-analog converter with conversion error compensation |
US5684481A (en) * | 1994-03-18 | 1997-11-04 | Analog Devices | Rail-to-rail DAC drive circuit |
USRE38083E1 (en) * | 1994-03-18 | 2003-04-22 | Analog Devices, Inc. | Rail-to-rail DAC drive circuit |
GB2299228B (en) * | 1995-03-13 | 1998-08-05 | Yamamura Churchill Limited | A digital to analogue converter |
JP4416254B2 (ja) * | 2000-02-24 | 2010-02-17 | キヤノン株式会社 | 画像形成装置 |
US6937178B1 (en) | 2003-05-15 | 2005-08-30 | Linear Technology Corporation | Gradient insensitive split-core digital to analog converter |
US8981982B2 (en) * | 2013-04-05 | 2015-03-17 | Maxlinear, Inc. | Multi-zone data converters |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5232657A (en) * | 1975-09-09 | 1977-03-12 | Fujitsu Ltd | Digital-analog converter |
JPS57104320A (en) * | 1980-12-22 | 1982-06-29 | Nec Corp | Digital-analogue converter |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5337365A (en) * | 1976-09-18 | 1978-04-06 | Nippon Telegr & Teleph Corp <Ntt> | Correcting method of d/a converting error for d/a converter |
JPS5953727B2 (ja) * | 1977-04-06 | 1984-12-26 | 株式会社日立製作所 | 補正回路付da変換器 |
US4342983A (en) * | 1980-08-11 | 1982-08-03 | Westinghouse Electric Corp. | Dynamically calibrated successive ranging A/D conversion system and D/A converter for use therein |
US4323885A (en) * | 1980-09-29 | 1982-04-06 | Bell Telephone Laboratories, Incorporated | Noise and crosstalk reduction in mid-riser biased encoders |
-
1986
- 1986-09-04 JP JP1986134852U patent/JPH066630Y2/ja not_active Expired - Lifetime
-
1987
- 1987-08-28 US US07/090,544 patent/US4808998A/en not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5232657A (en) * | 1975-09-09 | 1977-03-12 | Fujitsu Ltd | Digital-analog converter |
JPS57104320A (en) * | 1980-12-22 | 1982-06-29 | Nec Corp | Digital-analogue converter |
Also Published As
Publication number | Publication date |
---|---|
JPH066630Y2 (ja) | 1994-02-16 |
US4808998A (en) | 1989-02-28 |
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