JPS6341937A - Interruption control circuit for microcomputer - Google Patents

Abstract

PURPOSE:To make it possible to generate interruption when processes designated beforehand are executed completely by providing plural flags and generating interruption when all flags are set. CONSTITUTION:A flag 1 and a flag 2 are flags set by execution of an instruction or occurrence of an event (timer interrupt etc.), and an AND circuit 3 drives an interrupt controlling circuit 4 only when both the flag 1 and flag 2 are '1' to make it possible to generate interrupt by the interrupt controlling circuit 4. All flags are cleared by a clear signal 20 by generation of interrupt. For instance, in the case of the sum of two data inputted from outside, two input instructions exist on a program, and an instruction to set the flag 1 or flag 2 is placed just after these input instructions. That is, interrupt is generated when the two data are all present, and an instruction for addition is executed in the interrupt processing.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an interrupt control circuit for a microcomputer.

[Conventional technology]

Conventionally, an interrupt control circuit of a microcomputer performs interrupt processing every time a single event occurs.

[Problem that the invention seeks to solve]

As mentioned above, conventional microcomputers perform interrupt processing every time a single event occurs, so it is inappropriate to perform interrupt processing when multiple events occur due to the burden on the software. .

For example, if we consider a binary operation such as addition or subtraction on two data input from the outside, the binary operation cannot be performed unless the two data are aligned.

In conventional microcomputers, even if one data is input, waiting processing must be performed until the other data is input, which places a heavy burden on the software I/ware and causes a decline in processing performance. Ta.

SUMMARY OF THE INVENTION An object of the present invention is to provide an interrupt control circuit for a microcomputer that can reduce the burden on software and increase processing capacity with a simple circuit.

[Means for solving problems]

The configuration of the interrupt control circuit of the microcomputer according to the present invention is characterized by having a circuit that has a plurality of flags set by the occurrence of various events and generates an interrupt only when all of these flags are set. do.

[Embodiment] FIGS. 1(a) and 1(b) are block diagrams of an interrupt control circuit according to an embodiment of the present invention, where (a) the number of flags is two, and (b) the number of flags. This is an example of expansion when the number increases further.

The operation shown in FIG. 1(a) will be explained.

Flag 1 and flag 2 are flags that are set by the execution of an instruction or the occurrence of an event (such as a timer interrupt). AND circuit 3 indicates that both flag 1 and flag 2 are “°1”.
”, the interrupt control circuit 4 is driven, and the interrupt control circuit 4 can generate an interrupt. Note that the flags are all cleared by the clear signal 20 when an interrupt occurs.

The operation shown in FIG. 1(b) is the same except that the number of flags is increased.

Next, a specific application example will be explained.

Consider the sum of two data input from the outside. In this case, two input instructions have I# in the program, but an instruction to set flag 1 or flag 2 may be placed immediately after these input instructions. In other words, an interrupt is generated when two pieces of data are complete, and ? , it is sufficient to execute the addition instruction in the +1 inclusive processing.

[Effects of the Invention] As explained above, the present invention has a plurality of flags and generates an interrupt when all of the flags are set, thereby generating an interrupt when all pre-specified processes have been executed. It has the effect of causing In particular, in binary operation processing on external input data,
Regardless of the order in which the data arrive, processing can be performed as soon as two sets of data are available, which has a significant effect on reducing the burden on software and improving processing capacity.

[Brief explanation of the drawing]

FIGS. 1(a) and 1(b) are block diagrams of the interrupt control circuits of the first and second embodiments of the present invention. 1.2.5 to 13...Flags, 3...AND circuit,
4. Interrupt control circuit, 17... Interrupt control circuit, 2o...
・Clear signal. 20 '2 rear number (b) 1st entry

Claims (1)

[Claims] 1. An interrupt control circuit for a microcomputer, comprising a circuit that has a plurality of flags that are set by the occurrence of various events, and generates an interrupt only when all of the flags are set.