JPS633977U - - Google Patents

Info

Publication number
JPS633977U
JPS633977U JP9846986U JP9846986U JPS633977U JP S633977 U JPS633977 U JP S633977U JP 9846986 U JP9846986 U JP 9846986U JP 9846986 U JP9846986 U JP 9846986U JP S633977 U JPS633977 U JP S633977U
Authority
JP
Japan
Prior art keywords
semiconductor device
tray
transporting
side wall
convex portion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9846986U
Other languages
Japanese (ja)
Other versions
JPH0627589Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986098469U priority Critical patent/JPH0627589Y2/en
Publication of JPS633977U publication Critical patent/JPS633977U/ja
Application granted granted Critical
Publication of JPH0627589Y2 publication Critical patent/JPH0627589Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Details Of Rigid Or Semi-Rigid Containers (AREA)
  • Packaging Frangible Articles (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本考案の第1の実施例による半導体
装置の平面図、第2図は、第1図の線―に沿
う断面図、第3図は、本考案の第2の実施例によ
る半導体装置の第2図と同様の図、第4図は、本
考案の第3の実施例による半導体装置の第2図と
同様の図である。 1……トレー、2……凹部、3……底部、4…
…凸部、5……支持壁、S……半導体装置、S1
……パツケージ本体、S2……リード。
1 is a plan view of a semiconductor device according to a first embodiment of the present invention, FIG. 2 is a sectional view taken along the line - in FIG. 1, and FIG. 3 is a plan view of a semiconductor device according to a second embodiment of the present invention. FIG. 4 is a diagram similar to FIG. 2 of a semiconductor device, and FIG. 4 is a diagram similar to FIG. 2 of a semiconductor device according to a third embodiment of the present invention. 1...tray, 2...recess, 3...bottom, 4...
... Convex portion, 5... Support wall, S... Semiconductor device, S1
...Package body, S2...Lead.

Claims (1)

【実用新案登録請求の範囲】 (1) トレー表面に凹設して半導体装置を収容す
る凹部を備えた半導体装置の運搬用トレーにおい
て、前記凹部の底部に上方に突出させた凸部を設
けることにより、ほぼ上下方向に延びる側壁を形
成し、この側壁によつて、該トレーの下に置かれ
たトレー内に収容された半導体装置のパツケージ
本体の側面もしくは該パツケージ本体の側面から
延びるリードの根元に接触することにより、前記
凹部内での半導体装置の表面方向の移動を防止す
るようにした半導体装置の運搬用トレー。 (2) 前記凸部が、半導体装置の被嵌合部分より
若干大きい縦横寸法に形成されていることを特徴
とする特許請求の範囲第1項記載の半導体装置の
運搬用トレー。 (3) 前記凸部が、半導体装置のリードの段差部
分に嵌合するように構成されていることを特徴と
する特許請求の範囲第1項または第2項記載の半
導体装置の運搬用トレー。
[Claims for Utility Model Registration] (1) In a tray for transporting semiconductor devices that is provided with a recessed portion on the surface of the tray for accommodating a semiconductor device, a convex portion that protrudes upward is provided at the bottom of the recessed portion. This side wall forms a side wall that extends substantially in the vertical direction, and this side wall allows the base of the lead extending from the side surface of the package body of the semiconductor device housed in the tray placed below the tray or the side surface of the package body to be formed by the side wall. A tray for transporting a semiconductor device, which prevents the semiconductor device from moving in the surface direction within the recess by contacting the recess. (2) The tray for transporting a semiconductor device according to claim 1, wherein the convex portion is formed to have vertical and horizontal dimensions slightly larger than the fitted portion of the semiconductor device. (3) A tray for transporting a semiconductor device according to claim 1 or 2, wherein the convex portion is configured to fit into a stepped portion of a lead of a semiconductor device.
JP1986098469U 1986-06-27 1986-06-27 Tray for transporting semiconductor devices Expired - Lifetime JPH0627589Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986098469U JPH0627589Y2 (en) 1986-06-27 1986-06-27 Tray for transporting semiconductor devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986098469U JPH0627589Y2 (en) 1986-06-27 1986-06-27 Tray for transporting semiconductor devices

Publications (2)

Publication Number Publication Date
JPS633977U true JPS633977U (en) 1988-01-12
JPH0627589Y2 JPH0627589Y2 (en) 1994-07-27

Family

ID=30966428

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986098469U Expired - Lifetime JPH0627589Y2 (en) 1986-06-27 1986-06-27 Tray for transporting semiconductor devices

Country Status (1)

Country Link
JP (1) JPH0627589Y2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6362256A (en) * 1986-09-02 1988-03-18 Matsushita Electronics Corp Conveyor for semiconductor device
CN114291424A (en) * 2020-10-07 2022-04-08 颀邦科技股份有限公司 Storage structure for tape packaging and carrier tray thereof

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6130676U (en) * 1984-07-28 1986-02-24 富士通株式会社 Semiconductor device tray

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6130676U (en) * 1984-07-28 1986-02-24 富士通株式会社 Semiconductor device tray

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6362256A (en) * 1986-09-02 1988-03-18 Matsushita Electronics Corp Conveyor for semiconductor device
CN114291424A (en) * 2020-10-07 2022-04-08 颀邦科技股份有限公司 Storage structure for tape packaging and carrier tray thereof
JP2022061949A (en) * 2020-10-07 2022-04-19 ▲き▼邦科技股▲分▼有限公司 Accommodation device for tape carrier package and carrier thereof
CN114291424B (en) * 2020-10-07 2023-09-01 颀邦科技股份有限公司 Storage structure of coiled tape package and carrying disc thereof
US11792923B2 (en) 2020-10-07 2023-10-17 Chipbond Technology Corporation Storage device for flexible circuit packages and carrier thereof

Also Published As

Publication number Publication date
JPH0627589Y2 (en) 1994-07-27

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