JPS6338901B2 - - Google Patents
Info
- Publication number
- JPS6338901B2 JPS6338901B2 JP56209994A JP20999481A JPS6338901B2 JP S6338901 B2 JPS6338901 B2 JP S6338901B2 JP 56209994 A JP56209994 A JP 56209994A JP 20999481 A JP20999481 A JP 20999481A JP S6338901 B2 JPS6338901 B2 JP S6338901B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- output
- serial
- code
- parallel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
- H04L25/40—Transmitting circuits; Receiving circuits
- H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
- H04L25/4906—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes
Landscapes
- Physics & Mathematics (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Priority Applications (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56209994A JPS58114541A (ja) | 1981-12-28 | 1981-12-28 | 符号変換回路 |
| CA000401079A CA1186763A (en) | 1981-04-20 | 1982-04-15 | Consecutive identical digit suppression system in a digital communication system |
| GB8211095A GB2098432B (en) | 1981-04-20 | 1982-04-16 | Consecutive identical digit suppression system |
| DE3214150A DE3214150C2 (de) | 1981-04-20 | 1982-04-17 | Schaltungsanordnung zum Begrenzen der Anzahl gleicher aufeinanderfolgender Bits in einer Folge von Bits bei einer digitalen Übertragungseinrichtung |
| FR8206678A FR2504327A1 (fr) | 1981-04-20 | 1982-04-19 | Systeme de suppression de chiffres identiques consecutifs d'un systeme de transmission numerique |
| NLAANVRAGE8201608,A NL185969C (nl) | 1981-04-20 | 1982-04-19 | Bit-invoegsysteem voor het vermijden van een teveel aan opeenvolgende identieke bits. |
| US06/369,838 US4502143A (en) | 1981-04-20 | 1982-04-19 | Consecutive identical digit suppression system in a digital communication system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56209994A JPS58114541A (ja) | 1981-12-28 | 1981-12-28 | 符号変換回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58114541A JPS58114541A (ja) | 1983-07-07 |
| JPS6338901B2 true JPS6338901B2 (OSRAM) | 1988-08-02 |
Family
ID=16582093
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56209994A Granted JPS58114541A (ja) | 1981-04-20 | 1981-12-28 | 符号変換回路 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58114541A (OSRAM) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02106245A (ja) * | 1988-10-11 | 1990-04-18 | Matsuura Tekkosho:Kk | ワーク受け渡し装置 |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2593071B2 (ja) * | 1987-03-23 | 1997-03-19 | 日本電信電話株式会社 | 誤り訂正機能を有するバイフエーズ符号伝送方法 |
-
1981
- 1981-12-28 JP JP56209994A patent/JPS58114541A/ja active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02106245A (ja) * | 1988-10-11 | 1990-04-18 | Matsuura Tekkosho:Kk | ワーク受け渡し装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58114541A (ja) | 1983-07-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4584690A (en) | Alternate Mark Invert (AMI) transceiver with switchable detection and digital precompensation | |
| US4818995A (en) | Parallel transmission system | |
| EP0610204B1 (en) | Line code using block inversion for high speed links | |
| US4486739A (en) | Byte oriented DC balanced (0,4) 8B/10B partitioned block transmission code | |
| EP0119004B1 (en) | Ring communications system | |
| US5163092A (en) | Parallel scrambler used in sonet data transmission | |
| KR0177733B1 (ko) | 데이타 전송장치의 클럭동기 회로 | |
| JPH0114738B2 (OSRAM) | ||
| US5185799A (en) | Parallel scrambler used in SONET data transmission | |
| US6496583B1 (en) | Digital data transfer apparatus and method | |
| JPS6338901B2 (OSRAM) | ||
| JP2947074B2 (ja) | フレーム同期検出回路 | |
| Yoshikai et al. | Line code and terminal configuration for very large-capacity optical transmission system | |
| US5636248A (en) | Method and system for regenerating amplitude and timing characteristics of an analog signal | |
| JPS6338900B2 (OSRAM) | ||
| US5430733A (en) | Digital transmission system for multiplexing and demultiplexing signals | |
| JPS6338899B2 (OSRAM) | ||
| CA1205586A (en) | Apparatus for receiving high-speed data in packet form | |
| US4283789A (en) | Data transmission method and devices for practicing said method | |
| Waters | Invited paper Line codes for metallic cable systems | |
| RU2214061C2 (ru) | Устройство для передачи данных | |
| JPH08102763A (ja) | ジッタ測定装置 | |
| KR950004542Y1 (ko) | 서브코드 인터페이스 회로 | |
| JPH0438174B2 (OSRAM) | ||
| Gorshe | Generalized-and efficient techniques for the design of CMI and other encoders |