JPS6338244A - Manufacture of ceramic substrate for semiconductor device and clad material used for the same - Google Patents
Manufacture of ceramic substrate for semiconductor device and clad material used for the sameInfo
- Publication number
- JPS6338244A JPS6338244A JP18288386A JP18288386A JPS6338244A JP S6338244 A JPS6338244 A JP S6338244A JP 18288386 A JP18288386 A JP 18288386A JP 18288386 A JP18288386 A JP 18288386A JP S6338244 A JPS6338244 A JP S6338244A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- alloy
- cladding material
- substrate
- copper
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 54
- 239000000463 material Substances 0.000 title claims abstract description 49
- 239000000919 ceramic Substances 0.000 title claims abstract description 44
- 239000004065 semiconductor Substances 0.000 title claims abstract description 11
- 238000004519 manufacturing process Methods 0.000 title claims description 21
- 239000010949 copper Substances 0.000 claims abstract description 56
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims abstract description 34
- 229910052802 copper Inorganic materials 0.000 claims abstract description 27
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 25
- 229910045601 alloy Inorganic materials 0.000 claims abstract description 12
- 239000000956 alloy Substances 0.000 claims abstract description 12
- 229910021364 Al-Si alloy Inorganic materials 0.000 claims abstract description 11
- 238000005253 cladding Methods 0.000 claims description 42
- 238000003466 welding Methods 0.000 claims description 14
- 229910018125 Al-Si Inorganic materials 0.000 claims 1
- 229910018520 Al—Si Inorganic materials 0.000 claims 1
- 229910000881 Cu alloy Inorganic materials 0.000 claims 1
- 229910001128 Sn alloy Inorganic materials 0.000 claims 1
- 238000000034 method Methods 0.000 abstract description 15
- 229910052751 metal Inorganic materials 0.000 abstract description 12
- 239000002184 metal Substances 0.000 abstract description 12
- 239000004020 conductor Substances 0.000 abstract description 10
- 238000005097 cold rolling Methods 0.000 abstract description 4
- 238000010438 heat treatment Methods 0.000 abstract description 2
- 229910052593 corundum Inorganic materials 0.000 abstract 1
- 229910001845 yogo sapphire Inorganic materials 0.000 abstract 1
- 229910000676 Si alloy Inorganic materials 0.000 description 40
- 238000007747 plating Methods 0.000 description 14
- 230000017525 heat dissipation Effects 0.000 description 8
- 229910000679 solder Inorganic materials 0.000 description 5
- 150000002739 metals Chemical class 0.000 description 4
- 229910052721 tungsten Inorganic materials 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 3
- 238000005304 joining Methods 0.000 description 3
- 229910052750 molybdenum Inorganic materials 0.000 description 3
- 239000000843 powder Substances 0.000 description 3
- 238000005096 rolling process Methods 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 229910001111 Fine metal Inorganic materials 0.000 description 2
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- 229910000831 Steel Inorganic materials 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 238000005219 brazing Methods 0.000 description 2
- 239000000945 filler Substances 0.000 description 2
- 239000010959 steel Substances 0.000 description 2
- 229910001374 Invar Inorganic materials 0.000 description 1
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 229910052770 Uranium Inorganic materials 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 239000010977 jade Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 229910052707 ruthenium Inorganic materials 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
- Ceramic Products (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
【発明の詳細な説明】
〈産業−にの利用分野〉
本発明はアルミナ基板上に導体層あるいは放熱層として
の銅層な有する半導体装置用セラミック基板の製造方法
に関し、特にアルミナ−銅の接合のイΔ頼性が高く、接
合プロセスか簡素化、高率化される半導体装置用セラミ
ック基板の製造方法およびその方法に使用するクラッド
材に関する。[Detailed Description of the Invention] <Field of Industrial Application> The present invention relates to a method of manufacturing a ceramic substrate for a semiconductor device having a copper layer as a conductive layer or a heat dissipation layer on an alumina substrate, and particularly relates to a method of manufacturing a ceramic substrate for a semiconductor device having a copper layer as a conductive layer or a heat dissipation layer on an alumina substrate. The present invention relates to a method of manufacturing a ceramic substrate for a semiconductor device that has high reliability, simplifies the bonding process, and increases the efficiency of the bonding process, and a cladding material used in the method.
〈従来の技術〉
パワーＩＣ、ハイブリッドＩＣでは、素ｆ−組込み用の
基板として耐熱性、熱放散性および機械的強度に優れて
いるセラミック基板が多用されている。このようなセラ
ミック基板の中て厚膜ＩＣと呼ばれるものは、アルミナ
基板上に、通常、銀、パラジウム、ルテニウムなどの金
属微粉末に数組ｈ１％のガラス粉末を添加して、これを
有機剤へ均一分散してなる厚膜導体ベーストを印刷し、
焼結して導体層その他を形成したものである。<Prior Art> In power ICs and hybrid ICs, ceramic substrates, which are excellent in heat resistance, heat dissipation, and mechanical strength, are often used as substrates for incorporating elements. Among such ceramic substrates, what is called a thick film IC is usually made by adding several groups of h1% glass powder to fine metal powders such as silver, palladium, and ruthenium on an alumina substrate, and then using an organic agent. Print a thick film conductor base that is uniformly dispersed in
It is sintered to form a conductor layer and other parts.
また、より一般的に使用されているのは、アルミナＪ、
（板１−にＷ、ＭＯなどの金属微粉末からなる導体ペー
ストを印刷、焼成してＷ、Ｍｏ導体を形成し、このＷ、
Ｍｏ導体にＮｉ、 Ｃｕ、へｕメツキを施したものかあ
る。Also, more commonly used are alumina J,
(A conductive paste made of fine metal powder such as W or MO is printed on plate 1- and fired to form a W or Mo conductor.
There are Mo conductors with Ni, Cu, and U plating applied to them.
第４図はこのようなセラミック基板の−・例を示すもの
で、セラミック基板４の表面には部分的に導体層として
働く銅層１を、裏面には全面放熱層としての銅層１を設
ける。Figure 4 shows an example of such a ceramic substrate, in which a copper layer 1 is provided partially on the front surface of the ceramic substrate 4 to act as a conductive layer, and a copper layer 1 is provided as a heat dissipation layer on the entire surface of the ceramic substrate 4. .
このセラミック基板４の従来の製造法は、アルミナ等の
セラミック基板４の表面および裏面のそれぞれ所定位置
にまずＷ層３を印刷により形成し、このＷ層３−ににメ
ツキによるＮｉ層２を介して無電解メツキによるＣｕ層
１を１００μ〜３００μ施し、さらにこのＣｕメツキ上
にメツキによる旧居２を施′１−ものである。Ｗ層３お
よびＮｉメツキの厚さはそれぞれ数μ〜数１−μの範囲
である。Ｗ層３はＷ層が金属としてはアルミナとの熱膨
４１＋係数の整合性並びに密着性に優れている関係から
設４−Ｊられる。またＮｉメツキはＣ【１のト”地メツ
キおよびＧｏの表面に耐食性を付与するために設けられ
る。The conventional manufacturing method for this ceramic substrate 4 is to first form a W layer 3 by printing at predetermined positions on the front and back surfaces of a ceramic substrate 4 made of alumina or the like, and then to coat this W layer 3 with a Ni layer 2 by plating. Then, a Cu layer 1 of 100 to 300 μm is applied by electroless plating, and a former layer 2 is further applied by plating on this Cu plating. The thickness of the W layer 3 and the Ni plating are each in the range of several micrometers to several 1-micrometers. The W layer 3 is designed 4-J because the W layer, as a metal, has excellent matching with alumina in thermal expansion coefficient of 41+ and adhesion. Further, Ni plating is provided to impart corrosion resistance to the bottom plating of C[1] and the surface of Go.
しかし、このような製造法ではＮｉメツキ、〔：１１メ
ツキ下程に著しく時間を要し、とくに無電解Ｃｕメツキ
下程により１００〜３００μの厚さの６１１メツキを施
すには数時間を要するという大きな問題がある。なお無
電解Ｇｏメツキの方が膜厚の内性に優れているという関
係から採用される。However, with this manufacturing method, it takes a considerable amount of time for Ni plating and [:11 plating, and in particular, it takes several hours to apply 611 plating with a thickness of 100 to 300μ due to electroless Cu plating. There's a big problem. Note that electroless Go plating is adopted because it has better internal film thickness.
一方、最近は金属とセラミックの接合に関して盛んに研
究が行わわており、例えば銀ろう、Ｉｎ−Ｓｉ合金ろう
な介して金属とセラミックを接合することが提案されて
いる。しかしここで提案されている金属とセラミックの
接合は、金属としては鉄系の金属例えば電子部品材料の
分野ではインバーや４２７０イ、また機械構造用材料の
分野では鋼や超硬合金を対象とするものである。篩とセ
ラミックとくにＣｔ＋とアルミナとの接合に関しては実
際に研究された例がなく、不明な点が多い。On the other hand, there has recently been much research into joining metals and ceramics, and it has been proposed, for example, to join metals and ceramics through silver solder or In-Si alloy solder. However, the metal-ceramic bonding proposed here targets iron-based metals such as Invar and 4270I in the field of electronic component materials, and steel and cemented carbide in the field of mechanical structural materials. It is something. There is no actual research on the bonding between sieves and ceramics, especially Ct+ and alumina, and there are many unknown points.
このようなセラミック基板の製造において、Ｗ、Ｍｏ層
を不要にしく；１１のメツキ作業を廃１１−することが
できればその作業性が飛躍的に向トすることは明らかて
あり、このような新しいセラミック基板の製造方法が要
望されている。In the production of such ceramic substrates, it is clear that if the W and Mo layers can be made unnecessary; if the plating work can be eliminated, the workability will be dramatically improved. There is a need for a method of manufacturing a ceramic substrate.
〈発明の目的〉
本発明の［１的は、従来技術における問題点を解決し、
製造プロセスを簡素化し、容易に、がっ短時間でセラミ
ック基板上にＣ１層を１工程で接合することのできる半
導体装置用セラミック基板の製造方法、およびこの方法
に使用するクラッド材を提供せんとするものである。<Objective of the invention> [1] The present invention solves the problems in the prior art,
It is an object of the present invention to provide a method for manufacturing a ceramic substrate for a semiconductor device, which simplifies the manufacturing process and can easily and quickly bond a C1 layer onto a ceramic substrate in one step, and a cladding material used in this method. It is something to do.
〈問題点を解決するだめの手段〉
パワーＩＣ、ハイブリッドＩＣの分野では従来から耐熱
性、熱放散性および機械的強度の面からアルミナのセラ
ミック基板が使用され、さらにその導体層および熱放散
層としてＧｏが使用されているにもかかわらず、このＣ
ｕを箔もしくはシートとして使用し、これを例えば銀ろ
う、 ＋１ＩＪ２−Ｓｉ合金ろうを介してアルミナ基板
上に直接接合したという例がない。<Means to solve the problem> In the field of power ICs and hybrid ICs, alumina ceramic substrates have traditionally been used for their heat resistance, heat dissipation properties, and mechanical strength, and they are also used as conductor layers and heat dissipation layers. Even though Go is used, this C
There is no example of using U as a foil or sheet and directly bonding it to an alumina substrate via, for example, silver solder or +1IJ2-Si alloy solder.
本発明者等は、Ａｆｉ、０．等のセラミック基板と（：
１１板を接合する際に、あらかじめＣ１１板にＡｆｌ
−Ｓｉ合金等のインサート金属を接合し、クラッド材と
しておけば、セラミック板とＧｕ板との接合が効率良く
行えることを知見し、本発明に至った。The inventors have proposed that Afi, 0. With ceramic substrates such as (:
When joining 11 plates, Afl is attached to C11 plate in advance.
It was discovered that the ceramic plate and the Gu plate can be efficiently bonded by bonding an insert metal such as -Si alloy and using it as a cladding material, leading to the present invention.
本発明の第１の態様は、アルミナ基板上に銅層を形成し
て半導体装置用セラミック基板を製造するに際し、予め
、Ｃｕ／ＡＲ−５ｒ合金、Ｃｕ／Ｎｉ／Ａｎ−Ｓｉ合金
、Ｃ１＋／Ｓｎ／ １−Ｓｉ合金の群から選択されたい
ずれかのクラッド材を用意し、該クラッド材のＡｆｆｉ
−Ｓｉ合金側をアルミナ基板側に配置し、アルミナ基板
−にに直接加熱接合して、アルミナ基板にに銅層を形成
することを特徴とする半導体装置用セラミック基板の製
造方法を提供する。A first aspect of the present invention is that when manufacturing a ceramic substrate for a semiconductor device by forming a copper layer on an alumina substrate, Cu/AR-5r alloy, Cu/Ni/An-Si alloy, C1+/Sn / Prepare any cladding material selected from the group of 1-Si alloys, and set the Affi of the cladding material.
Provided is a method for manufacturing a ceramic substrate for a semiconductor device, characterized in that the Si alloy side is placed on the alumina substrate side, the alumina substrate is directly heated and bonded, and a copper layer is formed on the alumina substrate.
本発明の第２の態様は、アルミナ基板上に銅層を形成す
るために用いられるクラッド材であって、Ｃｕ層とへＩ
１．−Ｓｉ合金層が冷間圧接により一体化されているこ
とを特徴とするクラッド材を提供する。A second aspect of the present invention is a cladding material used to form a copper layer on an alumina substrate, the cladding material being an I.
1. - Provides a cladding material characterized in that a Si alloy layer is integrated by cold welding.
本発明の第３の態様は、アルミナ基板上に銅層を形成す
るために用いられるクラッド材であって、Ｃ１１層にに
Ｓｎ層さらにその上にＡＪＺ−Ｓｉ合金層が冷間圧接に
より一体化されていることを特徴とするクラッド材を提
供する。A third aspect of the present invention is a cladding material used to form a copper layer on an alumina substrate, in which a C11 layer, a Sn layer, and an AJZ-Si alloy layer are integrated by cold welding on top of the Sn layer. To provide a cladding material characterized by:
本発明の第４の態様は、アルミナ基板上に銅層を形成す
るために用いられるクラッド材であって、Ｃｕ層ににＮ
ｉ層さらにそのトにＡＭ−Ｓｉ合金層が冷間圧接により
一体化されていることを特徴とするクラッド材を提供す
る。A fourth aspect of the present invention is a cladding material used for forming a copper layer on an alumina substrate, the cladding material including N in the Cu layer.
The present invention provides a cladding material characterized in that an i-layer and an AM-Si alloy layer are integrated with the i-layer by cold welding.
〈発明の構成〉
以ドに図面に示１−好適実施例を用いて、本発明を詳述
′４−る。<Structure of the Invention> The present invention will now be described in detail using preferred embodiments shown in the drawings.
本発明の製造方法は従来ＩＣ等を製造する際に、セラミ
ック基板上に順次設けられてきたへｆｉ−Ｓｉ合金層、
Ｃｈｉ層等をあらかじめクラッド材としておき、このク
ラッド材をセラミック基板にに１丁程で接合することを
特徴とする。The manufacturing method of the present invention employs a fi-Si alloy layer, which has been sequentially provided on a ceramic substrate when manufacturing an IC or the like.
The method is characterized in that a Chi layer or the like is prepared in advance as a cladding material, and the cladding material is bonded to the ceramic substrate in about one step.
セラミック基板上のＣｕ層は片面に設けられてもよいし
、両面に設けられてもよい。The Cu layer on the ceramic substrate may be provided on one side or both sides.
ろう材を介してＣ＋＋とアルミナを接合する場合、ろう
材としてはＣ１１とアルミナの双方に接合しやすいこと
か必要である。実験によると／Ａｌ−Ｓｉ合金はＣｕと
アルミナの双方に接合しやすいことか判明した。しかし
この場合Ｃ１１とＡｌ２−Ｓｉ合金の接合についてみる
と、Ｃｕと へｆｌ−Ｓｉ合金の接合界面には接合温度
が２００℃以１−になると、脆い合金層が形成されやす
くなることも判明した。ＣｕとＡｆｆｉ−Ｓｉ合金層の
接合界面に脆い合金層を形成させないためには接合温度
を低くすれば良いが、そうするとアルミナとへ１−Ｓｉ
合金の接合が著しく困難となる。ＧｕとＡｆｉ−Ｓｉ合
金をｔめ冷間圧接によりクラッド材としておけば、冷間
圧接では（〕１１とＡｆｆｉ−Ｓｉ合金との間に脆い合
金層が形成されることがさけられる。熱間圧接法による
クラッド旧は金属間の熱拡散の問題が生じ好ましくない
。When bonding C++ and alumina via a brazing filler metal, the brazing filler metal must be able to bond easily to both C11 and alumina. According to experiments, it was found that /Al-Si alloy can be easily bonded to both Cu and alumina. However, in this case, when looking at the bonding between C11 and Al2-Si alloy, it was found that a brittle alloy layer is likely to be formed at the bonding interface between Cu and Al2-Si alloy when the bonding temperature is 200℃ or higher. . In order to prevent the formation of a brittle alloy layer at the bonding interface between the Cu and Affi-Si alloy layers, the bonding temperature can be lowered, but in this case, the 1-Si
It becomes extremely difficult to join the alloy. If Gu and Affi-Si alloy are used as cladding materials by cold welding, it is possible to avoid forming a brittle alloy layer between (11) and Affi-Si alloy in cold welding.Hot welding The method of cladding is undesirable because of the problem of heat diffusion between metals.
このようにして得たクラッド材をＡｆｆｉ−Ｓｉ合金を
アルミナ側に向けて配置して加熱接合したところ、クラ
ッド材のＧｏとＡＱ−Ｓｉ合金の界面にほとんど脆い合
金層を形成することなく、１−分な強度をもってクラッ
ド材をアルミナ基板に接合することができた。When the cladding material obtained in this manner was heated and bonded with the Affi-Si alloy facing the alumina side, almost no brittle alloy layer was formed at the interface between the Go cladding material and the AQ-Si alloy. - It was possible to bond the cladding material to the alumina substrate with sufficient strength.
第１図は本発明の第２の態様の（：ｕ／Ａｌ１−Ｓｉ合
金クラッド材を示す断面図である。FIG. 1 is a sectional view showing a u/Al1-Si alloy cladding material according to the second embodiment of the present invention.
Ｃｕ層１はいかなる銅を用いてもよいが、半導体デバイ
スの導体層あるいは放熱層として用いる場合は無酸素銅
か好ましい。Although any copper may be used for the Cu layer 1, oxygen-free copper is preferable when used as a conductor layer or a heat dissipation layer of a semiconductor device.
へｆｆ１−Ｓｉ合金層５は、 １２０３等のセラミック
板との接合の際にセラミックとの接合性が良く熱膨張が
少ないのでインサート金属として作用する。合金中のＳ
ｉの含有率は５〜２０ｗＬ零が好ましい。それはろう接
着を促進し、接合を容易にするために必要な範囲だから
である。When the ff1-Si alloy layer 5 is bonded to a ceramic plate such as 1203, it has good bonding properties with the ceramic and has little thermal expansion, so it acts as an insert metal. S in alloy
The content of i is preferably 5 to 20 wL zero. This is because this is the range necessary to promote solder adhesion and facilitate joining.
Ａｌ１−Ｓｉ合金層５はＣ１１層１上に冷間圧延圧接法
によるクラッド技術を使って接合する。The Al1-Si alloy layer 5 is bonded onto the C11 layer 1 using a cladding technique using cold rolling pressure welding.
圧廷圧接法によるクラッド材の製造は、圧延材の形状や
加圧硬化曲線を勘案した圧延スケジュールや、圧延ロー
ル径などを配慮した圧延条件を適切に選定することが重
要である。In the production of cladding materials using the flat pressure welding method, it is important to appropriately select rolling conditions that take into consideration the rolling schedule, the rolling roll diameter, etc., taking into account the shape of the rolled material and the pressure hardening curve.
Ｃｕ層１とＩｎ−Ｓｉ合金層５のＪｌさは、１：１〜１
０：１が好ましい。The Jl ratio between the Cu layer 1 and the In-Si alloy layer 5 is 1:1 to 1.
0:1 is preferred.
第２図は本発明の第３の態様の（： ｕ ／ Ｓ ｎ
／ＡＱ −Ｓｉ合金用クラッド材を示す断面図である。FIG. 2 shows the third aspect of the invention (: u/S n
/AQ - It is a sectional view showing a cladding material for Si alloy.
Ｃｕ層１トにはＳｎ層６を介してＡｆｆｉ−Ｓｉ合金層
５を接合する。The Affi-Si alloy layer 5 is bonded to the Cu layer 1 via the Sn layer 6.
Ｃｕ層１ＦにＳｎ層６を冷間圧延圧接法によりクラッド
し、その後へｊｌ−Ｓｉ合金層５を接合してもよいし、
Ｓｎ層６とＡｆｆｉ−Ｓｉ合金層５を同時に接合しても
よい。The Cu layer 1F may be clad with the Sn layer 6 by cold rolling welding, and the jl-Si alloy layer 5 may be bonded thereto, or
The Sn layer 6 and the Affi-Si alloy layer 5 may be bonded at the same time.
Ｃｕ層１とＳｎ層６とＡｌ２−Ｓｉ合金層５との厚さは
１：Ｏ，ｌ：１〜１０：１：１とすることが好ましい。The thicknesses of the Cu layer 1, the Sn layer 6, and the Al2-Si alloy layer 5 are preferably 1:O, l:1 to 10:1:1.
Ｃｕ層１とへｎ−Ｓｉ合金層５との間にＳｎ層６を介す
ることにより、セラミックと銅との接合Ｐ１か良いばか
りでなく、銅とＡｆｆｉ−Ｓｉ合金との間の金属的接着
も良好となる。By interposing the Sn layer 6 between the Cu layer 1 and the n-Si alloy layer 5, not only the bond P1 between the ceramic and the copper is improved, but also the metallic adhesion between the copper and the Affi-Si alloy is improved. Becomes good.
また、Ｇｌｉ層１とへｆｉ−Ｓｉ合金層５との間のＳｎ
層６が拡散防１に層として働くのて、アルミナ↓（板と
クラッド材の接合に際し、Ｉ−分加熱しても（： ｕ
／／Ａｌ−Ｓｉ合金間に合金層が形成される恐れが全く
なくなり、加熱温度を上げて接合強度を強くすることが
できる。Furthermore, Sn between the Gli layer 1 and the fi-Si alloy layer 5 is
Since the layer 6 acts as a layer on the diffusion barrier 1, the alumina↓
//There is no possibility that an alloy layer will be formed between the Al-Si alloys, and it is possible to increase the heating temperature and strengthen the bonding strength.
第３図は、本発明の第４の態様のＧｕ／Ｎｉ／ Ａｆｆ
ｉ−Ｓｉ合金クラッド材を示す断面図である。FIG. 3 shows the Gu/Ni/Aff of the fourth aspect of the present invention.
FIG. 2 is a cross-sectional view showing an i-Si alloy cladding material.
Ｇｕ層１ＦにはＮ４層２を介してＡｉＬ−Ｓｉ合金層５
を接合する。AiL-Si alloy layer 5 is provided on the Gu layer 1F via the N4 layer 2.
join.
Ｃｕ層１、Ｎ４層２、 へ辺−Ｓｉ合金層５は、順次あ
るいは五層同時に冷間圧延圧接法によりクラッドとする
。The Cu layer 1, the N4 layer 2, and the edge-Si alloy layer 5 are formed into a cladding by cold rolling welding one after another or all five layers at the same time.
Ｃｕ層１とＮ４層２とへ１−Ｓｉ合金層５との厚さは１
：０．Ｉ：１〜１０：１：１が好ましい。The thickness of Cu layer 1, N4 layer 2, and 1-Si alloy layer 5 is 1
:0. I:1 to 10:1:1 is preferred.
Ｇｕ層１とへｉ−ｓ＋合金層５との間にＮ４層２を介す
ることにより、セラミックと銅との接合性ばかりでなく
、銅とへＱ−Ｓｉ合金との間の金属的接着も良好となる
。By interposing the N4 layer 2 between the Gu layer 1 and the I-S+ alloy layer 5, not only the bonding between the ceramic and the copper but also the metallic adhesion between the copper and the Q-Si alloy is good. becomes.
また、Ｃ１１層１とへｊ！−Ｓｉ合金層５との間のＮ４
層２が拡散防１１一層として働き、アルミナ基板とクラ
ッド材の接合に際し、十分高温で加熱して接合強度をあ
げることができる。Also, C11 layer 1 and hej! -N4 between Si alloy layer 5
Layer 2 acts as one layer of diffusion barrier 11, and when bonding the alumina substrate and cladding material, it can be heated to a sufficiently high temperature to increase the bonding strength.
本発明の製造方法は、以にの本発明の第２、第３、第４
の態様のいずれかのクラッド材をあらかしめ用意し、こ
のクラッド材のＡＱ−Ｓｉ合金側をアルミナ等のセラミ
ック」、（板側に配置し、好ましくはアルゴン等の不活
性ガス雰囲気中で、６００℃〜６５０℃で加熱圧接して
、短時間で接合し、アルミナ基板にに銅層を導体層ある
いは放熱層等として有するｔ導体装置用セラミック基板
を得るものである。The manufacturing method of the present invention includes the second, third, and fourth methods of the present invention.
A cladding material according to any of the embodiments is prepared in advance, and the AQ-Si alloy side of this cladding material is placed on the side of a ceramic plate such as alumina, preferably in an inert gas atmosphere such as argon. The ceramic substrate for a t-conductor device is obtained by heat-pressure welding at a temperature of .degree. C. to 650.degree. C. and bonding in a short period of time to obtain a ceramic substrate for a t-conductor device having a copper layer on an alumina substrate as a conductive layer or a heat dissipation layer.
〈発明の効果〉
本発明の製造方法によれば、従来のセラミック板上への
Ｗ、Ｍｏ層の形成及び金属のめっきプロセスに比べて、
玉梓が省略でき、効率化がはかれるので、大幅なコスト
低減が図れる。<Effects of the Invention> According to the manufacturing method of the present invention, compared to the conventional process of forming W and Mo layers on a ceramic plate and plating metal,
Since the jade can be omitted and efficiency is improved, a significant cost reduction can be achieved.
すなわち、本発明のクラッド材を用いる製造方法により
、短時間で、しかもｌ上程で、セラミック板と銅との接
合ができる。That is, by the manufacturing method using the cladding material of the present invention, the ceramic plate and the copper can be joined in a short time and in about 1 hour.
さらに本発明クラッド材は、あらかしめＣＩＩ材とイン
サート金属間トが強力に接合されているうえに、へα−
Ｓｉ合金とセラミックとの極めて良い接合性が利用でき
るので、このクラッド材を用いて＞ｔ’、導体装置用セ
ラミック基板を製造すれば、セラミック板と鋼材との接
合の信頼性が大幅に向上する。Furthermore, the cladding material of the present invention has a strong bond between the CII material and the insert metal, and also has α-
Since extremely good bonding properties between the Si alloy and the ceramic can be utilized, if >t' is used to manufacture ceramic substrates for conductor devices using this cladding material, the reliability of the bond between the ceramic plate and the steel material will be greatly improved. .
第１図は、本発明の第２の態様のＣｕ／ＡＩＬ−Ｓｉ合
金クラッＦ材の断面図である。
第２図は、本発明の第３の態様のＣｕ／Ｓｎ／ Ａｊｉ
ｔ−Ｓｉ合金クラッド材の断面図である。
第３図は、本発明の第４の態様のＣｕ／Ｎｉ／ へｎ−
Ｓｉ合金クラッド材の断面図である。
第４図は従来のセラミックー銅の接合方法を示す断面図
である。
符号の説明
１・・・・０１１層、２・・・・Ｎｉ層、３・・・・Ｗ
層、４・・・・セラミック基板、FIG. 1 is a cross-sectional view of the Cu/AIL-Si alloy crack F material according to the second embodiment of the present invention. FIG. 2 shows the Cu/Sn/Aji of the third aspect of the present invention.
FIG. 3 is a cross-sectional view of a t-Si alloy cladding material. FIG. 3 shows the Cu/Ni/n-
FIG. 3 is a cross-sectional view of a Si alloy cladding material. FIG. 4 is a sectional view showing a conventional ceramic-copper bonding method. Explanation of symbols 1...011 layer, 2...Ni layer, 3...W
Layer 4...ceramic substrate,
Claims (4)
ラミック基板を製造するに際し、 予め、Ｃｕ／Ａｌ−Ｓｉ合金、Ｃｕ／Ｎｉ／Ａｌ−Ｓｉ
合金、Ｃｕ／Ｓｎ／Ａｌ−Ｓｉ合金の群から選択された
いずれかのクラッド材を用意し、 該クラッド材のＡｌ−Ｓｉ合金側をアルミナ基板側に配
置し、アルミナ基板上に直接加熱接合して、アルミナ基
板上に銅層を形成することを特徴とする半導体装置用セ
ラミック基板の製造方法。(1) When manufacturing a ceramic substrate for semiconductor devices by forming a copper layer on an alumina substrate, Cu/Al-Si alloy, Cu/Ni/Al-Si
A cladding material selected from the group of alloys, Cu/Sn/Al-Si alloys is prepared, the Al-Si alloy side of the cladding material is placed on the alumina substrate side, and the cladding material is directly heat-bonded onto the alumina substrate. A method of manufacturing a ceramic substrate for a semiconductor device, comprising forming a copper layer on an alumina substrate.
るクラッド材であって、Ｃｕ層とＡｌ−Ｓｉ合金層が冷
間圧接により一体化されていることを特徴とするクラッ
ド材。(2) A cladding material used for forming a copper layer on an alumina substrate, characterized in that a Cu layer and an Al-Si alloy layer are integrated by cold pressure welding.
るクラッド材であって、Ｃｕ層上にＳｎ層さらにその上
にＡｌ−Ｓｉ合金層が冷間圧接により一体化されている
ことを特徴とするクラッド材。(3) A cladding material used to form a copper layer on an alumina substrate, characterized in that a Sn layer is formed on the Cu layer, and an Al-Si alloy layer is integrated thereon by cold welding. cladding material.
るクラッド材であって、Ｃｕ層上にＮｉ層さらにその上
にＡｌ−Ｓｉ合金層が冷間圧接により一体化されている
ことを特徴とするクラッド材。(4) A cladding material used to form a copper layer on an alumina substrate, characterized in that a Ni layer is formed on the Cu layer, and an Al-Si alloy layer is integrated thereon by cold welding. cladding material.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18288386A JPS6338244A (en) | 1986-08-04 | 1986-08-04 | Manufacture of ceramic substrate for semiconductor device and clad material used for the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18288386A JPS6338244A (en) | 1986-08-04 | 1986-08-04 | Manufacture of ceramic substrate for semiconductor device and clad material used for the same |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6338244A true JPS6338244A (en) | 1988-02-18 |
Family
ID=16126077
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18288386A Pending JPS6338244A (en) | 1986-08-04 | 1986-08-04 | Manufacture of ceramic substrate for semiconductor device and clad material used for the same |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6338244A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001010874A (en) * | 1999-03-27 | 2001-01-16 | Nippon Hybrid Technologies Kk | Production of composite material of inorganic material with metal containing aluminum and product related to the same |
| JP2001168482A (en) * | 1999-09-28 | 2001-06-22 | Toshiba Corp | Ceramics circuit substrate |
| CN1082237C (en) * | 1996-08-27 | 2002-04-03 | 欧姆龙株式会社 | Micro-relay and method for manufacturing the same |
| JP2014072364A (en) * | 2012-09-28 | 2014-04-21 | Mitsubishi Materials Corp | Power module substrate and manufacturing method thereof |
| WO2014086950A1 (en) * | 2012-12-07 | 2014-06-12 | Ixys Semiconductor Gmbh | Process for producing substrates for semiconductor components |
-
1986
- 1986-08-04 JP JP18288386A patent/JPS6338244A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1082237C (en) * | 1996-08-27 | 2002-04-03 | 欧姆龙株式会社 | Micro-relay and method for manufacturing the same |
| JP2001010874A (en) * | 1999-03-27 | 2001-01-16 | Nippon Hybrid Technologies Kk | Production of composite material of inorganic material with metal containing aluminum and product related to the same |
| JP2001168482A (en) * | 1999-09-28 | 2001-06-22 | Toshiba Corp | Ceramics circuit substrate |
| JP2010103570A (en) * | 1999-09-28 | 2010-05-06 | Toshiba Corp | Ceramic circuit board |
| JP4649027B2 (en) * | 1999-09-28 | 2011-03-09 | 株式会社東芝 | Ceramic circuit board |
| JP2014072364A (en) * | 2012-09-28 | 2014-04-21 | Mitsubishi Materials Corp | Power module substrate and manufacturing method thereof |
| WO2014086950A1 (en) * | 2012-12-07 | 2014-06-12 | Ixys Semiconductor Gmbh | Process for producing substrates for semiconductor components |
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