JPS6334A - High-speed labelling - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

Detailed Description of the Invention (Industrial Field of Application) The present invention relates to labeling in binary image processing (labeling an area surrounded by continuous border lines (hereinafter referred to as "connected components")). In particular, it relates to a method capable of high-speed processing.

<Prior art> Recent image processing involves creating a binary screen from an image taken with a photograph or television camera, etc. to determine the shape and number of sampled bacteria, the size and number of dust in the air, etc. There is a field in which the attributes of connected components included in a screen are examined, and the number of components corresponding to each attribute is determined.

In such cases, numbers or symbols are assigned to each connected component for convenience of processing. Adding this number or symbol is called labeling.

Although several techniques are used for labeling, a general technique will be explained. , in the two-residue screen, the part with the connected component takes Ill, and the background: 0. To check this existence, as shown in Figure 5; scan the two screens and propagate the first detected pixel. Processing is performed to determine the connected component l as shown in B.

Here, the propagation process is to attach the same label to the 8 neighboring pixels (fo to fv) of the center pixel r8 that initially becomes 1 (fo to fv) as shown in FIG. By attaching the same label to the eight neighbors of the labeled pixel and repeating this operation, it becomes as if the pixels taking the value of 1 are propagated one after another from the point where it first became 1. Say something. When connected component 1 is determined, as shown in Figure 0, connected component 1 is removed and scanning is performed from the point where the connected component first became 1, connected component 2 is determined in the same way, and so on. and determine the connected components. According to such a method, the number of times of scanning and propagation processing is equal to the number of connected components, and the processing takes a long time. Further, although such processing is performed using a computer and software, the processing content is variable and the number of steps is large, which also causes a long processing time.

<Problems to be solved by the invention> As mentioned above, general labeling requires repeated scanning for the number of connected components, and propagation processing is performed by software, which takes a long time. However, there is a problem in that it takes too much time for applications that require results to be produced in real time. Therefore, an object of the present invention is to speed up labeling processing and shorten image processing time.

Means and Effects for Solving the Problems In the present invention, all labeling is performed by logic circuits to increase speed, and scanning is performed in the forward and reverse directions so that labeling is completed with a small number of scans. ing. The first forward scan labels the connected components of the entire screen. However, with only this scanning, even if the same connected component is branched, the branched parts are labeled differently, so scanning in the opposite direction: Thus, the labeling within the same connected component is replaced with the same labeling. Perform the correction. If correction cannot be made by scanning in the reverse direction, further scanning is performed, and when the correction is no longer possible, labeling is completed.

The labeling processing circuit uses 8 neighboring or 4
Data is read into a pipeline register that can monitor neighboring pixels, and a labeling calculation circuit performs necessary labeling on the data, which is controlled by a high-speed processing processor.

Here, when propagation processing is performed using eight neighboring pixels, connected components that have good continuity but are in contact cannot be separated and are recognized as an integrated connected component.

- On the other hand, when using four neighbors, the separability is improved.

The image memory includes three types of memories: a binarized original image, a display indicating whether labeling has been completed, and a labeling number. For the screen size M columns and N rows, three pipeline registers with a length of (M-3) pixels are prepared, one latch for three pixels is connected to each row, and the register and latch are connected. By connecting the pairs in series, it is possible to extract eight neighboring data for the central pixel on the latch. When the value of the center pixel is 0, that is, the background, processing is moved to the next pixel. When the value of the center pixel is 1, that is, there is image information, propagation processing is performed. The propagation process examines label numbers in the 8 neighborhood, and if there is a number smaller than the center label number, it is replaced with that smaller number. Since the labeling number is initially set to the maximum for the entire screen (999 if it is 3 digits), pixels with image information are automatically replaced with surrounding numbers. If the value of the center pixel is 1 and the number is not replaced with the number in the 8 neighborhood, either the number is the same as the 8 neighborhood, the image in the 8 neighborhood is 0, that is, the background, or no number is added (state of 999). It's time. If the number is the same as the 8 neighbors, it means that labeling has already been completed. 8 If the numbers are compared with the neighboring pixels and the pixel is not replaced and the center pixel is not labeled (it can be determined whether it has been labeled or not by checking the label complete flag), a new label number is assigned.

Figure 1: This shows the over-elaboration of labeling.

As mentioned earlier, branch-like parts do not fall within the 8-neighborhood range on one scanning line, so in figure (2) of forward scanning, the same connected component is labeled differently. , In figure (3) of backward scanning, different labels within the connected components are replaced with lower numbers. (4)
If the figure is further scanned in the forward direction, it is confirmed that the propagation has ended, that is, that the same labeling is performed within the connected components, so (5) the missing numbers in the figure are corrected and the labeling is completed.

<Example> Next, a detailed explanation will be given using the block diagram of the labeling circuit shown in FIG. 2 and the flowchart shown in FIG. 2 showing the order of labeling. The display in parentheses indicates the name of each step in the flowchart.

In FIG. 2, l denotes an image memory, which stores the binarized original image data D7, and data LF indicating whether labeling is completed or not.

A memory that stores the labeling number, and a memory N that stores the labeling number. Contains. The number of pixels is M columns and N rows, and the writing and reading addresses are controlled by the image memory control counter FCN, 5. 2) In order to extract the data of the center pixel and 8 neighboring pixels, the length is M-3) Pixel shift registers 6, 7, 8 and latches 9 to 17 for one pixel are arranged in a pipeline shape as shown in the figure. They are connected in series, and each latch stores data in an adjacent 3×3 matrix (three columns and three rows). The data of each pixel is f, -f for simplicity.

However, as shown at the top, each data includes the binarized original image data D9, the data LP indicating whether labeling has been completed, and the labeling number N7. There is. D7 and LP are input to the high-speed processor 4 via 22 and 23, respectively, and N7
is manually input to the labeling calculation circuit 3 at the next stage. As shown in FIG. 4, by outputting the image memory data from the shift register 6 starting from pixel number (00) and manually inputting it to the original memory from the latch 17, forward scanning is achieved, and (IJ
If the output is output from N), reverse scanning will be performed.

Before the labeling process, LF is set to 0, N, . To perform labeling, first enter label counter L8L-(:N, 41 to N cIIEsE
Initialize T and 43 manually (label count initialization).

Next, the screen change flag 48 is turned off by manually inputting FFR2 to the flip-flop FF3, and the screen memory control counter FCN,5 is initialized (scanning start initialization). Next, a shift clock 5FtJl is applied to the shift register 6, and the data from the screen memory 1 is shifted by one pixel to the shift register 6 (one pixel shift). Next, the count of screen memory control counter FCN, 5 is incremented by one (image memo 1JRADR+1). After that, repeat this operation until 3
Continue until rows of data are input into the register (FCN
(2,2). Here, human power to the image memo 91 is enabled (image memo 1JWADR=0). From here, pixel-related processing begins, and first the flip-flop FF2.50 is
FRI, 53 is added and reset, and the pre-labeling processing 51 is initialized (image correspondence initialization).

Next, when the center pixel of the 3×3 matrix is located at an arbitrary position on the screen, the computer detects whether the center pixel D8 is 1 or 0 for labeling (data arrival).

When it is O, it is the background, so the shift clock 5FCK1.
20 moves the center to the next pixel (1 pixel shift memory 1νRITε). When it is 1, there is information, so propagation processing is performed (propagation processing).

The propagation process is performed as follows. First, the N7 selection 40 signal is input to the flip-flop FF1.36, the selector 33 is switched to N, and the label number selector 25 is set to select N8 by the counter CN28. NL mouth ^Di, 38
, and input the label number N of the center pixel. Next, by adding n=n+1.29 to the counter 281, N0 to N are successively added to the comparator 31 and compared with N stored in the label latch 32. The AND gate 34 has an N value alternately with the counter 28.
Since LOAD2.37 is added, any label number other than 0 and smaller than N6 becomes conductive, and a gate 2.37 appears at the clock terminal LPl of the label latch 32 via the OR gate 35. ,N,
is the small label number above; two-substituted Waro C label update). The label number is the maximum label number N
, IAx+l, so it is automatically replaced with a surrounding number other than 0. As the AND gate 34 becomes conductive, the propagation signal TP is generated, so the flip-flop FF2 is set via the OR gate, and the labeling flag 51 is turned on.

When Ns is 1 and is not replaced with any number from N0 to N, the label number of Ns is the same as the bell number in the 8 neighborhood, or the pixels in the 8 neighborhood have no label number. be. This means that when LF8 is checked, if it is 1, labeling is complete, and if it is 0, labeling has not been performed, and a new label number is given from the labeling counter 41. This operation is a flip-flop FF
This is done by setting I, 36 by N0 selection 39, applying NC=NC+1 manual force 42 to labeling counter 41, and adding NLOADI, 3g to label latch 32. Konoto, Ki, New SET 5
FF2.50 is set by 2, and the labeling flag 51 is set to 1.

FF3.47'=Y, if FF2.50 is set by forward or reverse operation, FF3.47 is set and the screen change flag 48 is turned on. This screen change flag 48 indicates that propagation has been performed or that a new label has been attached to even one pixel.As long as this flag is set, labeling has not finished, so forward scanning and backward scanning Repeat these steps alternately until labeling is completed.

FF2.50 is used as a labeling flag 51 that indicates whether the label has been updated for each pixel, and if this flag is on, the center pixel selector SL1.
18, the label latch output is selected, and by inputting 2.21 to the shift clock SFC, N8 and labeling complete flag LF+=1 are set to f, which becomes a new number.

In this way, the new number Nw and the label complete flag LF
After n is set to f8, FF2.50 is set to FF
By resetting with R1,53, the selector SLI,18 selects fco, so by adding the shift clock 5FCK1.20, the data of the next pixel moves to the center, and the information of f8 is changed to "4". Move.

This shift operation is repeated, and the labeled number returns to the image memory via shift register 8, latches 15, 16, and 17 (1 screen shift memory ■R1 block ε)
.

The end point of forward or reverse scanning can be determined by the screen end signal output from the image memory control counter 5 (end of one screen).

Whether a label has been set or not is determined by the FF before the start of scanning.
If FF3.47 is reset by R2, 49, when even one pixel of label propagation or new label registration is performed, FF3.47 will be set and the screen change flag will be turned on, so the screen change flag will be set after scanning is completed. 4
You can find out by looking up 8 (with label setting). If no label is set, labeling has ended, and the missing number labels are corrected (missing number label serial number correction), and the labeling ends. When a label is set, the previous scan is repeated until the screen change flag is no longer turned on.

In this way, by the first scan in the 1-axis direction, labeling of the entire screen is performed for connected components I of any shape, and from the second scan, only the 1-line dissemination process is performed such that lj :'; It will be done. This process is completed by simply adding n=n+l to CN, , =7 for the data D, ,=1 of [8, pixel N.-N71 in the vicinity of 8, and moving to NLO8D. Therefore, the processing time becomes even shorter.

The labeling arithmetic circuit can be used as is even if the neighboring points of the center pixel are 4 neighboring points other than the 8 neighboring points described above in the embodiment. It is also possible to make changes such as setting a regular hexagonal range. Further, the same function can be provided even if the pipeline circuit is partially changed.

Furthermore, the labeling calculation circuit is not limited to the above embodiment. Further, in the above embodiment, the labeling circuit is entirely composed of logic circuits, but the negative part may be composed of software.

Effects> As explained above, according to the present invention, there is no need to repeat scanning and propagation processing for each connected component, and labeling can be completed with several scans, so the required time can be significantly reduced. , and since they are all constructed from logic circuits, the processing time can be further shortened, and the overall effect is truly great.

Its range of applications is wide, and it can be applied to labeling any image, regardless of the size or shape of connected components. ”

[Brief explanation of the drawing]

FIG. 1 is a drawing showing the labeling process in a connected component with a branch-like part, FIG. 2 is a block diagram of the labeling circuit, and FIG. 3 is a flowchart showing the labeling process.
Figure 4 is an explanatory diagram of forward scanning and reverse scanning, and Figure 5 is 3
An explanatory diagram of the X3 matrix, FIG. 6 is an explanatory diagram of the prior art. - Image memory, 23x3 matrix, 3 Labeling operation circuit, 4- Processor for high-speed processing, 5 Image memory control counter, 6.7.8 Shift register with length M-1), 9 to 17 Latch, 18 Selection SLI, 22
Presence or absence of center pixel, 23 Labeling complete LF, 2
4 Label Linda number N,,,25 Selector,
28 counter, 31 comparator Cpl. 32 label latch, 33 selector, 34 anime), 35 or gate, 36 flip 70
Tube FF1.41 Labeling counter, 47 Flip-flop FF2.48 Screen change flag, 50
Flip Flotub FF 3.51 Labeling Flag Patent Applicant Ikegami Tsushinki Co., Ltd. Procedural Amendment (Method) September 1985 228 1. Indication of the Case 1985 Patent Application No. 140285 2. Name of the Invention High Speed Labeling Flag Person making the amendment Related to the case Patent applicant Ikegami Tsushinki Co., Ltd. 5, interpretation of the drawing dated the amendment order (no change in content)

Claims (1)

[Scope of Claims] 1. An image memory, means for extracting pixel data of a center pixel and its vicinity from the image memory, and calculating a labeling number of each connected component from the extracted data in a first forward scan. and means for replacing different labeling numbers in each connected component with the same labeling number by second and subsequent backward scans or forward scans;
and means for verifying whether labeling is completed. 2. High-speed labeling according to claim 1, wherein the image memory stores data of a binarized image, data indicating the completion of labeling of each image, and data indicating the labeling number of each pixel. 3. High-speed labeling according to claims 1 and 2 using 8 neighbors as neighboring points for propagation processing. 4. High-speed labeling according to claims 1 and 2 using four neighbors as neighboring points for propagation processing.