JPH01302475A - Labeling system for image data - Google Patents

Abstract

PURPOSE:To reduce the size of a circuit and to simplify the circuit by obtaining the connecting relation of labels only by checking the dimensional relation between an objective picture element and a label positioned on the upper right and the existence of a picture element just above the objective picture element. CONSTITUTION:A connecting relation detecting part 13 checks the connecting relation of a different label with an inputted binary image by using a connecting relation detecting mask and stores the checked result in a connection table 14 and a label updating part 15 updates a label on the basis of the stored information. In case of detecting the connecting relation, the connecting relation of a different label connected to an image labeled by an initial labeling part 12 is detected by using the connecting relation detecting mask 200. In a detecting rule, the label of an objective picture element is set up as X and information detected based upon the demensional relation with a label D positioned on the upper right of the label X is written in a table RAM 14. The RAM 14 is constituted of an one-dimensional array memory to substitute the smaller label for the larger label out of the label of the objective picture element and the label positioned on the upper right. Or, the RAM 14 execute substitution vice versa.

Description

[Detailed description of the invention] Table of contents Overview ・ ・ ・ ・ ・ ・ ・ ・ ・
・ ・ ・ 3 pages Industrial application fields ・・・・・・・
・Page 4: Prior art ・・・Page 5: Problem to be solved by the invention ・Page 9: Means for solving the problem ・・Page 12: Effects ・・
・ ・ ・ ・ ・ ・ ・ ・ ・ ・ 13 pages actual
Example ・ ・ ・ ・ ・ ・ ・ ・ ・
・ ・ Page 14 Effects of the invention ・・・・・・・・・・・・2
Page 8 Overview Regarding the image data labeling method, the purpose is to provide an image data labeling method that can perform initial labeling, connection relationship detection, and labeling update at video rates, and has a simple circuit configuration. For the binary image data 5Ill of pixels arranged in +J hook shape, an initial labeled mask is defined to detect the connection of adjacent image data along the data processing direction with the pixel of interest as a reference. an initial labeling means for labeling connected image data along the data processing direction with the same label; It detects whether a pixel delayed by one line is labeled or not, and also applies a connection relationship detection mask defined to detect connection relationships to pixels delayed by one line/one clock. a connection relationship detection means for detecting a connection relationship between the labels, a connection table for storing connection information of the labels, and a connection relationship detection means for updating the label based on the connection table when a new connection relationship is detected by the connection relationship detection means. label updating means, wherein the initial labeling means, the connection relationship detection means and the label update means operate at video rate, and the connection relationship detection means and the label update means are operated at a video rate until no new connection relationships are detected. Configure it to operate repeatedly.

INDUSTRIAL APPLICATION FIELD The present invention relates to a labeling method for image data, that is, a labeling method for assigning individual numbers to connected regions in an image.

Image labeling processing is performed, for example, when classifying and measuring particles such as cell particles, when automatically performing an IC pattern inspection based on image data obtained by scanning an IC pattern,
Or when automatically inspecting the magnetic disk surface for paint leakage based on image data scanned on the magnetic disk surface, etc.
Used for image data processing.

Image data labeling involves detecting clusters or continuity of image data distributed on an image plane, and assigning a number (labeling) to each cluster of image patterns. By using data labeled in this way, it becomes possible to pattern (label) a chunk of original image data and perform inspection of the image data effectively and quickly.

2. Description of the Related Art Conventional labeling methods include a repetition type labeling method and a clustering type labeling method.

The repetitive labeling method will be explained with reference to FIGS. 17(a) to 17(a). First, as shown in FIG. Initial labeling is performed by operating the arranged data (parts with data are indicated by * marks) in the A direction.In other words, the first * mark in the - line is first labeled "1", and the Add "2" to the second * mark that is far away. Since the * mark in the next second row is not continuous in the operation direction, add "3". The data in the next column is the same as the first row above. Since it is continuous with the data labeled "1°" in the same column, it is labeled "1".The data in the third to fifth columns in the same row are labeled "1", respectively. Since it is continuous, it is also labeled as "l". By performing labeling in the same manner thereafter, an initial labeling result as shown in FIG. 17(b) is obtained.

Next, in the B direction, which is 90° shifted from the A direction in FIG. 17(a), continuity is checked for those that are adjacent to the direction of travel and have already been processed, and the
Update the initial labeling results obtained. For example, the label “6” in the second column and fourth row from the right is continuous with the preceding label “4” in the first column and fourth row from the right, so the smaller label number “ 4"
will be updated. The label "6" in the fifth row of the second column from the right is updated to '4' because it is continuous with the label updated to '4' in the row above.Other labels '5', ' 3
" are similarly updated to "1". The result is shown in FIG. 17 (C). In this label update, the labels are updated only from large numbers to small numbers. There is.

Furthermore, when a continuity check is performed in the C direction of FIG. 17(a), the label is updated as shown in FIG. 17(6),
Similarly, the label for the D direction is updated as shown in FIG. 17(e). As a result, the turn in FIG. 17(a) is labeled into two patterns, "1" and "4'.

As explained above, the iterative labeling method
The continuity of the image data array shown in Figure 7 (a) is checked by sequentially changing the direction by 90 degrees.As the direction changes in this way, the address for accessing the image memory must be complicated. This has to be generated by calculation, which poses a problem in that the address generation circuit for the pixel of interest and pixels adjacent thereto becomes extremely complex.

Next, a clustering type labeling method will be explained.

In this method, as shown in FIG. 18, in the initial labeling and connection relationship detection section 91,
Initial labeling and detection of label connection relationships are performed simultaneously. Next, the connection relation organizing section 92 organizes the connection relations of the overlapping labels. The clustering unit 93 classifies the initial labels based on the organized connection relationships,
Detect all initial labels belonging to each region. Finally, the label updating unit 94 updates the initial label based on the results of clustering.

In this clustering-type labeling method, if the processing of the connection relation organizing section 92 and the clustering section 93 is processed by software, it will take a very long time, and real-time processing cannot be realized. On the other hand, when it is implemented using hardware, it requires a large amount of memory, and has drawbacks such as a complicated circuit configuration due to complicated processing and an increase in scale.

In terms of image processing, it is preferable that the above labeling be performed in real time in synchronization with the video rate of the image processing device, but in any of the above cases, it takes time and the processing becomes complicated. There was a problem that it could not be processed at the video rate.

Therefore, the present inventors first proposed a labeling method for image data that solved these problems (Japanese Patent Application No. 62-15
No. 0298). In this prior invention, connection relationship information between the label of the pixel of interest X and its surrounding four labels C, D, G, and H is used during connection relationship detection processing.

Problems to be Solved by the Invention In the prior invention described above, processing is required to detect the minimum value of the labels of the surrounding four pixels. Therefore, in order to realize the connection relationship detection process using the prior invention method in hardware, a line buffer for two lines is required to obtain the pixel of interest and the pixels one line above and one line below it, and the label There is a problem that the circuit configuration for selecting the minimum value becomes complicated.

Furthermore, in processing an image 95a having an upward slope to the right as shown in FIG. The problem is that it is necessary and inefficient.

The processing process of the prior invention will be explained based on FIG. When a connection is detected for image 95a, a connection is detected with label 2.3.4, so the contents of address 2.3.4 in connection table 96a are updated with "1", "2", and "3", respectively. do. When the image 95a is updated based on this updated connection table 96a, it becomes an image 95b. When the connection relationship in the image 95b is detected, a connection is detected at label 2.3, so a connection table 96b in which the contents of addresses 2 and 3 are updated is obtained. This connection table 9
When image 95b is updated based on image 6b, image 95C is obtained. Furthermore, when a connection relationship is detected for image 95C, a connection is detected in label 2, so the content of address 2 in the connection table is updated with "1", and connection table 9 is updated.
6C is obtained. In this case, the connection table 96b
Since the content of address 2 in the connection table is "1", the content of address 2 in the connection table does not change.

Next, when the image 95C is updated based on the connection table 96C, an image 95d is obtained. When the connection relation is detected for the image 95d, since no connection is detected, the labeling ends.

As described above, the labeling method of the prior invention has a problem in that the efficiency may be extremely poor depending on the content of the image on the screen memory.

The present invention has been made in view of these points, and its purpose is to enable initial labeling, connection relationship detection, and labeling update to operate at video rates;
Another object of the present invention is to provide an image data labeling method with a simple circuit configuration.

Means to solve problems FIG. 1 shows a block diagram of the principle of the present invention.

As shown in FIG. 1, for binary image data 5i11 of pixels arranged in a two-dimensional matrix, connections between adjacent image data are detected along the data processing direction with the pixel of interest as a reference. An initial labeling means 1 applies a prescribed initial labeling mask 100 to label connected image data along the data processing direction with the same label, and the image data labeled by the initial labeling means 1, It is specified that, based on the pixel of interest, it is detected whether or not the adjacent pixels delayed by one line are labeled, and the connection relationship is detected for the pixels delayed by one line/one clock. A connection relationship detection means 2 is provided which applies a connection relationship detection mask 200 and detects connection relationships between different adjacent labels.

Furthermore, a connection table 3 that stores label connection information;
When a new connection relation is detected by the connection relation detection means 2, a label updating means 4 is provided to update the label based on the connection table 3.

The initial labeling means 1 tentatively labels the input binary image using the initial labeling mask 100 .

The connection relationship detection means 2 uses the connection relationship detection mask 200 to check the connection relationships of different labels and stores this information in the connection table 3. Based on this information, the label updating means 4 updates the label.

The label conversion rule when detecting a connection relationship detects whether a pixel that is one line behind the pixel of interest is labeled or not, and if it is labeled, no processing is performed and the pixel is not labeled. In this case, perform the following processing. In other words, the label of the pixel of interest and the pixel on its upper right (
TBL[
max (Lx, Lo) ]4-TBL [m
in (L, .

L, )] or TBL [min (L, .

LIll) ] ”-TBL [ma X (Lx
, Lo)] and update the label of the image data based on this connection tape. The connection relationship detection means 2 and the label updating means 4 are repeatedly operated in conjunction with the connection relationship detection means 2 until no connection is detected. Initial labeling means 1
, the connection relationship detecting means 2 and the label updating means 4 operate in synchronization with the video rate.

EXAMPLES The present invention will be explained in detail below based on examples shown in the drawings.

FIG. 2 is a block diagram of an embodiment of the present invention, and the labeling circuit 10 includes a manual selector 11 and an initial labeling section 1 that performs initial labeling on input binary surface image data.
2, and a connection relationship detection unit 13 that detects an adjacency relationship between adjacent different labels in labeled image data.
and a connection table 14 that stores label connection information.
A label updating unit 15 that updates the label based on the connection table 14 when a new connection is detected, and an output selector 1
It consists of 6.

20 is an image memory for storing image data, and 21 is a computer that manually inputs a processing selection signal synchronized with the video rate to the labeling circuit 10. When the processing selection signal is input, the input selector 11 selects any one of the initial labeling section 12, the connection relationship detection section 13, or the label updating section 15, and operates these on the video tray (33m5). By inputting a connection detection theory switching signal to the connection relationship detection unit 13, the connection detection theory can be switched to a more efficient theory.

The image data in the image memory 20 to be labeled is arranged in a matrix in correspondence with pixels, as shown in FIG. Image data is input to the unit 15 from this image memory 20 via the input selector 11, and the image data is Dz, D+□, . . . l D, .
,,□, D,,, D2□.

...+DiJ+ ...+ D! +2+s12 are input in this order. The output data is also output to the image memory 20 in the same order via the output selector 16.

As shown in FIG. 4, the initial labeling mask 100 is applied to the pixel of interest X, for example, data 02H in FIG. Initial labeled pixels A, B
, C, D image data D2+1 DIll DI
2. This detects the connection relationship with respect to DI3.

First, the initial labeling operation of the embodiment shown in FIG. 2 will be explained.

The initial labeling section 12 applies the initial labeling mask shown in FIG. 4 to the input binary image data to perform provisional labeling. Input data is expressed in 1 bit,
The presence of a pixel is set as "1", the absence of a pixel is set as "0", and the output label data is expressed in n bits. In this embodiment, a label is expressed in 16 bits, and the most significant bit is used as a label presence/absence flag. Therefore, the label value is 8001(+5)−
FFFF (IlB) (no label, no pixel) to 00
Expressed as 00 (16).

The arithmetic logic table for the initial labeling mask 100 is shown in FIG. This arithmetic logic outputs the label "0" if there is no input pixel
is output, and then the label L is updated by +1 (Fig. 5 Priority 2
). At this time, the label "1" becomes 800f (+e) when output to the image memory. If there is data in the pixel of interest X and a label in the masks A to D, the first label value found in the order of AB→C→D is output according to the logic shown in FIG.

FIG. 6 shows an embodiment of an initial labeling circuit that implements the above processing using hardware.

In the initial labeling circuit of FIG. 6, 30 to 33 are flip-flops, 34 is an AND gate, and 35 to 38 are N
An A N D gate, 39 a counter, 40 a selector, and 41 an n-2 stage line buffer are connected as shown in the figure.

First, if the input data X is "0", the selector 40 outputs "0" as the output data. This output data
Let A be the initial labeling mask at the time when the signal passes through the flip-flop 31. The data to the image memory 20 is passed through the n-2 stage line buffer 41, and
The output of the D1 flip-flop 32 is the clock-delayed data, and the output of the 01 flip-flop 33 is B, and these data A, B, C, and D are input to the selector 40.

This results in A of the initial labeling mask 100.

Obtain B, C, D, and X. Also, the most significant bits of the label data of A, B, C, and D are respectively A%+Bs, C,,D
, and connect these to AND gate 34 and NAN
Input to D gates 35-38.

The counter 39 is an initial label counter, and when the AND gate 340 condition is satisfied, the label is incremented by 1, and the selector 4
0 selection signal terminal l is activated, and thereby the initial label L is output to the output terminal X of the selector 40. N
AND gate 35°36.37.38 similarly selects the selection signal terminals a, b, c, d of selector 40 when the conditions are met.
are activated respectively, and the output terminal X of the selector 40 is activated.
Labels A, B, C, and D are output from the output. Further, the initial label value output from the flip-flop 31 is written into the connection table 14 using the label value as an address, and the contents of the table are initialized.

As explained above, the initial labeling circuit shown in FIG. 6 can realize the initial labeling operation logic shown in FIG. 5.

Next, connection relationship detection will be explained.

This connection relationship detection uses a connection relationship detection mask 200 shown in FIG. 7 for labeled images to detect connection relationships between different labels that are connected. The connection relationship detection rule is as shown in FIG. 9, where the label of the pixel of interest is set to X, and the connection relationship is determined based on the size relationship with the label D in the upper right corner. The detected information is written into a connection table 14 as shown in FIG. Here, the connection table 14 uses RAM and is composed of a one-dimensional array memory, and replaces the address of the larger label between the label of the pixel of interest and its upper right label, or the address of the larger label of the pixel of interest, or Replace the address of the smaller label between the label and the label of the pixel on the upper right of the label with the larger label.

In the connection relationship detection logic shown in FIG. 9, no processing is performed if there is no data in the pixel of interest X or the pixel to its upper right, or if the pixel C above the pixel of interest has already been labeled. Also, compare the label values of X and D, and
are both labels, and in the case of Xf-D, ■ in Figure 9
The contents of the connection table with min (Lx, Ln) as the address as shown in max (LX, Ln)
Write to the connection table with address Lo). In order to implement this processing using λ-ware, reading and writing from memory must be performed within one period of the basic clock, which is generally difficult to implement. However, in the labeling method of the present invention, connection relationships between different labels can be detected in two clock cycles at the shortest. That is, different labels are not detected consecutively.

FIG. 11 shows an example of connection relationship detection using the method of the present invention.
The time chart is shown in the figure. When t=2, C=0
So X=5. Label D' = 2 is detected, but at t = 3, no processing is performed because C = 2, and detection in the minimum time is at the next t = 4, at x = 5°D = 4. be. Therefore, in order to realize the logic in Figure 9 ■, detect the connection at t=2,
Data is read from the connection table at this cycle. That is,
Read the contents of the connection table with min (Lx, LD) as the address. At the next time t=3, the address is set to max (Lx, Ln) and the data read in the previous cycle is written into the connection table. Then, a flag FLAG is set indicating that a connection has been detected. As is clear from the above, the conditions under which a new connection is detected in the present invention are when X and D are labels, X≠D, and C=0.

With the above processing, max (Lx, Lo) and m1n
Since the relationship between (Lx, Ln) may be reversed, there are two methods of connection detection: (1) and (2) shown in FIG. 9.

FIG. 10 shows an embodiment of a connection relationship detection circuit that implements the above processing using hardware. In this embodiment, connection detection logic (2) will be explained.

In the connection relationship detection circuit shown in FIG. 10, 50 to 57 are flip-flops, 58 is a comparator, 59 is a 511-stage line buffer, 60 to 63 are selectors, and 64 is an AND
Gates 65 to 67 are inverters, and these are the first
They are connected and configured as shown in Figure 0.

In the figure, label data from the image memory is input to a flip-flop 50, the data output from the flip-flop 50 is designated as X, and this X is passed through a 511-stage line buffer 59 to obtain data delayed by one line and one clock. Let it be D. The most significant bits of X and D are respectively X, ,
D. Binding: Data delayed by one clock from the flip-flop 51 is designated as Cs. Thereby, the labels of X, D, and C of the connection relationship detection mask 200 can be obtained.

The labels of X and D are input to the comparator 58, and the magnitude signals and mismatch signal of X and D are obtained. Regarding the magnitude signals of X and D, a signal of X<D or X>D is outputted in accordance with a detection logic switching signal inputted to the selection signal terminal 5EL-A of the selector 60. The comparison signal from the comparator 58 and
, D, , C, are input to the AND gate 64,
When X, D are labels, X≠D, and C=0, and X>D or X<D according to the detection logic switching signal, AND
The output of gate 64 becomes active. The flip-flop 53 is operated using this output signal as a clock, and the output of the flip-flop 53 is used as a connection relationship detection flag.

The output of the AND gate 64 becomes a selection signal for the selectors 61 and 62, and the selector 61 outputs min (Lx, Ln
), the selector 62 selects the label of max(L, , Ln). The output of the selector 61 is input to the selector 63, selected by the output of the AND gate 64, and output to the flip-flop 55.

On the other hand, the output of the AND gate 64 is output from the flip-flop 52.
There is a delay of 1 clock. In addition, the output max of the selector 62
(LX, Lo) is also delayed by one clock due to the flip-flop 54. Therefore, min (Lx
, Ln) is output from the selector 63, the output max (Lx
, Lo) are output from the selector 63.

The output of the selector 63 is latched by the flip-flop 55 and becomes the address of the connection table 14 made up of RAM. Further, the output of the AND gate 64 passes through the flip-flops 52' and 56, and the output from the flip-flop 55 is max(L, , L.

), the inverter 67 becomes active, the sign is inverted, and the signal becomes a write signal for the connection table 14. The output m1n of the flip-flop 55 (LX, Ln
) becomes the address of the connection table 14, the data of the connection table 14 is latched by the flip-flop 57, and is outputted from the flip-flop 57 and input to the connection table 14 when the above-mentioned write signal is output.

The connection relationship detection circuit of FIG. 10 described above detects the address m1n (Lx) of the connection table 14.

L, ) is read and this data is written to the address max (Lx, Lo) of the connection table 14, thereby realizing the detection logic shown in FIG.

Furthermore, the detection logic shown in FIG. This can be easily realized.

Next, the label updating section 15 will be explained. The label updating unit 15 rewrites the detected label image data based on the connection table 14 created by the connection relationship detection process described above. FIG. 13 shows an embodiment of a label updating circuit that implements this label updating process using hardware.

The label data from the detected pixel is latched by the flip-flop 71 and used as an address in the connection table 14. The contents of the connection table 14 having this address are output to the flip-flop 72 and latched, and the output calapel data of the flip-flop 72 is again transferred to the image memory 2.
Input to 0. At this time, by matching the coordinates of the input data from the image memory 20 and the coordinates of the pixels of the output data, the label value of the image data in the image memory 20 can be rewritten according to the contents of the connection table 14. The above-described initial labeling, connection relationship detection, and label updating processes are selected by a process selection signal input from an external computer 21 or the like, and are executed at the video rate.

Next, a case will be described with reference to FIG. 14 in which image data 75a that is exactly the same as image data 95a shown in the detailed explanatory diagram of the prior invention in FIG. 19 is processed by the labeling processing method of the present invention. In the same figure, connection table 14
A new connection is detected at addresses 2, 3, 4, and data "1" is written to these addresses, so the contents of all addresses in the connection table 14 become 11. When the image data 75a is updated according to the contents of the connection table 14, the image data 75b can be obtained immediately.Compared with the process of the prior invention shown in FIG. 19, the high processing efficiency of the present invention is obvious.

Next, a comparison diagram of the processing process in connection detection logic ■ and ■ is shown in Fig. 15.
and FIG. 16. For patterns with an upward slope to the right as shown in Figure 15, the detection method using connection detection logic ■ is effective, but for patterns such as Figure 16, connection detection logic ■ has the opposite effect. From FIG. 16, it can be seen that the detection method of connection detection logic (2) is efficient. Therefore, by using the processing of the detection logics (1) and (2) together, the processing efficiency can be improved compared to the case of processing with a single detection logic. Therefore, in the connection relationship detection circuit shown in FIG. 10, a detection logic switching signal for selecting this detection process is input to the selector 60. Furthermore, detection logic■
For selection of and ■, the pattern to be processed is often known in advance, so for example, you can switch it manually.In addition, please note that there is not much image data at the bottom of the pattern with a downward slope to the right and the pattern with a roof. In many cases, accurate labeling can be achieved simply by performing initial labeling.

DETAILED DESCRIPTION OF THE INVENTION According to the present invention, in connection relationship detection processing, label connections can be detected by simply checking the magnitude relationship between a pixel of interest and its upper right label and the presence or absence of a label one level above the pixel of interest. Since the relationship can be obtained, it is possible to contribute to a reduction in circuit scale and simplification of the circuit in hardware implementation.

Furthermore, compared to labeling by the conventional method and the method of the prior invention, the method of the present invention significantly reduces the number of times of processing, making it possible to label binary image data efficiently and at high speed.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of the principle of the present invention, Fig. 2 is a block diagram of an embodiment of the present invention, Fig. 3 is an image data array diagram of the embodiment of the present invention, Fig. 4 is an explanatory diagram of the initial labeling mask, 5 is an explanatory diagram showing the initial labeling calculation logic, FIG. 6 is an initial labeling circuit diagram of the embodiment of the present invention, FIG. 7 is an explanatory diagram of the connection relationship detection mask, and FIG. 8 is an explanatory diagram of the connection table. FIG. 9 is an explanatory diagram showing connection relationship detection logic, FIG. 10 is a connection relationship detection circuit diagram of an embodiment of the present invention, FIG. 11 is an explanatory diagram of connection relationship detection, and FIG. 12 is a time chart for connection relationship detection. Fig. 13 is a label update circuit diagram of an embodiment of the present invention, Fig. 14 is an explanatory diagram of the labeling process according to the present invention, Figs. 15 and 16 are comparison diagrams of processing processes in connection detection logics ■ and ■, and Fig. 17 FIG. 18 is an explanatory diagram illustrating conventional repeating type labeling, FIG. 18 is an explanatory diagram illustrating conventional clustering type labeling, and FIG. 19 is a detailed explanatory diagram of the prior invention. DESCRIPTION OF SYMBOLS 1... Initial labeling means, 2... Connection relationship detection means, 3... Connection table, 4... Label updating means, 10... Labeling circuit, 12... Initial labeling unit, 13 ...Connection relationship detection unit, 14...Connection table, 15...Label update unit, 20...Image memory, 21...Computer, 100...Initial labeled mask, 200...Connection Relationship detection mask.

Claims (1)

[Claims] Regarding binary image data (S_I_N) of pixels arranged in a two-dimensional matrix, it is defined that the connection of adjacent image data is detected along the data processing direction with a pixel of interest as a reference. Initial labeled mask (100)
Initial labeling means (1) that applies the same label to image data that are connected along the data processing direction.
With respect to the image data labeled by the initial labeling means (1), it is detected whether or not a pixel delayed by one line among adjacent pixels is labeled based on the pixel of interest, and・Connection relationship detection means (2) that applies a connection relationship detection mask (200) defined to detect connection relationships to pixels delayed by one clock, and detects connection relationships between adjacent different labels.
a connection table (3) for storing label connection information; and a label updating means for updating a label based on the connection table (3) when a new connection relationship is detected by the connection relationship detection means (2). (4), wherein the initial labeling means (1), the connection relation detection means (2) and the label updating means (4) operate at video rate until no new connection relation is detected. A method for labeling image data, characterized in that a relationship detecting means (2) and the label updating means (4) are operated repeatedly.