JPS6334506B2 - - Google Patents

Info

Publication number
JPS6334506B2
JPS6334506B2 JP58059457A JP5945783A JPS6334506B2 JP S6334506 B2 JPS6334506 B2 JP S6334506B2 JP 58059457 A JP58059457 A JP 58059457A JP 5945783 A JP5945783 A JP 5945783A JP S6334506 B2 JPS6334506 B2 JP S6334506B2
Authority
JP
Japan
Prior art keywords
output
amplifier
model code
turned
edge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58059457A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59184971A (ja
Inventor
Yoshibumi Hara
Toshio Morimoto
Haruji Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP5945783A priority Critical patent/JPS59184971A/ja
Publication of JPS59184971A publication Critical patent/JPS59184971A/ja
Publication of JPS6334506B2 publication Critical patent/JPS6334506B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K7/00—Methods or arrangements for sensing record carriers, e.g. for reading patterns
    • G06K7/01—Details
    • G06K7/016—Synchronisation of sensing process

Landscapes

  • Engineering & Computer Science (AREA)
  • Artificial Intelligence (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Discharge Of Articles From Conveyors (AREA)
JP5945783A 1983-04-04 1983-04-04 機種コ−ド読取装置 Granted JPS59184971A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5945783A JPS59184971A (ja) 1983-04-04 1983-04-04 機種コ−ド読取装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5945783A JPS59184971A (ja) 1983-04-04 1983-04-04 機種コ−ド読取装置

Publications (2)

Publication Number Publication Date
JPS59184971A JPS59184971A (ja) 1984-10-20
JPS6334506B2 true JPS6334506B2 (enrdf_load_stackoverflow) 1988-07-11

Family

ID=13113849

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5945783A Granted JPS59184971A (ja) 1983-04-04 1983-04-04 機種コ−ド読取装置

Country Status (1)

Country Link
JP (1) JPS59184971A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10951210B2 (en) 2007-04-26 2021-03-16 Psemi Corporation Tuning capacitance to enhance FET stack voltage withstand

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2413726A1 (fr) * 1977-12-30 1979-07-27 Cii Hb Procede et dispositif de lecture d'une information codee sous forme d'intervalles de grandeurs predeterminees
JPS5824853U (ja) * 1981-08-07 1983-02-17 株式会社日立製作所 文字コ−ド読取り装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10951210B2 (en) 2007-04-26 2021-03-16 Psemi Corporation Tuning capacitance to enhance FET stack voltage withstand

Also Published As

Publication number Publication date
JPS59184971A (ja) 1984-10-20

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