JPS633446B2 - - Google Patents

Info

Publication number
JPS633446B2
JPS633446B2 JP15986778A JP15986778A JPS633446B2 JP S633446 B2 JPS633446 B2 JP S633446B2 JP 15986778 A JP15986778 A JP 15986778A JP 15986778 A JP15986778 A JP 15986778A JP S633446 B2 JPS633446 B2 JP S633446B2
Authority
JP
Japan
Prior art keywords
wafer
jig
semiconductor
furnace
wafers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP15986778A
Other languages
Japanese (ja)
Other versions
JPS5588323A (en
Inventor
Norimasa Myamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP15986778A priority Critical patent/JPS5588323A/en
Publication of JPS5588323A publication Critical patent/JPS5588323A/en
Publication of JPS633446B2 publication Critical patent/JPS633446B2/ja
Granted legal-status Critical Current

Links

Description

【発明の詳細な説明】 [技術分野] この発明は半導体ウエハに不純物拡散等の加熱
処理を施す方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a method of subjecting a semiconductor wafer to heat treatment such as impurity diffusion.

[背景技術] 従来、半導体ウエハにアクセプタ不純物あるい
はドナー不純物などを拡散するにあたつては、第
1図に示すように石英又はシリコン製の治具2に
多数のウエハ1を直立させて並列的に保持し、第
2図に示すような横型拡散炉3に挿入するのが一
般的であり、拡散炉3は、ヒータ4を有すると共
に、ウエハ挿入用開口部とは反対端側から不純物
を含むキヤリアガス(O2、H2、N2等)5を流入
させるようになつているのが普通であつた。横型
拡散炉の例として特開昭49−104570号がある。
[Background Art] Conventionally, when diffusing acceptor impurities or donor impurities into semiconductor wafers, as shown in FIG. Generally, the wafer is held at a wafer and inserted into a horizontal diffusion furnace 3 as shown in FIG. Usually, a carrier gas (O 2 , H 2 , N 2 , etc.) 5 was introduced. An example of a horizontal diffusion furnace is JP-A-49-104570.

しかし、このような従来技術によれば、ウエハ
を炉内に挿入するときに、炉体内壁とウエハ治具
とが接触し異物が発生しがちである。又、炉内の
温度分布が不均一であることと相挨つてガスの流
速分布の不均一性あるいは乱流の発生などによつ
てウエハ内での又はウエハ間での素子特性に相当
のばらつきが生ずる欠点がある。
However, according to such conventional technology, when a wafer is inserted into a furnace, the inner wall of the furnace body and the wafer jig tend to come into contact with each other, resulting in the generation of foreign matter. Additionally, due to non-uniform temperature distribution in the furnace, non-uniform gas flow velocity distribution or turbulent flow, there is considerable variation in device characteristics within a wafer or between wafers. There are drawbacks that arise.

すなわちウエハを炉体内に保持するときに、ウ
エハ治具が炉体内壁と接触するので、この接触面
からの熱伝達によつてウエハ治具およびウエハの
温度分布に差が生じたり、炉体内に導入された反
応ガス密度が重力の影響で炉体内の上下で差が生
じ、一枚のウエハ内でバラツキが生じたりする等
の問題である。
In other words, when the wafer is held in the furnace, the wafer jig comes into contact with the wall of the furnace, so heat transfer from this contact surface causes a difference in temperature distribution between the wafer jig and the wafer, and The density of the introduced reactant gas varies between the upper and lower parts of the furnace body due to the influence of gravity, resulting in variations within a single wafer.

又、ウエハを一枚ずつ治具に立てかける必要が
あり自動化に不向きである。又、装置の占有スペ
ースがかなり大きいという欠点もある。
Furthermore, it is necessary to stand the wafers one by one on a jig, which is not suitable for automation. Another disadvantage is that the device occupies a considerable amount of space.

[発明の目的] 本発明の目的は上記した欠点を除去した新規な
半導体ウエハに対する熱処理方法を提供すること
にある。
[Object of the Invention] An object of the present invention is to provide a novel heat treatment method for semiconductor wafers that eliminates the above-mentioned drawbacks.

[発明の概要] 本発明の代表的なものの概要は下記のとおりで
ある。すなわち、円筒状の空間がほぼ鉛直方向に
沿つて存在する炉管内で複数の半導体ウエハを熱
処理するにあたり、該複数の半導体ウエハを半導
体ウエハ保持治具に対し、それぞれをその半導体
ウエハの周縁部の複数箇所において接触保持さ
せ、かつ治具の長手方向に沿つて所定間隔を保つ
て配置させ、その鉛直方向に沿つて存在する炉管
内において、上記治具をその炉管内壁に接触させ
ることなくその治具の長手方向一端部側で支え加
熱処理することを特徴とする。
[Summary of the Invention] A typical outline of the present invention is as follows. In other words, when heat-treating a plurality of semiconductor wafers in a furnace tube in which a cylindrical space exists along a substantially vertical direction, each of the plurality of semiconductor wafers is placed against a semiconductor wafer holding jig, and the peripheral edge of the semiconductor wafer is The jig is held in contact with the inner wall of the furnace tube at a plurality of locations, and is placed at predetermined intervals along the longitudinal direction of the jig, so that the jig can be held in contact with the inner wall of the furnace tube within the furnace tube that exists along the vertical direction. The jig is characterized by being supported at one end in the longitudinal direction and subjected to heat treatment.

このような構成とすることにより炉の内壁とウ
エハ(ウエハ治具)とを非接触にすることができ
異物の発生を低減できる。又、ウエハはほぼ水平
に保持されるので治具から治具への一括移送がし
やすく自動化に対応でき、またウエハの大口径化
にも対応できる。
With such a configuration, the inner wall of the furnace and the wafer (wafer jig) can be made non-contact, and the generation of foreign matter can be reduced. Further, since the wafer is held almost horizontally, it is easy to transfer the wafer from one jig to another in a batch, which makes it compatible with automation, and can also accommodate larger diameter wafers.

さらに省スペース、省エネルギーも達成でき、
熱変形にも強い。
Furthermore, space and energy savings can be achieved.
Resistant to heat deformation.

そしてさらに、ウエハは加熱処理時に回転動が
与えられたため、各ウエハ、ウエハ内に均一にガ
スがゆきとどく。
Further, since the wafers are subjected to rotational motion during the heat treatment, the gas uniformly spreads to each wafer and within the wafer.

[実施例] 第3図は、この発明の一実施例で用いられるウ
エハ保持治具を示すもので、多数の半導体ウエハ
11はほぼ等間隔で上下の一対の保持部材12
A,12Bからなる保持治具12内に配列され
る。保持部材12A,12Bは互いに同様な構成
で、図示の如く重ね合わせた際にウエハ外径に相
当する内径をもつた円筒状部を各々3本づつで計
6本の棒状部12Xにより形成するようになつて
いる。そして、各棒状部12Xのウエハ11に係
合すべき部分にはウエハ厚さに相当する幅の溝が
切られており、後述のようにウエハ11を水平に
保持してもウエハが落下しないようになつてい
る。
[Embodiment] FIG. 3 shows a wafer holding jig used in an embodiment of the present invention, in which a large number of semiconductor wafers 11 are held by a pair of upper and lower holding members 12 at approximately equal intervals.
They are arranged in a holding jig 12 consisting of A and 12B. The holding members 12A and 12B have similar configurations, and as shown in the figure, when stacked one on top of the other, they form a cylindrical part having an inner diameter corresponding to the outer diameter of the wafer, with a total of six rod-shaped parts 12X, three each. It's getting old. A groove with a width corresponding to the thickness of the wafer is cut in the portion of each rod-shaped portion 12X that should engage the wafer 11, so that the wafer does not fall even when the wafer 11 is held horizontally as described later. It's getting old.

ウエハ保持治具12内に第3図に示すように保
持された多数のウエハ11は、第4図に示すよう
に治具12を90゜回転させて治具ホルダ16に保
持させることによりほぼ水平の状態で縦方向に延
在してなる石英管によつて構成された縦形拡散炉
(熱処理炉)13内に挿入される。拡散炉13は
ヒータ14を有すると共に、下方から不純物を含
むキヤリアガス15を導入するようになつてい
る。
A large number of wafers 11 held in the wafer holding jig 12 as shown in FIG. In this state, it is inserted into a vertical diffusion furnace (heat treatment furnace) 13 made up of a quartz tube extending in the vertical direction. The diffusion furnace 13 has a heater 14, and a carrier gas 15 containing impurities is introduced from below.

拡散処理にあたつては、ガス15を炉13内に
導入すると共にヒータ14でウエハ11の所定の
温度に加熱する。一方、ウエハ保持治具12を治
具ホルダ16を用いて炉の内壁と非接触の状態で
保持する。この実施例ではこの非接触を利用して
治具ホルダ16を、さらに矢印ULに示す如く上
下動させ且つ矢印Rに示す如く回転させることに
よりウエハ11に上下動及び回転運動を与えるよ
うにする。このようにすると、ウエハ11に対し
てヒータ14の熱とガス15中の不純物を均一に
作用させることができるので、ウエハ内及びウエ
ハ間の素子特性ばらつきを大幅に減らすことがで
きる。
During the diffusion process, gas 15 is introduced into furnace 13 and wafer 11 is heated to a predetermined temperature by heater 14 . On the other hand, the wafer holding jig 12 is held using a jig holder 16 without contacting the inner wall of the furnace. In this embodiment, by utilizing this non-contact, the jig holder 16 is further moved up and down as shown by the arrow UL and rotated as shown by the arrow R, thereby imparting vertical and rotational movement to the wafer 11. In this way, the heat from the heater 14 and the impurities in the gas 15 can be uniformly applied to the wafer 11, so variations in device characteristics within a wafer and between wafers can be significantly reduced.

第5図及び第6図は、第4図の処理バツチにお
いて各ウエハ毎に多数の拡散型トランジスタを形
成した場合に、1ウエハ内での又は複数ウエハ間
でのトランジスタの電流増幅率hFEのばらつきを
従来法による場合と対比して示したものである。
第5図によれば、1つのウエハ11内におけるY
方向に沿うhFEのばらつきは破線Aに示す従来法
による場合よりも実線Bで示すこの発明による場
合の方がはるかに小さいことが明らかである。ま
た、第6図によれば、同一処理バツチ内における
ウエハ11間のhFEのばらつきも破線Aに示す従
来の場合よりも実線Bに示すこの発明による場合
の方が充分小さいことが明らかである。
FIGS. 5 and 6 show the current amplification factor h FE of transistors within one wafer or between multiple wafers when a large number of diffused transistors are formed on each wafer in the processing batch shown in FIG. The variation is shown in comparison with the case using the conventional method.
According to FIG. 5, Y within one wafer 11
It is clear that the variation in h FE along the direction is much smaller in the case of the invention shown by the solid line B than in the case of the conventional method shown by the dashed line A. Furthermore, according to FIG. 6, it is clear that the variation in hFE between wafers 11 within the same processing batch is sufficiently smaller in the case according to the present invention shown by the solid line B than in the conventional case shown by the broken line A.

[効果] (1) 本発明によれば、円筒状の空間がほぼ鉛直方
向に沿つて存在する炉管内での複数の半導体ウ
エハの熱処理であるために、すなわち縦方向の
空間を利用するために、従来の横型拡散炉に較
べてスペース効率がよく、省スペース化を図る
ことができる。
[Effects] (1) According to the present invention, since a plurality of semiconductor wafers are heat-treated in a furnace tube in which a cylindrical space exists almost vertically, that is, in order to utilize the vertical space, , it is more space efficient than the conventional horizontal diffusion furnace and can save space.

(2) 本発明によれば、半導体ウエハ保持治具に対
して、複数の半導体ウエハのそれぞれをその半
導体ウエハの周縁部の複数箇所において接触保
持させるものであるため、その半導体ウエハ保
持治具自体は軽量なものとすることができ、大
量のウエハチヤージが可能となる。
(2) According to the present invention, since each of a plurality of semiconductor wafers is held in contact with the semiconductor wafer holding jig at a plurality of locations on the peripheral edge of the semiconductor wafer, the semiconductor wafer holding jig itself The wafer can be made lightweight and a large amount of wafer yardage is possible.

(3) 上記の如く半導体ウエハ保持治具自体は軽量
なものとすることができるがため、第4図に示
す如くその半導体ウエハ保持治具を炉管内にお
いてその炉管内壁に接触させることなく治具ホ
ルダ16で半導体ウエハ保持治具の長手方向一
端部側のみを支えて加熱処理ができる。すなわ
ち、半導体ウエハ保持治具の片持ち支持ができ
る。
(3) As mentioned above, the semiconductor wafer holding jig itself can be made lightweight, so the semiconductor wafer holding jig can be held inside the furnace tube without coming into contact with the inner wall of the furnace tube, as shown in Figure 4. Heat treatment can be performed by supporting only one longitudinal end of the semiconductor wafer holding jig with the tool holder 16. That is, the semiconductor wafer holding jig can be supported in a cantilevered manner.

(4) 半導体ウエハ保持治具の片持ち支持であれ
ば、当然両持ち支持に較べて異物発生は少なく
なる効果がある。すなわち、本発明によれば、
第4図に示す如く半導体ウエハ保持治具の長手
方向の他端部側は浮かしておくために、炉管内
での接触摩擦部分がなくなり、このため、異物
発生は少なくなる。
(4) If the semiconductor wafer holding jig is supported on one side, it is natural that the generation of foreign matter will be reduced compared to when it is supported on both sides. That is, according to the present invention,
As shown in FIG. 4, since the other end of the semiconductor wafer holding jig in the longitudinal direction is floated, there is no contact friction within the furnace tube, and as a result, the generation of foreign matter is reduced.

(5) 本発明によれば、半導体ウエハ保持治具の長
手方向に沿つて所定間隔を保つて配置させ、そ
の治具を鉛直方向に沿つて存在する炉管内にそ
の内壁に接触させることなく維持せしめるもの
であるため、炉体の径を小さくでき、、つまり、
ヒーターから炉体中心までの距離が短くできる
ためにウエハ内の温度不均一は小さくなり、均
一加熱化に近づく。
(5) According to the present invention, semiconductor wafer holding jigs are arranged at predetermined intervals along the longitudinal direction, and the jigs are maintained in the furnace tube that exists along the vertical direction without contacting the inner wall thereof. Since the diameter of the furnace body can be reduced, in other words,
Since the distance from the heater to the center of the furnace body can be shortened, temperature non-uniformity within the wafer is reduced, and heating becomes closer to uniformity.

(6) 本発明によれば、ウエハはほぼ水平に対向保
持されているためにガスの流れがウエハ面に直
接あたらず、ガスの濃度、量のばらつきによる
影響は小さい。このため、ロツト間ばらつきも
小さい。
(6) According to the present invention, since the wafers are held substantially horizontally facing each other, the gas flow does not directly hit the wafer surface, and the influence of variations in gas concentration and amount is small. Therefore, the variation between lots is also small.

(7) 本発明によれば、実施例の如く複数の半導体
ウエハをほぼ水平に、かつそのウエハを水平面
内で回転させるようにしているために、ガスの
乱流をソフトに生じさせるものとなり、各ウエ
ハ間、ウエハ内に均一にガスがゆきとどく。
(7) According to the present invention, since the plurality of semiconductor wafers are placed almost horizontally as in the embodiment and the wafers are rotated within the horizontal plane, gas turbulence is generated softly; Gas spreads uniformly between and within each wafer.

(8) 本発明によれば、実施例の如く複数の半導体
ウエハをほぼ水平に、かつそのウエハを水平面
内で回転させるようにしているために、ウエハ
回転手段の回転に負担をかけず均一な回転が可
能となる。
(8) According to the present invention, since a plurality of semiconductor wafers are rotated almost horizontally and the wafers are rotated within a horizontal plane as in the embodiment, the rotation of the wafer rotation means is not burdened and the rotation is uniform. Rotation is possible.

以上のように、この発明によれば、炉構造ない
し使用治具類を特別複雑化させることなく、ウエ
ハ内及びウエハ間での素子特性ばらつきを大幅に
低減することができ、各種半導体装置を高歩留で
製作できる効果は大である。
As described above, according to the present invention, variations in device characteristics within and between wafers can be significantly reduced without complicating the furnace structure or the jigs used, and various semiconductor devices can be improved. The effect of manufacturing in terms of yield is significant.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、従来技術(横型拡散)におけるウエ
ハの保持状態を示す側面図、第2図は、従来技術
に使用される炉体の断面図、第3図は、この発明
の一実施例で用いられるウエハ保持治具を示す斜
視図、第4図は、この発明の実施例による拡散法
を示す炉体の断面図、第5図及び第6図は、この
発明の効果を従来技術による場合と対比して定量
的に示すグラフである。 11……半導体ウエハ、12……ウエハ保持治
具、13……縦型拡散炉、16……治具ホルダ。
FIG. 1 is a side view showing how a wafer is held in a conventional technique (horizontal diffusion), FIG. 2 is a sectional view of a furnace body used in the conventional technique, and FIG. 3 is an embodiment of the present invention. FIG. 4 is a perspective view showing a wafer holding jig used, FIG. 4 is a sectional view of a furnace body showing a diffusion method according to an embodiment of the present invention, and FIGS. This is a graph showing a quantitative comparison with the above. 11...Semiconductor wafer, 12...Wafer holding jig, 13...Vertical diffusion furnace, 16...Jig holder.

Claims (1)

【特許請求の範囲】 1 円筒状の空間がほぼ鉛直方向に沿つて存在す
る炉管内で複数の半導体ウエハを熱処理するにあ
たり、該複数の半導体ウエハを半導体ウエハ保持
治具に対し、それぞれをその半導体ウエハの周縁
部の複数箇所において接触保持させ、かつ治具の
長手方向に沿つて所定間隔を保つて配置させ、そ
の鉛直方向に沿つて存在する炉管内において、上
記治具をその炉管内壁に接触させることなくその
治具の長手方向一端部側で支え加熱処理すること
を特徴とする半導体ウエハの熱処理方法。 2 加熱処理時に上記ウエハ保持治具を回転させ
ることを特徴とする特許請求の範囲第1項記載の
半導体ウエハの熱処理方法。
[Claims] 1. When heat-treating a plurality of semiconductor wafers in a furnace tube in which a cylindrical space exists along a substantially vertical direction, each of the plurality of semiconductor wafers is placed against a semiconductor wafer holding jig, and each of the semiconductor wafers is The jig is held in contact with the wafer at multiple points around the periphery of the wafer, and is placed at predetermined intervals along the longitudinal direction of the wafer. A method for heat treatment of a semiconductor wafer, characterized in that the heat treatment is carried out by supporting the jig at one longitudinal end of the jig without contacting the wafer. 2. The method of heat processing a semiconductor wafer according to claim 1, wherein the wafer holding jig is rotated during the heat treatment.
JP15986778A 1978-12-27 1978-12-27 Manufacture of semiconductor device Granted JPS5588323A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15986778A JPS5588323A (en) 1978-12-27 1978-12-27 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15986778A JPS5588323A (en) 1978-12-27 1978-12-27 Manufacture of semiconductor device

Related Child Applications (4)

Application Number Title Priority Date Filing Date
JP29056485A Division JPS61172325A (en) 1985-12-25 1985-12-25 Vertical type heat treating furnace
JP16792686A Division JPS6211224A (en) 1986-07-18 1986-07-18 Heat treatment method for semiconductor wafer
JP15110287A Division JPS6323313A (en) 1987-06-19 1987-06-19 Heat-treatment of semiconductor wafer
JP191891A Division JPH03273620A (en) 1991-01-11 1991-01-11 Heat treating method of semiconductor wafer

Publications (2)

Publication Number Publication Date
JPS5588323A JPS5588323A (en) 1980-07-04
JPS633446B2 true JPS633446B2 (en) 1988-01-23

Family

ID=15702940

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15986778A Granted JPS5588323A (en) 1978-12-27 1978-12-27 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5588323A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0267137A (en) * 1988-09-02 1990-03-07 Komori Printing Mach Co Ltd Automatic dust removing apparatus of printing cylinder
JPH0464510B2 (en) * 1989-04-26 1992-10-15 Nippon Boorudoin Kk
JPH0464512B2 (en) * 1988-12-23 1992-10-15 Baldwin Nippon Kk

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58108735A (en) * 1981-12-23 1983-06-28 Fujitsu Ltd Basket for vertical type reaction tube
JPS58110034A (en) * 1981-12-24 1983-06-30 Fujitsu Ltd Vertical vapor phase epitaxial device
JPS5974621A (en) * 1982-10-21 1984-04-27 Stanley Electric Co Ltd Impurity diffusion and jig therefor
JPS59232434A (en) * 1983-06-16 1984-12-27 Nippon Telegr & Teleph Corp <Ntt> Work rotating apparatus in vacuum treatment apparatus
JPS6127625A (en) * 1984-07-18 1986-02-07 Deisuko Saiyaa Japan:Kk Heat treatment process and device of semiconductor wafer
JPH0528755Y2 (en) * 1986-06-24 1993-07-23
JPS6211224A (en) * 1986-07-18 1987-01-20 Hitachi Ltd Heat treatment method for semiconductor wafer
JPH0258825A (en) * 1988-08-24 1990-02-28 Nec Kyushu Ltd Vertical reduced-pressure cvd apparatus
JPH02152224A (en) * 1988-12-02 1990-06-12 Toshiba Corp Vapor growth apparatus
JPH0467619A (en) * 1990-07-09 1992-03-03 Nec Kyushu Ltd Semiconductor manufacturing device
JPH05157006A (en) * 1991-11-29 1993-06-22 Kubota Corp Engine exhaust heat recovery device
JPH06349738A (en) * 1993-06-08 1994-12-22 Nec Corp Vertical low-pressure cvd device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0267137A (en) * 1988-09-02 1990-03-07 Komori Printing Mach Co Ltd Automatic dust removing apparatus of printing cylinder
JPH0464512B2 (en) * 1988-12-23 1992-10-15 Baldwin Nippon Kk
JPH0464510B2 (en) * 1989-04-26 1992-10-15 Nippon Boorudoin Kk

Also Published As

Publication number Publication date
JPS5588323A (en) 1980-07-04

Similar Documents

Publication Publication Date Title
JPS633446B2 (en)
KR100290047B1 (en) Heat Treatment Boat
JP3245246B2 (en) Heat treatment equipment
JPS6211224A (en) Heat treatment method for semiconductor wafer
JPH07161654A (en) Boat for heat treatment
JPS6323313A (en) Heat-treatment of semiconductor wafer
JPH03273620A (en) Heat treating method of semiconductor wafer
JP2773150B2 (en) Semiconductor device manufacturing equipment
JPS6047981B2 (en) Jig for detecting internal temperature of horizontal heat treatment furnace
JPS61267317A (en) Boat for vertical type diffusion furnace
JPS61172325A (en) Vertical type heat treating furnace
JPH06260438A (en) Boat for heat treatment
JPS60171723A (en) Manufacture of semiconductor device and apparatus therefor
KR0122869Y1 (en) Wafer boat having slope
JPH0220830Y2 (en)
JPH01272112A (en) Wafer retention jig
KR20020033169A (en) Apparatus for manufacturing semiconductor device
JPH08330245A (en) Manufacture of semiconductor device, and manufacture device for semiconductor
JPH0143857Y2 (en)
JPH034035Y2 (en)
JPH11243064A (en) Wafer supporting plate
JPS63178519A (en) Heat treatment equipment for semiconductor
JPH0783000B2 (en) Processor
JPS63126219A (en) Heat treatment of semiconductor wafer
JPH05267202A (en) Wafer support boat