JPH08330245A - Manufacture of semiconductor device, and manufacture device for semiconductor - Google Patents

Abstract

PURPOSE: To improve the quality of the undersurface property of a large- diameter wafer without enlarging the interval between wafers, by heat-treating a plurality of opposed heat accumulating plates in advance, and then, opposing one or two wafers to the heat accumulating plates, between the opposite faces of the heat accumulating plates, and heat-treating them. CONSTITUTION: A heating furnace 5 is separated into an upper heating furnace 5a and a lower heating furnace 5b. For example, eight sheets of heat accumulating plates 10, each of which is a unified board being set a little larger than the dimension of a wafer 8, are fixed in condition that they are hung down two bars 18 piercing its upper part, and are arranged at a high-temperature part, keeping a fixed interval between them. What is more, for the hanging rod 18, both its ends are fixed to a fixing plate 17, and this fixing plate 17 is fixed to a mount plate 12. A retainer 6 is lifted up vertically within the above heating furnace 5a, and the wafer 8a is positioned inside the margin of the heat accumulating plate 10 in front view and that at equal distances from a pair of heat accumulating plates 10, between these in plan view. In this condition, the quick heat treatment is performed in this condition.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and an apparatus for manufacturing a semiconductor device, and more specifically, a semiconductor device, specifically, a memory or logic circuit IC such as silicon or compound semiconductor, On a wafer used for a thin film transistor (TFT transistor) IC or the like, a film or a layer of a semiconductor material, an insulating material, a metal, a superconducting material, or the like is deposited by using a reaction gas without causing a slip line on a single crystal substrate. Or by direct reaction with a single crystal substrate at atmospheric pressure or reduced pressure, or in the presence of an atmospheric gas containing Ar, He, N _2, etc., heat treatment of wafers such as diffusion, improvement of film quality, film flattening, etc. In this method, the characteristics related to the characteristics of the semiconductor device such as the film thickness, the impurity concentration, and the diffusion depth are measured in How to uniform, and to a device for implementing this method.

The present invention also relates to a semiconductor device manufacturing apparatus for carrying out the above method using vertical and horizontal hot wall type heating furnaces.

[0003]

2. Description of the Related Art U.S. Pat. No. 5,387, proposed by the applicant.
No. 557 (hereinafter referred to as “US patent”) uses an RTP (rapi
A double-tube type semiconductor manufacturing apparatus that performs d thermal processing) is disclosed. FIG. 7 illustrates a method of heat treating a single wafer by the semiconductor manufacturing apparatus shown in the US patent. In the figure, 1 is a quartz reaction tube composed of an outer tube 1a and an inner tube 1b, 2 is a reaction gas inflow tube opening at the bottom of the inner tube 1b, 3 is an exhaust tube opening at the bottom of the outer tube 1a, 4
Is an annular flow path formed between the outer tube 1a and the inner tube 1b arranged in a concentric circle and discharging the reaction gas, 5 is a heating furnace using an electric resistance heater, 6 is a wafer holding jig, 8 is a wafer, 30 is a magnet coil or a permanent magnet, 31 is a drive mechanism, 33 is a wafer holding jig for the shielding plate 11, the mounting plate 12
It is a guide member that moves up and down together. The wafer 8 is once held at a low temperature (for example, 750 ° C.) having a short diffusion length, and then held at a position shown in the drawing for a predetermined short time, and brought into contact with a reaction gas flowing upward in the inner tube 1b to perform a predetermined reaction. The wafer is raised, and immediately after the reaction, the wafer is moved by the wafer holder 6 to the low temperature region in the lower part of the furnace.

Ion implantation conditions for Si wafer of 150 mm diameter; BF2, 3.0E15 / cm ² , 2.30 keV
Ion implantation was performed, and after that, the sample was annealed at 950 ° C. for 2 minutes after being kept at a low temperature by the method described above with reference to FIG.
The sheet resistance is about 220Ω and its in-plane distribution is ± 1%.
It was within (average value of 5 sheets). When the same annealing was performed at 850 ° C. for 120 minutes by the normal RTP method without holding at low temperature, the sheet resistance was 310Ω, and when the annealing was performed at 850 ° C. for 30 minutes, the sheet resistance was 400Ω. In these cases, the in-plane distribution of the sheet resistance was about 1%.

[0005]

Then, the present inventor further conducted an experiment and studied the heating temperature distribution of the wafer by the hot wall type heating furnace. FIG. 8 illustrates the situation where four wafers 8 are heat treated in the upper high temperature section of a vertical heating furnace. In addition, 4a is an exhaust pipe having the same function as the annular flow path in FIG. 4, and 7 is a heater. In the heat treatment in the isothermal space created by the heater 7, the distance between the wafer and the wafer below it (hereinafter referred to as "wide interval arrangement") is about the distance between wafers (hereinafter referred to as "narrow interval arrangement"). It is set to double. The uppermost wafer 8 is a dummy wafer.

When the heat treatment temperature is 800 ° C. or higher, the heating of the wafer is dominated by radiation. Then, the energy entering from the surface of the heater 7 to the center of the wafer due to the wide interval arrangement is the radiant light with an incident angle of α _{1 to} α ₂ , while the energy entering from the heater 5a to the center of the wafer with a narrow interval is the incident angle. Is a radiant light of β ₁ to β ₂ , so in this case, a wide interval array with a large incident angle heats the wafer central part and the temperature distribution tends to be uniform, and the temperature difference between the central part and the peripheral part is small. Become. Therefore, in order to improve the uniform heating property, it is preferable to increase the distance between the wafers. However, it is not realistic to make the wafer interval extremely large.

Similarly, the temperature difference between the peripheral portion and the central portion of the wafer can be reduced by moving the peripheral portion of the wafer away from the heater, but this necessarily entails an increase in the inner diameter of the heating furnace.

Based on the above consideration, when a wafer under the same ion implantation conditions as in FIG. 8 is subjected to RTP in a heating furnace having a heater inner diameter of 270 mm, a practically achievable sheet resistance in-plane distribution obtained in a non-RTP diffusion furnace. The wafer interval for obtaining (1%) was evaluated, and the following experimental values were obtained. Wafer diameter (inch) Wafer spacing (mm) 6 About 40 8 About 50 12 About 75

From the standpoint of increasing the number of sheets to be processed per unit time and the manufacturing apparatus, that is, from the viewpoint of cost, it is preferable that the number of sheets to be processed is large. However, in practical use, at least 5 sheets of processing are expected. By arranging 8-inch wafers at the above intervals and adding the required length to the low temperature part and the transition region between the low temperature part and the high temperature part, the length (height) of the entire device is 3 m.
Become strong. Similarly, for a 12-inch wafer, the height of the entire device is 3.5 to 4.0 m. When the height of the device is increased as described above, it is difficult to perform maintenance, inspection, repair, and the like of the equipment, and there is a problem that the installation place is restricted.

On the other hand, the above-mentioned US patent also proposes a method of vertically placing a plurality of wafers and moving the wafers between a high temperature region and a low temperature region in a direction along the wafer surface. Also in this case, as described with reference to FIG. 8, the in-plane uniformity of the sheet resistance can be increased by increasing the wafer interval. However, in this case, there arises a problem that the diameter of the device becomes large.

Although the vertical furnace has been described above, the conventional RTP has not been performed in the horizontal furnace. In a horizontal furnace, the soaking length of about 1000 mm or more can be easily realized, but in the horizontal furnace, the occupied floor area (foot print) is very large at 1.5 × 8 to 1.5 × 11 m ^2. Since it is about 5 to 7 times that of a vertical furnace, it is no longer used for large diameter wafers of 8 inches or more, and RTP is used for 4 to 16 MDRAM manufactured with 6 inch diameter wafers.
It was not necessary to conduct RTP in a horizontal furnace because it was not necessary. However, D of 64M or more
The present inventor has noticed that, when manufacturing a RAM, it is advantageous in terms of clean room construction cost to perform RTP using a horizontal furnace rather than a vertical furnace that requires a building with a height of 5 m or more.

Therefore, the inventor of the present invention considers a method for improving the uniformity of the in-plane characteristics of the wafer without being bound by the relationship of increasing the distance between the wafers to maintain the in-plane uniformity of the large diameter wafer. Done and experimented.

[0013]

A method according to the present invention that achieves the above object is a method for manufacturing a semiconductor device, wherein one or a plurality of wafers facing each other in a hot wall type heating furnace are heat treated. A semiconductor characterized in that a plurality of opposed heat storage plates are preheated at a heat treatment temperature, and then one or two wafers are opposed to the heat storage plates between opposing surfaces of the heat storage plate and heat treated at the heat treatment temperature. A method of manufacturing an apparatus, and an apparatus according to the present invention that achieves the above-mentioned object, is a semiconductor device manufacturing apparatus equipped with a holder for moving a wafer to a heat treatment area in a hot wall type heating furnace. Alternatively, the semiconductor device manufacturing apparatus is characterized in that a plurality of heat storage plates facing each other at an interval allowing two wafers to be taken in and out are provided in the heat treatment region.

When the heat treatment temperature is 900 ° C. or less, it is difficult for the slip line to enter the single crystal substrate.
In some cases, it is not necessary to hold the temperature once as described with reference to. If the heat treatment temperature is high, it is necessary to keep the temperature low in order to prevent a slip line depending on the wafer condition in the RTP treatment step of the IC manufacturing process, for example. Further, although the present invention can enhance the in-plane uniformity when heat treating or surface treating one wafer, there is a great advantage in treating a plurality of wafers. Therefore, hereinafter, a plurality of wafers are temporarily kept at a low temperature in a low temperature region of a hot wall type heating furnace having a low temperature region and a high temperature region, the heat storage plate is preheated in the high temperature region, and the plurality of wafers are moved to the high temperature region. And a semiconductor manufacturing apparatus having a low temperature region for temporarily holding the wafer in addition to the high temperature region where the hot wall type heating furnace performs the heat treatment.

According to the present invention, wafers which are arranged opposite to each other in a hot wall type heating furnace, that is, wafers which face each other are moved in a plane direction between a low temperature region and a high temperature region, and the wafers are moved in a high temperature region. Based on the conventional multi-chip vertical method for heat treating, and a conventional semiconductor device manufacturing apparatus equipped with a holder for moving a wafer in its plane direction in a hot wall type heating furnace having a low temperature region and a high temperature region. , Which is improved as described below. The low temperature / high temperature region is a space having a certain temperature and having a certain length (a length sufficient to uniformly heat the wafer). The above-mentioned method and apparatus are known per se, and also in the present invention, a conventionally known technique, for example, a furnace structure such as a single tube or a double tube, a wafer holder, a gas inlet, a high temperature region and a low temperature region are provided in between. A technique such as providing an exhaust port can be appropriately adopted. In addition, the high temperature at which the RTP process is performed is generally 70.
0 to 800 ° C or more and 1100 ° C or less, but 7 in the future
The RTP process will be performed at temperatures below 00 ° C. In this case, the low temperature holding is lower than the heat treatment temperature by 100 ° C. or more 60
It is performed at a temperature of 0 to 700 ° C. or lower. Regarding the low-temperature holding temperature and the like that satisfy the condition that the diffusion distance of impurities can be ignored during the holding time at high temperature, the conditions described in the above-mentioned US patent of the applicant can be appropriately adopted.

The number of wafers is the same as the conventional one, but 5 to 10 wafers are used in the vertical type apparatus and 500 to 8 wafers in the horizontal type apparatus.
It is possible to batch process 10 to 25 sheets in order to easily obtain the uniform heating portion length of 00 mm.

In the present invention, the heat storage plate is heated to the high temperature before the wafer moves to the high temperature region, and then the wafer which has been heated to a low temperature in advance is heated in the space facing the heat storage plate using the heater and the heat storage plate as a heat source. It is characterized by that. Therefore, for example, the heat storage plate heated to a high temperature of 950 ° C. heats the wafer as a radiant heat source of 950 ° C., and in combination with the heating from the heater, at least the central portion of the wafer is heated at a low temperature for a very short time, for example, 750 ° C. to 9 ° C.
Heat up to 50 ° C. When the heat treatment temperature is 700 ° C. or lower, the heat transfer becomes conduction dominant, but when the wafer is placed in the immediate vicinity of the heat storage plate, the thickness of the gas layer existing between them becomes extremely thin, and the gas layer between them is very thin. The heat conduction is efficiently performed. Therefore, the wafer is also instantaneously heated to the heat treatment temperature. The size of the heat storage plate (indicating the minimum diameter, width, etc.) is preferably substantially the same as or larger than the size of the wafer. The angle of incidence of the radiant heat from the heat storage plate covers a wide range from several degrees to about 180 °, so that the entire surface of the wafer is heated uniformly at the same time. Therefore,
There is no limit to the upper limit of the size of the heat storage plate, and the size of the heat storage plate may be two or more times larger than that of the wafer and may be arranged vertically between a pair of heat storage plates, but this is not practical because the length of the vertical heating furnace becomes long.
However, two wafers may be arranged on the left and right. In the case of a horizontal heating furnace, since the length of the factory is not so strict as the height of the building, it is possible to use a heat storage plate twice as large as a wafer.

In the present invention, up to two wafers can be arranged between the heat storage plates, but when the number of wafers is three, the intermediate wafers are not exposed to the radiant heat from the heat storage plates, and the heat uniformity is not excellent.

The heat storage plate has a melting point sufficiently higher than the processing temperature,
Various metals and ceramics can be used as long as they do not emit a substance that causes contamination of the semiconductor device. Preferably, single crystal silicon, polycrystalline silicon, SiO ₂ , Si
C, carbon, metal silicide such as Si ₃ N ₄ , WSi ₂ , TiSi ₂ , W, Al ₂ O ₃ , AlN or BN is used. Further, the surface of the silicon plate or any other material may be coated with these substances, for example, Si ₃ N ₄ . However, since a single crystal silicon wafer has high purity and is easily available and processed, it is a preferable heat storage plate material when processing a silicon wafer. When selecting the above-mentioned various substances, the same substance as the substance formed on the wafer surface by heat treatment (for example, metal silicide) is used for the heat storage plate, or the property improvement treatment by heat treatment on the wafer surface (for example, annealing after ion implantation). It is also preferable to use the same material for the heat storage plate as the material to which (a) is applied (for example, polycrystalline silicon).

The heat storage plate is preferably heat-treated while holding the wafer substantially parallel to the center of the heat storage plate.
Wafers are typically 10-30 cm to achieve RTP
This is because the wafer is moved at a high speed between the high temperature region and the low temperature region at / sec, so that the wafer arrangement and holding described above avoid interference and contact with the heat storage plate, and the control mechanism for moving the wafer holder is simplified. Heat storage plates and wafers are placed vertically in a vertical furnace (upper and lower edges of the plate match the vertical direction of the furnace), and in a horizontal furnace vertically or horizontally (the entrance and exit directions of the furnace match the plate surface direction) It is preferable that In the latter case, the heat storage plates are arranged upright, horizontal, or at an angle between these, but upright is preferred.

The thickness of the wafer is usually 0.6 to 0.8 mm
Is. If it is estimated that the temperature rising time until the wafer is soaked after moving to the high temperature region is 2 to 3 minutes, the thickness of the heat storage plate needs to be appropriately adjusted depending on the wafer interval, but it is preferably 2 to 10 mm or more. However, even if the thickness of the heat storage plate slightly increases or decreases outside this range, the heating time for the heat storage plate to reach the predetermined high temperature from room temperature for the first time does not exceed 20 minutes, so that the treatment efficiency does not decrease.

[0022]

In the present invention, the heat source for heating in the high temperature region is the heater and the heat storage plate, and by disposing one or two wafers between the heat storage plates, the uniformity of the temperature distribution in the wafer surface is increased and high-speed heating is performed. Will be possible. further,
Even if the distance between the wafers is arbitrary, sufficient in-plane uniformity can be secured. This is because in the present invention, (a) in-plane heating uniformity is improved by radiating heat from the heat storage plate; (b) radiant heat distribution from the heater has little influence on the temperature distribution of the wafer; (c) heat storage The energy radiated from the plate instantaneously gives the heat required for the wafer at the initial stage of the heat treatment in which the thermal energy has a great influence on the surface resistance distribution;
(D) After the heat is dissipated, the heat storage plate is heated by the heater and returned to the predetermined heat treatment temperature. Hereinafter, the present invention will be described in more detail by way of examples with reference to the drawings.

[0023]

1 to 3 are views showing an embodiment in which the present invention is applied to a vertical depressurization CVD apparatus. In these figures,
1, 2, 3, 5, 6, 12, 30, 31, and 32 are the same members as shown in FIG. 7, and 8 is a wafer. The heating furnace 5 includes an upper heating furnace 5a and a lower heating furnace 5b.
And an electric resistance heating type heater 7 is attached to each inner surface.

Gases such as a reaction gas and a carrier gas introduced from the reaction gas introduction pipe 2 pass through a cylindrical connecting portion 9 provided at the top of the quartz reaction pipe 1 and a honeycomb-shaped opening 9a at the bottom thereof to the quartz reaction pipe 1 Flows in.

On the other hand, in the lower part of the quartz reaction tube 1, the seven wafers 8 are usually heated to 700 to 750 ° C. by the lower heating furnace 5b for the RTP treatment for activation after ion implantation. Since the diffusion of impurities is not active in this temperature range, the holding time can be lengthened, so that the wafer 8 is held in the lower heating furnace 5b for a time such that the in-plane temperature is sufficiently constant. The wafer holder 6 has four arm members 13 extending obliquely upward from the tip of the support rod 6a, and a wafer holding portion is integrally provided via a support plate above the arm member 13. The wafer holding portion is constituted by vertically arranging and fixing upright plates 14 integrally formed with three claw portions 15 in which slits for enclosing the periphery of the wafer 8 with a width of about several mm are formed. Therefore, the seven wafers 8 are moved up and down in the plane direction while keeping the mutual intervals constant.

Reference numeral 10 denotes eight heat storage plates, each of which is an integrated plate set to be slightly larger than the size of the wafer 8. The heat storage plate 10 is fixed in a state of being suspended from two rods 18 penetrating the upper part of the heat storage plate 10 and is fixedly arranged in a high temperature portion with a constant interval therebetween. Both ends of the suspension bar 18 are fixed to the fixed plate 17, and the fixed plate 17 is mounted on the mounting plate 1.
It is fixed to 2.

When the holder 6 is vertically lifted in the upper heating furnace 5a, the wafer 8a is inside the periphery of the heat storage plate 10 in a front view (FIG. 2) and in a plan view (see FIG. 2), as shown in FIGS. In FIG. 3), the pair of heat storage plates 10 are located in the middle and equidistant from them. In this state, the wafer RTP process is performed. It goes without saying that the present invention can be applied to the device of FIG. 7 instead of that of FIG. Further, although FIG. 1 shows a heating furnace with two zones, the present invention can be applied to heating furnaces with three or more zones having different temperatures.

4 to 6 show an embodiment in which the present invention is applied to a horizontal atmospheric pressure CVD apparatus. In FIG. 4, the wafer 8 is held in a low temperature soaking zone and heated to a low temperature, and in FIGS. 5 and 6, the wafer 8 is held in a high temperature soaking zone and heated to a high temperature. 4 to 6, reference numeral 20 denotes a holder for holding a wafer by a known cantilever mechanism and moving the wafer in a contactless manner with the reaction tube. The wafer holder 20 is described in the paragraph (003
The control mechanism described in 0) is connected. The wafer placing / guiding jig 21 has a set of two wafers 8 arranged on the front end side 21a in four rows vertically and three rows horizontally, for a total of 24 wafers (see FIG. 6). In this embodiment, a set of two wafers is heated between the opposed heat storage plates, but it goes without saying that one wafer may be heated between the opposed heat storage plates.

The wafer placing / guiding jig 21 has a front end 21.
a is a plate shape, the rear end side 21b is a tube body, and in the middle is a solid connection portion that changes the cross section from a circular shape to a plate shape. Has a smaller diameter and less power required for movement.

Wafer mounting / guide jig 21 rear end side 21
In b, the collar 22 is fixedly contacted at its end portion by shrink fitting, etc., and is connected to the chuck 25 by the bolt of the protruding portion 23 provided at the lower portion thereof. Since the chuck 25 is rotatably attached with the worm gear 24 that meshes with the worm 26, the wafer mounting / guide jig 21 moves forward and backward in the furnace as the chuck 25 moves.
The holding portion 27 holding the worm 26 at both ends is fixed to the worm gear 28, and is moved by the rotation of the worm 29 as shown by the arrow. As a result, the wafer 8 is loaded into the heating furnace and is carried out of the heating furnace.

As shown in FIGS. 5 and 6, the heat storage plate 10
Consists of a plate having a length of about 3.5 times the wafer diameter and a width of about 1.2 times the wafer diameter. Therefore, when one wafer is opposed between the two heat storage plates 10, three wafers can be heated simultaneously, and the two heat storage plates 10 can be heated simultaneously.
When facing one wafer, six wafers can be heated simultaneously. The horizontal devices described above may be arranged in multiple stages vertically.

[0032]

As described above, the present invention provides in-plane uniformity characteristics of a plurality of wafers processed in a vertical furnace,
For example, with respect to the uniformity of in-plane resistance, it is possible to achieve in-plane uniformity almost equal to that of the one-wafer processing. Further, since the height or length of the device is the same as the conventional one, maintenance of the device is easy. Therefore, the present invention enables high-efficiency processing for a large-diameter wafer while improving in-plane uniformity. Since this effect is hardly affected by the distance between the wafer and the heater, the work of setting and moving the wafer in the furnace is easy.

Further, in the present invention, the wafer is instantaneously heated to the heat treatment temperature at the initial stage of RTP heating which substantially determines the resistance distribution, which is useful for improving the resistance distribution.

Furthermore, since RTP is possible in the horizontal heating furnace, the number of wafers processed per one time is increased, and the productivity is improved.

In addition to the heat treatment mentioned at the beginning, the present invention is based on BS.
RTP annealing for improving the film quality of high dielectric thin films such as T (barium strontium titanate), ST (strontium titanate), and Ta ₂ O ₅ film, WSi ₂ , T
RTP annealing for lowering resistance of iSi ₂ film, etc., RTP annealing for densification / planarization of SiO ₂ , PSG, BPSG, SiN, SiON film, P
RTP annealing of ferroelectric material film such as ZT (lead zirconium titanate), Y-1, BST, activation of ion implantation layer, diffusion, SiO ₂ film formed by reacting bulk silicon, SiON film, It can also be applied to the formation of a thin film such as a SiO film, and an ultrathin nitriding treatment for nitriding the surface of a SiO ₂ film by 1 to 10 Å.

[Brief description of drawings]

FIG. 1 is a view showing an example of a vertical heating furnace in which a wafer is heated at a low temperature.

FIG. 2 is a drawing of the vertical heating furnace of FIG. 1 viewed from the wafer surface side.

FIG. 3 is a plan view showing a heat storage plate in the apparatus of FIG.

FIG. 4 is a view showing an example of a horizontal heating furnace in which a wafer is heated at a low temperature.

FIG. 5 is a view showing an example of a horizontal heating furnace in which a wafer is heated at a high temperature.

6 is a plan view of the heat storage plate seen from above and a side view of the heat storage plate in the apparatus of FIG. 5. FIG.

FIG. 7 is an explanatory diagram of a conventional method in which an RTP process is performed by moving a single wafer up and down in a hot wall type vertical heating furnace.

FIG. 8 is a schematic diagram for explaining uniformity of in-plane temperature distribution of a wafer depending on an angle of radiant heat from a heater and a wafer interval.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Quartz reaction tube 2 Reactive gas inflow tube 3 Exhaust tube 4 Annular flow path 5 Heating furnace 6 Wafer holding jig 7 Heater 8 Wafer 9 Cylindrical connection part 10 Heat storage plate 21 Wafer mounting / guide jig

Claims (20)

[Claims] 1. A method of manufacturing a semiconductor device in which one or a plurality of wafers facing each other are heat-treated in a hot wall type heating furnace, wherein a plurality of opposed heat storage plates are preheated to a heat treatment temperature, and then 1 A method of manufacturing a semiconductor device, wherein one or two wafers are faced to the heat storage plate between the facing surfaces of the heat storage plate and heat-treated at the heat treatment temperature. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the hot wall type heating furnace is a vertical type. 3. The method of manufacturing a semiconductor device according to claim 2, wherein the heat storage plate and the wafer are vertically placed. 4. The method of manufacturing a semiconductor device according to claim 1, wherein the hot wall type heating furnace is a horizontal type. 5. The method of manufacturing a semiconductor device according to claim 4, wherein the heat storage plate and the wafer are placed vertically or horizontally. 6. The heat storage plate has, at least on its surface, single crystal silicon, polycrystalline silicon, SiO ₂ , SiC,
Carbon, Si ₃ N ₄ , metal silicide, W, Al ₂ O ₃ ,
6. The method for manufacturing a semiconductor device according to claim 1, wherein the semiconductor device is made of AlN or BN. 7. The method of manufacturing a semiconductor device according to claim 6, wherein the same substance as that formed on the surface of the wafer by the heat treatment is used on at least the surface of the heat storage plate. 8. The method of manufacturing a semiconductor device according to claim 6, wherein the same substance as the substance to be subjected to the property improvement treatment by heat treatment on the wafer surface is used for at least the surface of the heat storage plate. 9. The method of manufacturing a semiconductor device according to claim 6, wherein the heat storage plate has a thickness of 2 to 10 mm. 10. The method for manufacturing a semiconductor device according to claim 1, wherein one wafer is held between the heat storage plates facing each other. 11. The method according to claim 1, wherein the wafer is temporarily held in a low temperature region of a hot wall type heating furnace having a low temperature region and a high temperature region, and then the wafer is moved to the high temperature region. The method for manufacturing a semiconductor device according to claim 1. 12. A method for processing a plurality of wafers.
12. The method for manufacturing a semiconductor device according to any one of 1 to 11. 13. A semiconductor device manufacturing apparatus equipped with a holder for moving one or more wafers to a heat treatment area in a hot wall type heating furnace.
An apparatus for manufacturing a semiconductor device, wherein a plurality of heat storage plates facing each other at an interval allowing a wafer to be taken in and out are provided in a heat treatment area. 14. The semiconductor device manufacturing apparatus according to claim 13, wherein the hot wall type heating furnace is a vertical type. 15. The apparatus for manufacturing a semiconductor device according to claim 14, wherein the heat storage plate is placed vertically. 16. The semiconductor device manufacturing apparatus according to claim 14, wherein the hot wall type heating furnace is a horizontal type. 17. The semiconductor device manufacturing apparatus according to claim 16, wherein the heat storage plate is placed vertically or horizontally. 18. The heat storage plate, at least on the surface thereof, is made of single crystal silicon, polycrystalline silicon, SiO ₂ , Si.
C, carbon, Si ₃ N ₄ , metal silicide, W, Al ₂ O
_3. It is composed of ₃ , AlN or BN.
18. The semiconductor device manufacturing apparatus according to any one of 3 to 17. 19. The semiconductor device manufacturing apparatus according to claim 18, wherein the heat storage plate has a thickness of 2 to 10 mm. 20. The semiconductor manufacturing apparatus according to claim 1, wherein the hot wall type heating furnace has a low temperature region for temporarily holding a wafer in addition to a high temperature region for heat treatment. Manufacturing equipment.