JPS6333739B2 - - Google Patents

Info

Publication number
JPS6333739B2
JPS6333739B2 JP55163151A JP16315180A JPS6333739B2 JP S6333739 B2 JPS6333739 B2 JP S6333739B2 JP 55163151 A JP55163151 A JP 55163151A JP 16315180 A JP16315180 A JP 16315180A JP S6333739 B2 JPS6333739 B2 JP S6333739B2
Authority
JP
Japan
Prior art keywords
output
phase
frequency
counter
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55163151A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5787241A (en
Inventor
Hiroshi Okano
Hideo Sakata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP55163151A priority Critical patent/JPS5787241A/ja
Publication of JPS5787241A publication Critical patent/JPS5787241A/ja
Publication of JPS6333739B2 publication Critical patent/JPS6333739B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/199—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division with reset of the frequency divider or the counter, e.g. for assuring initial synchronisation

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
JP55163151A 1980-11-18 1980-11-18 Phase synchronizing circuit for optional frequency conversion Granted JPS5787241A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55163151A JPS5787241A (en) 1980-11-18 1980-11-18 Phase synchronizing circuit for optional frequency conversion

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55163151A JPS5787241A (en) 1980-11-18 1980-11-18 Phase synchronizing circuit for optional frequency conversion

Publications (2)

Publication Number Publication Date
JPS5787241A JPS5787241A (en) 1982-05-31
JPS6333739B2 true JPS6333739B2 (enrdf_load_stackoverflow) 1988-07-06

Family

ID=15768186

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55163151A Granted JPS5787241A (en) 1980-11-18 1980-11-18 Phase synchronizing circuit for optional frequency conversion

Country Status (1)

Country Link
JP (1) JPS5787241A (enrdf_load_stackoverflow)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07105717B2 (ja) * 1984-02-10 1995-11-13 株式会社日立製作所 クロック発生回路
JPS6346013A (ja) * 1986-08-13 1988-02-26 Sony Corp フエ−ズロツクドル−プ回路
JP2549431B2 (ja) * 1989-02-28 1996-10-30 富士通株式会社 ディジタルミキサを含むｐｌｌのデッドロック現象防止回路

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51105751A (en) * 1975-03-14 1976-09-18 Nippon Electron Optics Lab Fueizu rotsuku ruupukairo

Also Published As

Publication number Publication date
JPS5787241A (en) 1982-05-31

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