JPS6332264B2 - - Google Patents

Info

Publication number
JPS6332264B2
JPS6332264B2 JP4065782A JP4065782A JPS6332264B2 JP S6332264 B2 JPS6332264 B2 JP S6332264B2 JP 4065782 A JP4065782 A JP 4065782A JP 4065782 A JP4065782 A JP 4065782A JP S6332264 B2 JPS6332264 B2 JP S6332264B2
Authority
JP
Japan
Prior art keywords
substrate
ceramic
lead frame
semiconductor chip
copper
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP4065782A
Other languages
English (en)
Japanese (ja)
Other versions
JPS57166053A (en
Inventor
Jii Guratsubu Deimitorii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TE Connectivity Corp
Original Assignee
AMP Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by AMP Inc filed Critical AMP Inc
Publication of JPS57166053A publication Critical patent/JPS57166053A/ja
Publication of JPS6332264B2 publication Critical patent/JPS6332264B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
JP4065782A 1981-03-27 1982-03-15 Defect receiving terminal and ceramic chip carrier with radiating plate Granted JPS57166053A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US24859081A 1981-03-27 1981-03-27

Publications (2)

Publication Number Publication Date
JPS57166053A JPS57166053A (en) 1982-10-13
JPS6332264B2 true JPS6332264B2 (enrdf_load_stackoverflow) 1988-06-29

Family

ID=22939765

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4065782A Granted JPS57166053A (en) 1981-03-27 1982-03-15 Defect receiving terminal and ceramic chip carrier with radiating plate

Country Status (1)

Country Link
JP (1) JPS57166053A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0739242Y2 (ja) * 1987-12-22 1995-09-06 セイコーエプソン株式会社 半導体デバイス

Also Published As

Publication number Publication date
JPS57166053A (en) 1982-10-13

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