JPS6331978B2 - - Google Patents

Info

Publication number
JPS6331978B2
JPS6331978B2 JP14440083A JP14440083A JPS6331978B2 JP S6331978 B2 JPS6331978 B2 JP S6331978B2 JP 14440083 A JP14440083 A JP 14440083A JP 14440083 A JP14440083 A JP 14440083A JP S6331978 B2 JPS6331978 B2 JP S6331978B2
Authority
JP
Japan
Prior art keywords
channel
shift register
frame
input signal
synchronization flag
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP14440083A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6035847A (ja
Inventor
Yasuyuki Seki
Yoshihiro Kawada
Koichi Oonishi
Akira Himeno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Iwasaki Tsushinki KK
Original Assignee
Nippon Telegraph and Telephone Corp
Iwasaki Tsushinki KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp, Iwasaki Tsushinki KK filed Critical Nippon Telegraph and Telephone Corp
Priority to JP14440083A priority Critical patent/JPS6035847A/ja
Publication of JPS6035847A publication Critical patent/JPS6035847A/ja
Publication of JPS6331978B2 publication Critical patent/JPS6331978B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/04Speed or phase control by synchronisation signals
    • H04L7/048Speed or phase control by synchronisation signals using the properties of error detecting or error correcting codes, e.g. parity as synchronisation signal

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
JP14440083A 1983-08-09 1983-08-09 デイジタル信号受信方式 Granted JPS6035847A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14440083A JPS6035847A (ja) 1983-08-09 1983-08-09 デイジタル信号受信方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14440083A JPS6035847A (ja) 1983-08-09 1983-08-09 デイジタル信号受信方式

Publications (2)

Publication Number Publication Date
JPS6035847A JPS6035847A (ja) 1985-02-23
JPS6331978B2 true JPS6331978B2 (enrdf_load_stackoverflow) 1988-06-28

Family

ID=15361278

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14440083A Granted JPS6035847A (ja) 1983-08-09 1983-08-09 デイジタル信号受信方式

Country Status (1)

Country Link
JP (1) JPS6035847A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPS6035847A (ja) 1985-02-23

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