JPS63313277A - Method for checking wiring pattern - Google Patents

Abstract

PURPOSE:To easily detect the overlap of wiring patterns by modeling the size of a wiring pattern expressed by real size and its allowable conductor interval on a previously fixed glid as inhibition points and checking the overlap of both the inhibition points. CONSTITUTION:Patterns with different sizes such as a facing parts fitting pattern 1, a signal wiring pattern 2, a small-diameter beer hole 3, a power supply wiring pattern 4, a large-diameter beer hole 5 for a power supply wiring are mixed on a printed board. An expanded conductor width 9 corresponding to 1/2 the allowable conductor interval determined by the fixed size is determined from the interval in each printed board. The shapes of various patterns 1-5 are expanded by the size of the width 9 to determine an artificial pattern shape 10. The intersecting points of wiring channels 6 included in the artificial pattern shape 10 are defined as intersecting points 7, and when the set inhibition points have an overlap 8, a proximity defect is decided.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to the mounting design of printed circuit boards, and in particular to printed circuit boards that include patterns with dimensions different from general wiring patterns, such as surface-mounted component mounting patterns. Related to how to check the wiring pattern.

[Conventional technology]

Conventionally, checks on the pattern/shape and pattern gaps of printed circuit boards were discussed in the Information Processing Society of Japan's 30th Annual Conference Proceedings "Design Rule Verification J for Printed Circuit Board Design Systems (CADAS)" (P1899-P19oo). As shown in the figure, the calculation of coordinate values is based on the actual dimension values (10 to 10
We have attempted to speed up the processing by devising graphical calculation methods.

[Problem that the invention seeks to solve]

The above conventional technology allows accurate checking because the coordinate values are calculated using the actual dimensions when checking the wiring pattern, but when checking a higher-density, larger-scale board, an increase in processing time becomes a problem. An object of the present invention is to simplify the calculation of the coordinate values of a wiring pattern and to speed up the checking.

[Means for solving problems]

In order to achieve the above objective, it is important to reduce the number of calculations. Generally, the dimensions of the wiring pattern are expressed in 1/100 mm or 1/1000 scale, but due to mounting design or manufacturing constraints, the position matches the wiring channels set between 1 to 5 wires between 100 mil grid points. There are many things to do.

Therefore, we decided to model and set the wiring pattern dimensions and the minimum conductor spacing, which are expressed in actual dimensions, to match this wiring channel.

This achieves a reduction in the number of coordinate value calculations.

[Effect]

By matching the dimensions expressed in the actual dimensions to the wiring channels, the coordinate calculation unit can be expanded several tens to hundreds of times (1/
100 wm: 42 times, 1 with 5 interstitial channels
/ 1000 vrlr: 12 with 1 channel between grids
70 times), thereby reducing the number of coordinate calculations. Furthermore, by setting the wiring pattern dimensions and the minimum conductor spacing as prohibited points, there is no need to perform graphical calculations to determine the proximity of wiring patterns. .

〔Example〕

Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings.

FIG. 1 shows a part of a printed circuit board to which the present invention is applied.
This printed circuit board is used for small computers or terminals, and is designed with the aim of achieving high density and low cost.It has a surface mounting part mounting pattern 1, a signal wiring pattern 2, a small diameter pier hole 3. I
Et source wiring pattern 4 Large diameter pier hole 5 for power supply wiring
High-density packaging is achieved by mixing patterns with different dimensions.

The dimensions and spacing of these patterns are expressed in actual dimensions of about 1/1000 m.

In the present invention, wiring channels 6 are set at regular intervals on a printed circuit board on which such patterns 1 to 5 are mixed, and prohibited points 7 are recognized. Then, an overlap 8 of the prohibited points is recognized from the prohibited point 7, and a defect in the proximity of the wiring pattern 7 is extracted.

The process of removing adjacent defects will be shown below with reference to FIGS. 3 and 4.

(1) Determine the extended conductor width 9, which is half of the allowable conductor spacing determined as a fixed dimension for each printed circuit board. (2) Determine the extended conductor width 9 in the shapes of various patterns 1 to 5. Then, the virtual pattern shape 10 is determined.

(3) Wiring channel 6 included in virtual pattern shape 10
Let the intersection point be the prohibited point 7. Here, it is recognized which pattern the forbidden point 7 is based on.

(4) Check the set 70 overlapping prohibited points, and extract 8 overlapping prohibited points. Then, it is checked which pattern causes the overlap, and the pattern is pointed out as a proximity defect.

The flow of these processes is shown in FIG.

〔Effect of the invention〕

According to the present invention, it is possible to shorten the time required to check wiring pattern proximity conditions on the same board.

[Brief explanation of the drawing]

Fig. 1 is an explanatory diagram showing a substrate to which an embodiment of the present invention is applied, Fig. 2 is an explanatory diagram of the application result, Figs. 3 and 4 are explanatory diagrams showing the application process, and Fig. 5 is an explanatory diagram of the application result. It is a process flow diagram. ◎ 1... surface-mounted component mounting pattern, 2... pattern for signal wiring, 3... small diameter pier hole, 4... pattern for source wiring, 5... large diameter pier hole, 6...Wiring channel. 7...Prohibited points, 8...Overlap of prohibited points, 9...Extended conductor width, 10...Conceptual pattern shape・Representative Patent Attorney Masaru Ogawa Man-oriented 1.X Disease 2.Country 3rd hard n

Claims (1)

[Claims] 1. In a printed circuit board where wiring patterns with different dimensions such as line width and pad diameter coexist, the wiring pattern dimensions expressed in actual dimensions and their allowable conductor spacing are modeled as forbidden points on a predetermined grid. Accordingly, a wiring pattern checking method is characterized in that it is possible to detect short-circuits and proximity defects in wiring patterns only by checking the overlap of prohibited points.