JPS6329935A - Multilayer thin-film structure - Google Patents

Multilayer thin-film structure

Info

Publication number
JPS6329935A
JPS6329935A JP17448986A JP17448986A JPS6329935A JP S6329935 A JPS6329935 A JP S6329935A JP 17448986 A JP17448986 A JP 17448986A JP 17448986 A JP17448986 A JP 17448986A JP S6329935 A JPS6329935 A JP S6329935A
Authority
JP
Japan
Prior art keywords
layer
alxga1
xas
gaas
nitrogen
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17448986A
Other languages
Japanese (ja)
Other versions
JPH0666341B2 (en
Inventor
Yoshinari Matsumoto
松本 良成
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP17448986A priority Critical patent/JPH0666341B2/en
Publication of JPS6329935A publication Critical patent/JPS6329935A/en
Publication of JPH0666341B2 publication Critical patent/JPH0666341B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To lower an interface level, and to control interfacial physical properties by forming an AlxGa1-xAs (x represents 0.1<x<=1) layer and further shaping an AlxGa1-xAsN layer, to which N in 1X10<20>cm<-2> or more is introduced, onto said layer. CONSTITUTION:An AlxGa1-xAs (x=0.3) layer 13 is formed through an organic metal thermal decomposition epitaxial method in thickness of 1000Angstrom , and the ions of nitrogen are implanted from the surface of the layer 13. A layer up to approximately 850Angstrom from the surface of the AlxGa1-xAs layer 13 is changed into an amorphous high resistance region 15 as an AlxGa1-xAsN layer by applying heat treatment at 600 deg.C, and high resistivity of 10<11>OMEGAcm or more is acquired with excellent reproducibility by bringing the quantity of nitrogen ions implanted to 1X10<20>cm<-2> or more in the region 15. The low value of the level of 10<10>cm<-2>V<-1> is also obtained with superior reproducibility in interface level density. The characteristics are hardly varied even when the thickness of the amorphous high resistance region 15 by the implantation of nitrogen ions is changed between 800Angstrom and 980Angstrom , and excellent characteristics displayed.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明はIII−V族化合物半導体による絶縁膜とその
界面現象を利用したデバイスの実現、また、製造プロセ
スの安定化あるいはデバイスの信頼性の向上に繋がる半
導体材料上に形成した多層薄膜の構造に関する。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention is directed to the realization of a device using an insulating film made of a III-V compound semiconductor and its interface phenomenon, and also to the stabilization of a manufacturing process or the reliability of a device. The present invention relates to the structure of a multilayer thin film formed on a semiconductor material that leads to improved performance.

[従来の技術とその問題] 表面の安定化、金属−絶縁体−半導体()Ietal−
Insulator−3amiconductorの略
称としてMISとするのが一般的でおり以後この略称を
用いる)構造トランジスタの実現等に重要な半導体と絶
縁体の接触による界面物性を制御する技術はIII−V
族化合物半導体に対しては成功していない。
[Prior art and its problems] Surface stabilization, metal-insulator-semiconductor ()Ietal-
III-V is a technology that controls interface physical properties due to contact between a semiconductor and an insulator, which is important for realizing structural transistors, etc.
No success has been achieved with group compound semiconductors.

たとえば、■−V族化合物半導体の代表であるガリウム
ヒ素(GaAs)を例にとれば大気中に存在する酸素や
水分がGaAs表面を酸化し、このGaAS酸化層が後
に付着する絶縁膜との界面に挿入され易く、この界面層
等がGaASと絶縁膜の界面単位密度を増大ざぜる原因
となる場合がある。
For example, if we take gallium arsenide (GaAs), which is a representative of ■-V group compound semiconductors, oxygen and moisture present in the atmosphere oxidize the GaAs surface, and this GaAS oxide layer forms an interface with an insulating film that will be attached later. This interfacial layer etc. may cause an increase in the interfacial unit density between GaAS and the insulating film.

絶縁膜として通常用いられるSio2膜は3iに対して
は81表面のダングリング・ボンド(不対結合子)を閉
じる効果を有し、このダングリング・ボンドによる表面
単位密度を1010cm−2台にできることが実験的に
も示されており、理論的にも予想されている。しかし、
(3a、A、s等のI−V族化合物半導体に対しては表
面ダングリング・ボンドを閉じるような絶縁膜として何
がおるのか、現在模索段階にあるが、すでに絶縁膜とし
て良く知られているS : 02 、S !3 H4、
Af203等に代って、I[l−V族化合物絶縁膜を適
用する以外、MISトランジスタや表面安定化を実現す
る道はないのではないかと考えられている。例えばジボ
ラン(82H6)とアンモニア(NH3)から気相堆積
法(以後、CVD法と略称する〉で作られる■−V族化
合物半導体である窒化ポロン(BN)膜がインジウムリ
ン(InP)の絶縁膜に適用され、1010cm−2台
の低い界面準位密度が得られている。また窒化アルミニ
ウム(AJN>やアルミニウムガリウムヒ素(AlxG
aAs)等がMIS構造用の絶縁膜として分子線エピタ
キシャル成長法で形成されるなど■−V族化合物絶縁膜
の検討が進んでいる。
The Sio2 film, which is commonly used as an insulating film, has the effect of closing dangling bonds (unpaired bonds) on the 81 surface for 3i, and the surface unit density due to these dangling bonds can be on the order of 1010 cm-2. has been shown experimentally and is predicted theoretically. but,
(For I-V group compound semiconductors such as 3a, A, and s, we are currently at the stage of searching for an insulating film that closes the surface dangling bonds, but there are already well-known insulating films. S: 02, S!3 H4,
It is thought that there is no way to realize MIS transistors or surface stabilization other than applying an I[l-V group compound insulating film instead of Af203 or the like. For example, a poron nitride (BN) film, which is a ■-V group compound semiconductor, made from diborane (82H6) and ammonia (NH3) by a vapor phase deposition method (hereinafter abbreviated as CVD method) is an insulating film made of indium phosphide (InP). It has been applied to aluminum nitride (AJN>) and aluminum gallium arsenide (AlxG
Studies are progressing on ①-V group compound insulating films, such as aAs), which are formed by molecular beam epitaxial growth as insulating films for MIS structures.

すなわち、I−V族化合物半導体上にその禁制帯幅より
広い禁制帯幅を持ったI[I−V族化合物絶縁膜を形成
し、MISトランジスタや表面安定化膜へ適用しようと
いう動きが強まっている。しかし、上記のような製造等
によるBNやA42N膜等では薄膜合成時に合成苗内に
残留している酸素を膜中に取込みやすく、これが絶縁膜
内に深い準位や、また界面単位を形成する要因となって
いる様子であり、このためMIS特性や界面準位密度等
を必ずしも制御出来ていない。
In other words, there is a growing movement to form an I-V group compound insulating film with a wider bandgap than that of the I-V group compound semiconductor and apply it to MIS transistors and surface stabilization films. There is. However, in the case of BN or A42N films manufactured as described above, oxygen remaining in the synthetic seedlings is easily incorporated into the film during thin film synthesis, and this forms deep levels or interface units within the insulating film. This seems to be a factor, and for this reason, MIS characteristics, interface state density, etc. cannot necessarily be controlled.

また、A6NやGaNはGaAs等と同じ■−V族化合
物半導体群ではあるが、安定な結晶構造はウルツ構造で
あり、GaASやInP等のせん亜鉛鉱とは異なるため
、厚さ100人程度以上の薄膜をGaAS等の上に形成
すると均質な薄膜状には形成しにくいという問題がある
Also, A6N and GaN belong to the ■-V group compound semiconductor group like GaAs, etc., but their stable crystal structure is the Wurtz structure, which is different from the zincite such as GaAS and InP, so the thickness is about 100 mm or more. When forming a thin film on GaAS or the like, there is a problem that it is difficult to form a homogeneous thin film.

本発明の目的はGaAs等のIII−V族化合物半導体
上に絶縁膜を形成した構造であって、界面準位低減およ
び界面物性を制御することのできる構造を与えることに
ある。
An object of the present invention is to provide a structure in which an insulating film is formed on a III-V compound semiconductor such as GaAs, which can reduce interface states and control interface physical properties.

[問題点を解決するための手段] すなわち本発明はGaAsの上にAh G a 1−x A S (Xは0.1<x≦1を示す
)層、さらにその上にNを1×102°cm−2以上導
入したA I!  G a 1−X A S N (x
は0.1<x≦1を示′g)層を有することを特徴とす
る多層薄膜構造でおる。
[Means for Solving the Problems] That is, the present invention includes a layer of Ah Ga 1-x AS (X represents 0.1<x≦1) on GaAs, and a layer of N of 1×102 on top of the layer. AI that introduced more than °cm-2! G a 1-X A S N (x
It is a multilayer thin film structure characterized by having 0.1<x≦1 and g) layers.

[実施例] 以下、この発明を実施例に基づき詳細に説明する。[Example] Hereinafter, this invention will be explained in detail based on examples.

第1図(a)は本発明の多層薄膜ウェーハの模式的断面
図である。まずGaAS基板11の表面に電子濃度lX
1016cm−3のGaAs層12を厚さ1〜2Jm、
続いて不純物添加することなしにAJ2xGa、、 A
S (x = 0.3)層13を100OAの厚さで周
知の有機金属熱分解エピタキシャル法(MOCVD法)
により形成した。この発明の顕著な効果の一つは(3a
As@12とANxGa、−、A5(X= 0.3)層
13のなす界面14の特性改良に起因するものでおる。
FIG. 1(a) is a schematic cross-sectional view of a multilayer thin film wafer of the present invention. First, the electron concentration lX on the surface of the GaAS substrate 11
The GaAs layer 12 of 1016 cm-3 has a thickness of 1 to 2 Jm,
Subsequently, AJ2xGa,,A without adding any impurities
The S (x = 0.3) layer 13 was formed to a thickness of 100 OA using the well-known metal organic pyrolysis epitaxial method (MOCVD method).
It was formed by One of the remarkable effects of this invention is (3a
This is due to the improvement in the characteristics of the interface 14 formed between the As@12 and AN x Ga, -, A5 (X = 0.3) layers 13.

なお、用いた基板温度は650°Cでおり、■族のGa
およびAJ2原料にはトリメチルガリウム(TMG)e
よびトリメチルアルミニウム(TMA>を用い、■族の
AS原料にはアルシン(AsH3>を用いた。この後、
AβxGa1−x△S (X = 0.3)層13の表
面より窒素のイオン注入を行った。イオン注入原料には
窒素ガスを用い、加速電圧80KeVで行った。イオン
注入量は3×1021cm−2とした。その後、600
 ’Cでの熱処理を加えることにより、Af!xGai
、AS (X =0.3)層13の表面より約850人
が△I  Ga、−。
The substrate temperature used was 650°C, and the substrate temperature was 650°C.
and AJ2 raw material is trimethyl gallium (TMG).
and trimethylaluminum (TMA>), and arsine (AsH3>) was used as the AS raw material of group (2).After this,
Nitrogen ions were implanted from the surface of the AβxGa1-xΔS (X = 0.3) layer 13. Nitrogen gas was used as the raw material for ion implantation, and the acceleration voltage was 80 KeV. The amount of ion implantation was 3×10 21 cm −2 . After that, 600
By adding heat treatment at 'C, Af! xGai
, AS (X = 0.3) From the surface of the layer 13, about 850 people are ΔI Ga, -.

ASN層であるアモルファス状高抵抗化領域15となり
、1011Ωcm以上の高い抵抗率となった。注入量は
3×1021cm−2を実現するには多大な時間を要す
るため、第1図(b)に示すようにMISダイオード特
性を評価する領域についてのみイオン注入を選択的に行
った。アモルファス状となった領域15については窒素
のイオン注入量を1×1020cm−2以上にすると再
現性よ<1011Ωcm以上の高い抵抗率が得られた。
The resulting amorphous high-resistivity region 15, which is an ASN layer, had a high resistivity of 10 11 Ωcm or more. Since it takes a long time to achieve an implantation amount of 3.times.10.sup.21 cm.sup.-2, ions were selectively implanted only in the region where the MIS diode characteristics were to be evaluated, as shown in FIG. 1(b). Regarding the amorphous region 15, when the nitrogen ion implantation amount was set to 1×10 20 cm −2 or more, a high resistivity with reproducibility of <10 11 Ωcm or more was obtained.

また、この窒素イオン注入によるアモルファス状高抵抗
化領bi 15を得るには窒素の体積濃度は5 X ’
l019cm−3以上で得られることが分った。
In addition, in order to obtain the amorphous high resistance region bi15 by this nitrogen ion implantation, the volume concentration of nitrogen must be 5X'
It was found that it could be obtained at 1019 cm-3 or more.

次にこのようなGaAS層12層上2△β8Gai−x
 As (x = 0.3)層13に窒素イオン注入ア
モルファス状高抵抗化領IO,15を形成したものを絶
縁膜とし、この表面に500μsφの直径で金属(実施
例ではアルミニウム)を蒸着してMISダイオードを試
作し、この電圧(V)−容量(C)特性を評価したとこ
ろいわゆるヒステリシスは示さす、界面準位密度も10
10cm−2V −1台の低い値が再瑛性よく得られた
。また、この特性は窒素イオン注入によるアモルファス
状高抵抗化領域15の厚ざを800人から980Aの間
で変えた実験においてはほとんど変化することなく、良
好な特性を示した。
Next, 2Δβ8Gai-x on 12 such GaAS layers
An insulating film is formed by forming a nitrogen ion-implanted amorphous high resistance region IO, 15 on the As (x = 0.3) layer 13, and a metal (aluminum in the example) is deposited on the surface with a diameter of 500 μsφ. When we prototyped a MIS diode and evaluated its voltage (V)-capacitance (C) characteristics, it showed so-called hysteresis, and the interface state density was also 10.
A low value of 10cm-2V-1 was obtained with good re-eating performance. Further, in an experiment in which the thickness of the amorphous high-resistance region 15 formed by nitrogen ion implantation was varied from 800 to 980 amps, this characteristic hardly changed and showed good characteristics.

次に、この多層薄膜ウェーハを表面安定化膜として使用
した例を示す。
Next, an example will be shown in which this multilayer thin film wafer is used as a surface stabilizing film.

第2図にその模式的断面図を示すように、GaAS電解
効果トランジスタ(Field−Effect−Tra
nsistor : F E T )のソース31とゲ
ート32、およびドレイン33とゲート32の間のGa
AS表面34を本発明の膜構造で被覆したところ、Ga
ASFETで問題視されている動作時の電流の短期的、
長期的変化、すなわちドリフトはほとんどなくなった。
As shown in FIG. 2, a schematic cross-sectional view of the GaAS field-effect transistor
nsistor: FET) between the source 31 and gate 32 and the drain 33 and gate 32
When the AS surface 34 was coated with the film structure of the present invention, Ga
Short-term current during operation, which is considered a problem with ASFET,
Long-term changes, or drift, have almost disappeared.

この場合にはAj2  Ga1−xAS (X =× 0.3)層13の厚さに関する制限は実質的になく、か
つアモルファス状高抵抗化領域15の厚さについてもl
!xGa1−x AS (X = 0.3)層13の表
面よりGaAs層12とA j2  G a 1−x 
A S (X −0,3)層13のなす界面14から5
00人以上離してもドリフトはほと/υどなかった。
In this case, there is virtually no restriction on the thickness of the Aj2Ga1-xAS (X = x 0.3) layer 13, and there is also no restriction on the thickness of the amorphous high resistance region 15.
! xGa1-x AS (X = 0.3) From the surface of the layer 13, the GaAs layer 12 and A j2 Ga 1-x
5 from the interface 14 formed by the A S (X −0,3) layer 13
Even with more than 00 people separated, there was almost no drift.

一方、A I!  G a bx A S (X =0
.3)層13の組成Xは0.1<x≦1であるが、特に
0.2以上において、良好なMISダイオード特性と表
面安定化効果が得られた。
On the other hand, AI! G a bx A S (X = 0
.. 3) Although the composition X of the layer 13 satisfies 0.1<x≦1, particularly when it is 0.2 or more, good MIS diode characteristics and surface stabilization effects were obtained.

以上、本実施例ではA I!G a 1−x A S 
(X >× 0.2)層13をMOCVD法で形成したが、他の形成
法で必ってもよい。また、窒素イオン注入によるアモル
ファス状高抵抗化領域15に代って、Aj、 Ga1−
x AS (0,1<x≦1)層13をアンモニア(N
H3)やヒドラジン(N2町)の雰囲気中で加熱処理し
窒化することでも同様な高抵抗化領域15を得ることが
できる。
As mentioned above, in this example, AI! G a 1-x A S
(X>×0.2) Although the layer 13 is formed by MOCVD, it may be formed by other methods. In addition, instead of the amorphous high resistance region 15 formed by nitrogen ion implantation, Aj, Ga1-
x AS (0,1<x≦1) The layer 13 is made of ammonia (N
A similar high resistance region 15 can also be obtained by heat treatment and nitriding in an atmosphere of H3) or hydrazine (N2 town).

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の多層薄膜構造を有するウェーハの模式
的断面図、第2図はそれをGaAsFE下に適用した場
合のFETの模式的断面図でおる。 11−G a A s基板   12−G a A s
層13−A I!xGaFxA s層 14・・・界面 15・・・アモルファス状高抵抗化領域31・・・ソー
ス      32・・・ゲート33・・・ドレイン 
    34・・・GaAs表面第1図
FIG. 1 is a schematic cross-sectional view of a wafer having a multilayer thin film structure according to the present invention, and FIG. 2 is a schematic cross-sectional view of an FET in which the wafer is applied under GaAsFE. 11-GaAs substrate 12-GaAs
Layer 13-AI! xGaFxA s layer 14...interface 15...amorphous high resistance region 31...source 32...gate 33...drain
34...GaAs surface Figure 1

Claims (1)

【特許請求の範囲】[Claims] (1)GaAsの上にAl_xGa_1_−_xAs(
xは0.1<x≦1を示す)層、さらにその上にNを1
×10^2^0cm^−^2以上導入したAl_xGa
_1_−_xAsN(xは0.1<x≦1を示す)層を
有することを特徴とする多層薄膜構造。
(1) Al_xGa_1_-_xAs(
x indicates 0.1<x≦1) layer, and furthermore, 1 layer of N is added on top of it.
×10^2^0cm^-^2 or more introduced Al_xGa
A multilayer thin film structure comprising a _1_-_xAsN (x represents 0.1<x≦1) layer.
JP17448986A 1986-07-23 1986-07-23 Multi-layer thin film structure Expired - Lifetime JPH0666341B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17448986A JPH0666341B2 (en) 1986-07-23 1986-07-23 Multi-layer thin film structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17448986A JPH0666341B2 (en) 1986-07-23 1986-07-23 Multi-layer thin film structure

Publications (2)

Publication Number Publication Date
JPS6329935A true JPS6329935A (en) 1988-02-08
JPH0666341B2 JPH0666341B2 (en) 1994-08-24

Family

ID=15979378

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17448986A Expired - Lifetime JPH0666341B2 (en) 1986-07-23 1986-07-23 Multi-layer thin film structure

Country Status (1)

Country Link
JP (1) JPH0666341B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04111425A (en) * 1990-08-31 1992-04-13 Fujitsu Ltd Manufacture of semiconductor device
US6441548B1 (en) 2000-02-18 2002-08-27 Mitsubishi Denki Kabushiki Kaisha Discharging and light emitting device
US6674061B1 (en) 2000-02-18 2004-01-06 Mitsubishi Denki Kabushiki Kaisha Contact image sensor unit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04111425A (en) * 1990-08-31 1992-04-13 Fujitsu Ltd Manufacture of semiconductor device
US6441548B1 (en) 2000-02-18 2002-08-27 Mitsubishi Denki Kabushiki Kaisha Discharging and light emitting device
US6674061B1 (en) 2000-02-18 2004-01-06 Mitsubishi Denki Kabushiki Kaisha Contact image sensor unit

Also Published As

Publication number Publication date
JPH0666341B2 (en) 1994-08-24

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