JPS63296155A - Peripheral control unit - Google Patents

Abstract

PURPOSE:To improve responsiveness for a command from a CPU and to accelerate the control operation of a peripheral unit, by storing the command in a local memory without waiting the completion of the processing of a channel. CONSTITUTION:When a data transfer start command, a parameter setting command, and a status request command, etc., for another channel are generated while a first peripheral unit 5-1 connected to a first channel performs data transfer with a main memory 3, a command transmission request from the CPU1, if it is generated, is stored in the local memory 9 transiently, and it is read out from the local memory 9 after a processing by using the first channel is completed, and the command is executed. In such a case, if two processings, the processing in the peripheral control unit 4 and the processing to store the command from the CPU1, are executed simultaneously, the processing to store the command from the CPU1 is performed preferentially, and the usage of the channel for the processing in the peripheral control unit 4 is postponed until the storage of the command is completed. In such a way, it is possible to reduce load from being applied on the CPU1 without increasing a hardware quantity.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a peripheral control device that controls a plurality of peripheral devices, and relates to processing of commands from a 4IK and central processing unit.

Conventional technology Conventionally, this type of peripheral control device that has multiple channels and controls multiple peripheral devices connects the peripheral devices to a common control section connected to a communication bus, as shown in Figure 1. multiple channels are controlled. Now, the first
When the first peripheral device connected to the channel Km performs data transfer with the main memory device (hereinafter abbreviated as MM), the common control section is dedicated to the first channel, so the central processing unit ( (hereinafter abbreviated as CPU)
Data transfer start commands, parameter setting commands, status request commands, etc. executed for the first channel can be accepted after the first channel is released from exclusive use.

Problems to be Solved by the Invention In the conventional peripheral control device described above, as shown in FIG. Since the common control section is dedicated to the first channel, the CPU
Data transfer start commands, parameter setting commands, status request commands, etc. executed for the fourth channel can be accepted after exclusive use of the first channel is released. For this reason, the execution speed of the above-mentioned commands and the like is extremely slow, causing a decrease in the processing efficiency of the CPU.

The present invention has been made in order to eliminate the above-mentioned drawbacks inherent in the conventional technology.Therefore, the present invention aims to improve responsiveness to commands from the CPU and to speed up the control operation of one peripheral device. It is an object of the present invention to provide a novel peripheral control device that makes it possible to

Means for Solving the Problems In order to achieve the above object, a peripheral control device according to the present invention provides a first peripheral device connected to a first channel Km.
If data transfer start commands, parameter setting commands, status request commands, etc. for other channels are generated during data transfer with M, these can be processed using the first channel as in conventional devices. Instead of waiting for the process to finish using the first channel and sending a new command to the other channel, if there is a request to send a command from the CPU, it is temporarily stored in the local memory, and as soon as the processing using the first channel is finished, it is sent to the local memory. and execute the command.

In this case, local memory is used for two purposes: processing within the peripheral control device and storing commands from the CPU, but if these two processes are performed at the same time, priority is given to storing commands from the CPU. The command is then used for processing within the peripheral control device after the command is stored.

By doing this, the load on the CPU can be reduced without increasing the amount of hardware.

Embodiment Next, a preferred embodiment of the present invention will be specifically explained with reference to the drawings. FIG. 1 is a block diagram showing the position of a peripheral control device according to the present invention in a system. #
! In Figure 1, peripheral control unit #, 4 MM3, CPU
1 and is connected to a communication bus 2. Further, peripheral devices 5 (5-1 to 5-4) are connected to the peripheral control device 4.

FIG. 2 is a block diagram showing an embodiment of the peripheral control device according to the present invention.

Referring to FIG. 2, a peripheral control device CPU according to the present invention
One embodiment includes a bus controller 6, an adapter 7,
Processing bag #, 8, local memory 9, conflict time w110
It has The bus controller 6 is connected to the communication bus 2 and exchanges commands or data with the CPU 1%MM (main memory) 3 and other peripheral control units (PCU) 12. 8 processing units, communication bus 2, bus controller 6
Process the commands received through and record the results locally if necessary! Store JK. The local memory 9 stores a command to use the channel when a command to use the channel is sent while storing the results processed by the processing device 8 or transferring data using the channel. The contention circuit checks whether the communication bus 2 uses the local memory 9 or the processing unit ft8 uses the local memory 9, and determines whether the communication bus 2 uses the local memory 9, that is, when the channel is being used. When a command requesting transfer using this channel is sent, processing of processing bag f8 is stopped. and,
When the communication bus 2 finishes using the local memory 90, the processing of the processing device 8 is restarted. Adapter 7 is peripheral WL11
Convert the data to .

Next, the operation and effects of this embodiment will be described.

The peripheral control device t that controls a plurality of peripheral devices is recognized by the software so that all the peripheral devices are independently controlled. However, the software that decodes commands from the CPU and controls peripheral devices is expensive and expensive.
It is difficult to provide one for each peripheral device due to mounting restrictions and other reasons. Therefore, in such a peripheral control device, while the above-mentioned hardware is performing processing related to one peripheral device, commands from the CPU to another peripheral device are made to wait.

In this embodiment, commands from the CPU for logical channels corresponding to peripheral devices are stored in local memory. Therefore, while a channel is executing a command from the CPU, the CPU for that channel
Commands from U will not be rejected, and responsiveness to commands from the CPU will be improved with the addition of a small amount of hardware.

As described in detail, the single-issue 8AK improves responsiveness to commands from the CPU and controls peripheral devices by storing commands in local memory without waiting for the completion of channel processing47. This has the effect of speeding up the operation.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the position within a system of an embodiment of the present invention, and FIG. 2 is a block diagram showing an embodiment of the CPU portion shown in FIG.

Claims (1)

[Claims] Processing of signals or commands for instructing input/output operations in a data processing system having a central processing unit, a peripheral control device for controlling a plurality of peripheral devices, and a communication bus for transferring information between said devices In a peripheral control device that logically has a plurality of channels for processing operations and data transfer of peripheral devices, a local memory that stores processing results within the peripheral control device and commands from the central processing unit; A peripheral control device comprising: a logic circuit that determines whether a control device uses the local memory or a central processing unit uses the local memory; and a processing device that processes commands.