JPS63296116A - Power source disconnection monitoring circuit system - Google Patents

Power source disconnection monitoring circuit system

Info

Publication number
JPS63296116A
JPS63296116A JP13216587A JP13216587A JPS63296116A JP S63296116 A JPS63296116 A JP S63296116A JP 13216587 A JP13216587 A JP 13216587A JP 13216587 A JP13216587 A JP 13216587A JP S63296116 A JPS63296116 A JP S63296116A
Authority
JP
Japan
Prior art keywords
power source
processing unit
power
central processing
source disconnection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13216587A
Other languages
Japanese (ja)
Inventor
Yasushi Yamauchi
康司 山内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP13216587A priority Critical patent/JPS63296116A/en
Publication of JPS63296116A publication Critical patent/JPS63296116A/en
Pending legal-status Critical Current

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  • Power Sources (AREA)

Abstract

PURPOSE:To automatically perform a continuous processing after a power source is recovered, by applying system reset on all of the related peripheral devices in addition to a central processing unit by an output from a power source disconnection recovery detecting part which detects the recovery of power source disconnection. CONSTITUTION:A power source disconnection detecting part 1 monitors an AC voltage, and outputs a power source disconnection signal when the power source disconnection continues for a constant time. A compulsory interruption part 2 confirms the fact that the power source disconnection signal is not an error signal due to noise, etc., and applies interruption on the central processing unit, and interrupts the operation of the central processing unit. Also, the power source disconnection recovery detecting part 3 outputs a recovery signal when an operable state is set by supplying a regulated voltage, etc., to the central processing unit. And system reset part 4 sends reset signals to the central processing unit and all of the related peripheral devices, then, performs the initialization of the system.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は電源断監視回路方式に関し、特に電源断の検出
時は割込みにて中央処理装置に通知する情報処理システ
ムにおける電源断監視回路方式に関する。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a power-off monitoring circuit system, and particularly to a power-off monitoring circuit system in an information processing system that notifies a central processing unit by an interrupt when a power outage is detected. .

〔従来の技術〕[Conventional technology]

従来、この種の電源断監視回路方式は、電源断を検出し
て中央処理装置に割込みにより電源断の発生を通知し、
中央処理装置が直流電源の電源断耐力時間の間に必要な
待避処理を行なうことができるようにしている。
Conventionally, this type of power-off monitoring circuit system detects a power-off and notifies the central processing unit of the occurrence of a power-off through an interrupt.
The central processing unit is able to perform necessary evacuation processing during the power-off tolerance time of the DC power supply.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかし、上述した従来の電源断監視回路方式は、電源断
発生時において強制的な割込みが中央処理装置に通知さ
れる様になっているので、電源復旧時に自動的にリセッ
トする機能を有するものでも、短時間の電源断では全て
の処理装置にリセットがされずにそのまま停止状態にな
るとが、周辺装置に誤った制御信号を出力する可能性が
あるという欠点がある。
However, in the conventional power-off monitoring circuit system described above, a forced interrupt is notified to the central processing unit when a power-off occurs, so even if it has an automatic reset function when the power is restored, However, if the power is cut off for a short time, all the processing units will not be reset and will remain in a stopped state, but there is a drawback that there is a possibility that erroneous control signals will be output to peripheral devices.

本発明の目的は、電源断時に割込みにより中央処理装置
に電源断を通知する情報処理システムにおいて、電源復
旧時にシステムリセットを行なうことにより、電源復旧
後に自動的に継続した処理の行なえる電源断監視回路を
提供することにある。
An object of the present invention is to provide a power-off monitoring system that notifies a central processing unit of a power-off using an interrupt when the power is turned off, and that enables automatic continuation of processing after the power is restored by resetting the system when the power is restored. The purpose is to provide circuits.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、入力の電源断を検出して割込みにて電源断を
中央処理装置に通知する電源断監視回路方式において、
電源断の復旧を検出する電源断復旧検出部と、この電源
断復旧検出部からの出力で前記中央処理装置の他に関連
する全ての周辺装置にリセット信号を与えるシステムリ
セット部とを有して構成される。
The present invention provides a power-off monitoring circuit system that detects an input power-off and notifies a central processing unit of the power-off using an interrupt.
The system includes a power-off recovery detection unit that detects recovery from a power-off recovery, and a system reset unit that uses the output from the power-off recovery detection unit to provide a reset signal to all related peripheral devices in addition to the central processing unit. configured.

〔実施例〕〔Example〕

次に、本発明の実施例について図面を参照して説明する
Next, embodiments of the present invention will be described with reference to the drawings.

第1図は本発明の一実施例の構成図である。1は電源断
検出部であり、交流電圧を監視していて、一定時間電源
断が続いた場合に電源断信号を出力する。2は強制割り
込み部であり、1からの電源断信号が雑音等により誤信
号でないことを確認して中央処理装置に強制割込みを行
ない、中央処理装置の動作を中断させる。3は電源断復
旧検出部であり、中央処理装置に規定の電圧等が与えら
れて動作可能状態になった場合に、復旧信号を出力する
。4はシステムリセット部であり、復旧信号を受けると
中央処理装置ならびに関連する周辺装置の全てにリセッ
ト信号を送出して、システムのイニシャライズを行なう
FIG. 1 is a block diagram of an embodiment of the present invention. Reference numeral 1 denotes a power-off detection unit which monitors the AC voltage and outputs a power-off signal if the power continues to be cut off for a certain period of time. Reference numeral 2 denotes a forced interrupt unit, which after confirming that the power-off signal from 1 is not an erroneous signal due to noise or the like, issues a forced interrupt to the central processing unit, thereby interrupting the operation of the central processing unit. Reference numeral 3 denotes a power-off recovery detection unit, which outputs a recovery signal when a specified voltage or the like is applied to the central processing unit and the central processing unit becomes operational. Reference numeral 4 denotes a system reset unit which, upon receiving the recovery signal, sends a reset signal to the central processing unit and all related peripheral devices to initialize the system.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、電源断復旧検出を行い、
システムリセットを行なうことにより、復旧時のシステ
ム停止、および再スタートをした場合の誤動作を回避す
ることができ、復旧時の正常な動作を保証できる効果と
、ソフトウェアの介入を必要とせず、短時間の電源断に
おいて従来リセットが充分できなかった場合においても
自動でシステムリセットができ、中央処理装置はシステ
ムの完全なイニシャライズに続いて処理の再会ができる
効果がある。
As explained above, the present invention performs power failure recovery detection,
By performing a system reset, it is possible to avoid system stoppages during recovery and malfunctions when restarted, and it has the effect of guaranteeing normal operation during recovery, as well as a short time without the need for software intervention. The system can be automatically reset even when the conventional system cannot be reset sufficiently due to power-off, and the central processing unit can resume processing after completely initializing the system.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の構成図である。 1・・・電源断検出部、2・・・強制割込み部、3・・
・電源断復旧検出部、4・・・システムリセット部。
FIG. 1 is a block diagram of an embodiment of the present invention. 1... Power-off detection section, 2... Forced interrupt section, 3...
- Power-off recovery detection section, 4... system reset section.

Claims (1)

【特許請求の範囲】[Claims] 入力の電源断を検出して割込みにて電源断を中央処理装
置に通知する電源断監視回路方式において、電源断の復
旧を検出する電源断復旧検出部と、この電源断復旧検出
部からの出力で前記中央処理装置の他に関連する全ての
周辺装置にリセット信号を与えるシステムリセット部と
を有することを特徴とする電源断監視回路方式。
In a power-off monitoring circuit system that detects an input power-off and notifies the central processing unit of the power-off using an interrupt, there is a power-off recovery detector that detects recovery from a power-off, and an output from this power-off recovery detector. and a system reset section that provides a reset signal to all related peripheral devices in addition to the central processing unit.
JP13216587A 1987-05-27 1987-05-27 Power source disconnection monitoring circuit system Pending JPS63296116A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13216587A JPS63296116A (en) 1987-05-27 1987-05-27 Power source disconnection monitoring circuit system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13216587A JPS63296116A (en) 1987-05-27 1987-05-27 Power source disconnection monitoring circuit system

Publications (1)

Publication Number Publication Date
JPS63296116A true JPS63296116A (en) 1988-12-02

Family

ID=15074884

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13216587A Pending JPS63296116A (en) 1987-05-27 1987-05-27 Power source disconnection monitoring circuit system

Country Status (1)

Country Link
JP (1) JPS63296116A (en)

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