JPH064418A - Abnormality processing system for memory backup device - Google Patents

Abstract

PURPOSE:To execute an appropriate treatment for preventing a data dissipation by an OS, when the fault of an uninterruptible power unit for backing up a power source of a shared memory device is detected. CONSTITUTION:This system is provided with an alarm interface 8 for reporting a fault from a no-break power unit 3 to a shared memory device 2, and also, provided with an interruption request interface 5 for requesting an interruption from the shared memory device 2 to a processor 1. When the fault report of the no-break power unit 3 is received through the alarm interface 8, the shared memory device 2 requests an interruption by an interruption request line 5 to an OS on the connected processor 1. In such a way, the OS can recognize the fault of the no-break power unit 3, and can execute an appropriate treatment for preventing a data dissipation such as saving the contents of the shared memory device 2 in a DASD, etc.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an abnormality processing method for a memory backup device, and more particularly to a multiprocessor system having a shared memory device, or a system in which the memory device is connected to one processor.
The present invention relates to an abnormality processing method for a memory backup device, which is suitable for backing up the power supply of a memory device with an uninterruptible power supply.

[0002]

2. Description of the Related Art As a conventional technique relating to abnormality processing of a memory backup device, for example, Japanese Patent Laid-Open No. 3-131918.
Techniques described in Japanese Patent Publications and the like are known.

This prior art is to display an abnormality by a lamp, a buzzer or the like when an abnormality occurs in a power source that backs up a memory such as a semiconductor memory, for example, an uninterruptible power supply.

[0004]

In the prior art, when a failure of the power supply for backing up the semiconductor memory is detected, the abnormality is detected in the operating system (hereinafter referred to as OS) that controls the operation of the entire system. No consideration is given to the means for informing, and therefore, there is a problem that it is not possible to take appropriate measures for preventing data loss such as dump acquisition by the OS in preparation for a power failure.

An object of the present invention is to solve the above-mentioned problems of the prior art and, when a failure of the uninterruptible power supply for backing up the power supply of the memory device is detected, a proper procedure for preventing data loss by the OS. An object of the present invention is to provide an abnormality processing method for a memory backup device that enables the above.

[0006]

According to the present invention, the above object is to provide an interface for reporting a failure from an uninterruptible power supply for backing up the power supply of a memory device to the memory device and an interface for requesting an interrupt from the memory device to a processor. When the uninterruptible power supply fails, the memory device interrupts the OS on the processor connected to itself and reports the failure of the uninterruptible power supply. Achieved by

[0007] Further, the above-mentioned object is that, when a failure occurs in the uninterruptible power supply, the OS periodically updates the contents of the memory with DASD (Direct Access Storage) as needed.
This is achieved by saving the data to a device) or, in the case of a system in which the OS constantly saves the content of the memory to DASD, shortens the interval for saving the content of the memory.

[0008]

By providing an alarm interface for reporting a failure of the uninterruptible power supply between the uninterruptible power supply and the memory device, a failure of the uninterruptible power supply for supplying power to the memory device via the alarm interface. The status can be notified to the memory device.

Further, by providing an interrupt request interface between the memory device and a processor using the memory device, the memory device is connected when a failure report is received from the uninterruptible power supply. An interrupt request can be issued to all processors to notify them of the abnormality.

On the other hand, when the OS on each processor detects that a failure has occurred in the uninterruptible power supply due to an interrupt, it periodically saves the contents of the memory to DASD, thereby saving the data at the time of power failure. It can be prevented from disappearing.

Further, in the case of a system in which the OS regularly saves the contents of the memory to DASD at regular intervals, by shortening the saving interval, the recovery process after a power failure can be facilitated.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of an abnormality processing system for a memory backup device according to the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram showing the system configuration of an embodiment of the present invention, and FIG. 2 is a block diagram showing the configuration of a shared memory device. 1 and 2, 1 is a processor, 2 is a shared memory device, 3 is an uninterruptible power supply device, and 4 is D
ASD, 5 is an interrupt interface, 6 is a data line, 7
Is a power supply line, 8 is an alarm interface, 10 is an interrupt requesting means, 11 is a STATUS register, and 12 is an alarm detecting means.

A system according to an embodiment of the present invention shown in FIG. 1 is an example in which the present invention is applied to a multiprocessor system having a shared memory device, and a plurality of processors 1 to which DASD 4 is connected are shared by one. The memory device 2 is connected to the memory device 2, and is normally operated by a power supply from a power supply device that supplies power to the entire system (not shown). Then, in preparation for the failure of the power supply device normally used, only the shared memory device 2 is backed up by the uninterruptible power supply device 3.

Therefore, in the illustrated system, when the above-mentioned normal power supply device fails, the shared memory device 2 is
Power is supplied from the uninterruptible power supply 3 via the power supply line 7, and thereby various data stored in the shared memory device 2 can be protected.

The present invention relates to processing when a failure occurs in the uninterruptible power supply 3 in such a computer system.

In the system according to the embodiment of the present invention shown in FIG. 1, it is assumed that the uninterruptible power supply 3 has a failure. When the uninterruptible power supply 3 detects that a failure has occurred in itself, the uninterruptible power supply 3 reports the occurrence of the failure to the shared memory device 2 via the alarm interface 8.

The shared memory device 2 receiving this report sends an interrupt request to the processors # 0 and # 1 by the interrupt request interface 5. The OS on each processor is
Recognizing that a failure has occurred in the uninterruptible power supply 3 by this interrupt, and according to a predetermined failure processing procedure,
The contents of the shared memory device 2 are saved in the DASD 4 constituted by a magnetic drum device, a magnetic disk device and the like.

The shared memory device 2, as shown in FIG.
Interrupt request means 10, a STATUS register 11,
The alarm detection means 12 is provided. The alarm detection means 12 detects a failure report from the uninterruptible power supply 3 via the alarm interface 8 and outputs set signals 14 and 13 to the interrupt request means 10 and the STATUS register 11.

This set signal 13 turns on the bit indicating that the uninterruptible power supply unit of the STATUS register 11 is in failure, and the set signal 14 is the interrupt request means 10.
To request an interrupt to the processors # 0 and # 1 via the interrupt request interface 5.

In response to this interrupt request, the OS on each processor can read the STATUS register 11 to recognize the failure of the uninterruptible power supply 3 and execute the data saving as described above.

According to the above-described embodiment of the present invention, since the OS on each processor can recognize the failure of the uninterruptible power supply 3 which backs up the power supply of the shared memory device 2, it is appropriate for the power failure. In the above-described embodiment, the contents of the shared memory device 2 are changed to DASD4.
It is possible to take measures to evacuate to.

In the above-described embodiment of the present invention, each OS on a plurality of processors copies the contents of the shared memory device 2 to D, respectively.
Although it is explained that the data is saved in the ASD4, the present invention raises an interrupt request only to the OS on one processor,
The OS may take measures to save the contents of the shared memory device 2 to the DASD 4, and the interrupt request is sent to the OS on a plurality of processors, and the above OS is executed by only one of the OSs. You may make it perform, and the same effect can be acquired also in these cases.

The above-described embodiment of the present invention is one in which the present invention is applied to a system in which the contents of the shared memory during normal operation are not saved periodically. Can be applied to a system that regularly evacuates. In this case, the OS of the processor, which has detected the failure of the uninterruptible power supply, can easily perform the recovery process after the power failure recovery of the normal power supply by shortening the data saving interval.

Although the above-described embodiments of the present invention have been described by applying the present invention to a multiprocessor system having a shared memory device, the present invention is a system in which a memory device and a processor have a one-to-one correspondence. The same effect can be obtained in this case as well.

[0026]

As described above, according to the present invention, the OS of each processor can recognize the failure of the uninterruptible power supply for backing up the power supply of the shared memory device. Appropriate measures can be taken to prevent the loss of data.

[Brief description of drawings]

FIG. 1 is a block diagram showing a system configuration of an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a shared memory device.

[Explanation of symbols]

 1 Processor 2 Shared Memory Device 3 Uninterruptible Power Supply 4 DASD 5 Interrupt Request Interface 6 Data Line 7 Power Supply Line 8 Alarm Interface 10 Interrupt Request Means 11 STATUS Register 12 Alarm Detection Means

Claims (4)

[Claims] 1. In the abnormality processing method of a memory backup device in a system including a memory device used by a processor and an uninterruptible power supply device that backs up the power supply of the memory device, a failure occurs in the uninterruptible power supply device. In this case, the uninterruptible power supply sends a failure report to the memory device, and the memory device receiving the failure report reports the failure to the operating system on the connected processor by an interrupt. Abnormality processing method of memory backup device. 2. The abnormality processing method for a memory backup device according to claim 1, wherein the operating system saves the contents of the memory to DASD after receiving the report of the failure. 3. The operating system, after receiving the failure report, periodically saves the contents of the memory to DASD until the failure of the uninterruptible power supply is recovered. Abnormality processing method of memory backup device. 4. A memory device used by a processor and an uninterruptible power supply for backing up the power supply of the memory device, wherein an operating system on the processor constantly saves the contents of the memory to DASD at regular intervals. When a failure occurs in the uninterruptible power supply in the abnormality processing method of the memory backup device in the existing system, the uninterruptible power supply raises a failure report to the memory device, and the memory device receiving the failure report is connected. A failure is reported to the operating system on the existing processor by an interrupt, and the operating system receiving this report saves the contents of the memory to DASD until the failure of the uninterruptible power supply is recovered. Difference in memory backup device characterized by shortening Regular processing method.