JPS63293916A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To eliminate a defect of an Al wiring part to enhance the Al processing accuracy by a method wherein a mask pattern for etching a groove having a cut-out part at an end part of the groove is used during a first photographic treatment. CONSTITUTION:After one part of the surface of a semiconductor substrate has been etched during a first photographic treatment, a groove is formed; after one part of an aluminum film evaporated on the whole surface including the groove has been removed during a second photographic treatment, an aluminum pattern crossing the neighborhood of an end of the groove is formed. During this process, if the groove 11 is formed by using a mask pattern having a cut-out part, the end part, the end part 15 of the groove is formed to be a wavy shape; when the photographic treatment to form an Al wiring pattern by evaporation of Al is executed, it is possible to avoid that the light which has irradiated the end part 15 of the groove is converged to one point as occurred in a conventional shape; a possibility to cause a partial defect of the Al wiring part is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a photoprocessing technique for a semiconductor device, particularly a semiconductor integrated circuit device having a U-shaped groove for element isolation.

[Conventional technology]

Regarding the technology of using U-shaped grooves for element isolation in semiconductor integrated circuit devices, see Japanese Patent Application Laid-Open No. 58-79752 and Nikkei McGraw-Hill NIKKEI EIECTRO-N.
IC3I 982. 3.29, p94-97.

According to these documents, the surface of the Si substrate is selectively etched to
There are cases in which a shaped groove is formed and an oxide (SiOm) film is formed on the surface of the groove and used as is for isolation, and in which the inside of the groove where the oxide film has been formed is filled with poly-Si etc. and the top is further covered with an oxide film. There are cases where it is used for separation. In either case, by using narrow grooves, the area of the isolation region is smaller than in conventional junction isolation or oxide film isolation means, which is advantageous for high integration.

[Problem that the invention seeks to solve]

The present inventors used the former method of the above to obtain IIL (
injection integrated logic circuit) isolation between adjacent gates in VC;
We are considering using a U-shaped groove in the so-called collar part. FIG. 4(a) shows a blank part 1 of such IIL. It shows the patterns of the diffusion layer 2 and the Aβ wiring 3.

A portion of this collar is not annular, but is partially cut off to form one end 4 of the collar. Such a U-shaped groove in the collar portion 1 is formed in the Si substrate by means of etching or the like using a photoresist mask formed by photographic processing. The end 4 of the groove is shown in Figure 3 (
As shown in Fig. 3(b) and Fig. 4), the grooves are usually rectangular in shape on the mask pattern, but because the groove width is extremely small, for example, 3 μm or less, when viewed from above, the grooves have a rectangular shape as shown in Fig. 3(b) and Fig. 4). A semicircular pattern I is formed, and when the Si substrate is wet-etched using this mask, it becomes a hemispherical pattern. When forming another pattern, for example, An wiring 3, on the surface of the substrate 9 across such a groove, an AAA layer is formed on the entire surface including the groove through an oxide film, as shown in FIGS. 6 and 7.
C3 is formed, and then photoresist (positive type) 5 is applied on top of it.
Apply. A mask 7 is passed over this during positive resist exposure. The hemispherical groove end 4 covered with the film 6 acts as a concave mirror, and the light is concentrated on the resist where wiring is to be formed, causing a photodecomposition reaction in the resist. As shown, this caused undesirable shapes such as defects 8 to occur in a portion of the aluminum wiring 3.

The present invention has been made to overcome the above-mentioned problems, and its purpose is to provide a technique for preventing a pattern crossing the grooves on the surface of a substrate from being deleted or deformed by the grooves. be.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means to solve the problem]

A brief overview of typical inventions disclosed in this application is as follows.

That is, a part of the surface of the semiconductor substrate is etched in a first photo process to form a groove, and a part of the aluminum film deposited on the entire surface including the groove is removed in a second photo process to form a groove edge. In forming the aluminum pattern across the vicinity, the first photoprocessing is carried out in such a way as to avoid concentration of light from the edge of the groove with the aluminum film onto the aluminum pattern area during the second photoprocessing. In this method, a groove etching mask pattern having a notch at the groove end is used.

[Effect]

According to the above-mentioned means, since the groove ends are notched, there is no concentration of light in the second photographic processing, and there is no fear of causing defects in the aluminum pattern, thereby achieving the above object.

〔Example〕

FIGS. 1(a) and 1(b) show an embodiment of the present invention, and FIG. 1(a) shows a mask pattern having a cut 10 at the end of the groove for forming a groove. (b
) is the planar shape of the groove end obtained by this mask pattern.

By forming the grooves 11 using a mask pattern having such notches, the groove ends 15 have a wavy shape, and when photo processing is performed to form an Aa wiring pattern by A color vapor deposition, the groove ends are The irradiated light is prevented from concentrating on one point as in the conventional shape, and the possibility of a partial defect in the Ak wiring is reduced.

Note that the reason why the desired groove shape can be obtained with a mask pattern having notches like that shown in FIG. Therefore, if the grooves are not fine, the groove shape will not differ from the mask pattern in this way.

Conventionally, it is necessary to reduce the exposure amount to prevent shape defects, and it is not possible to select the optimal exposure amount for processing. However, according to the present invention, the exposure amount can be determined without such restrictions.

FIG. 5(a) shows a pattern when the present invention is applied to IIL, and 1 is a pattern 10 of a part of the collar consisting of U-shaped grooves.
is a pattern of groove ends provided with notches. )
shows the groove 11 and A2 wiring 13 whose wavy edges 15 were obtained using the above pattern.

Although the invention made by the present invention has been specifically explained based on the examples above, the present invention is not limited to the above-mentioned examples, and various changes can be made without departing from the gist thereof.

For example, the mask pattern for forming the groove ends is
As shown in Figure (a), a zigzag shaped portion 16 may be provided, and by using such a pattern,
A groove 11 having a finely wavy end portion 17 is obtained as shown in FIG.

The present invention can be applied to semiconductor products in general that have a trench and a wiring pattern that crosses the trench.

〔Effect of the invention〕

A brief explanation of the effects obtained by typical inventions disclosed in this application is as follows.

In other words, it is possible to select the optimal conditions for A-type machining without any defects in the A1 wiring, and improve the An-type machining accuracy.

[Brief explanation of drawings]

FIG. 1 shows an embodiment of the present invention, in which (a) is a plan view of a mask pattern for forming a groove end, and (b) is a plan view of a groove end obtained by the pattern described above. FIG. 2 shows an application example of the present invention, in which (a) is a plan view of a mask pattern, and (b) is a plan view of a groove end. FIG. 3 is a plan view of a conventional mask pattern for forming groove ends (a
) and a plan view of the groove end (b). Figure 4 is a plan view (a) showing the conventional IIL collar groove and A2 wiring pattern (9 peaks on the enlarged plane after completion of the open groove end)
It is. FIG. 5 is a plan view (a) of the IIL pattern in the embodiment of the present invention, and is an enlarged plane view (9 peaks) after completion of the open groove end. Figures 6 to 9 show some of the conventional processes for forming trenches and wiring, of which Figure 6 is a plan view and Figure 7 is a similar
8 is a plan view, and FIG. 9 is a sectional view taken along line A-A. 1...Groove pattern, 2...Diffusion pattern, 3...
Wiring pattern, 4, 10.16... Groove end pattern,
11...Groove, 14.15.17...Groove end. Agent Patent Attorney Katsuo Ogawa Figure 1 Figure 2 Figure 3 Figure 4 Figure 5/θ Figure 7 Figure 9

Claims (1)

[Claims] 1. In the first photo process, a part of the surface of the semiconductor substrate is dug to form a groove, and a part of the high reflectance material film deposited on the entire surface including the groove is shown in the second photo. A method of manufacturing a semiconductor device in which a high reflectance material pattern is formed across the vicinity of the trench end by selectively removing the material in a process, the end of the trench having the high reflectance material film being removed during a second photographic process. 1. A method for manufacturing a semiconductor device, comprising using a trench etching mask pattern having a notch at the end of the trench in the first photographic processing so as to avoid concentration of light on a high reflectance material pattern. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the high reflectance material is aluminum.