JPS6246529A - Etching process - Google Patents

Abstract

PURPOSE:To improve the precision of a resist pattern in an etching process by a method wherein exposure light reflected on the surface of a processed layer is diminished or attenuated inside a reflection preventive layer. CONSTITUTION:A silicon nitride layer 4 around 500Angstrom thick as a reflection preventive layer is formed between a photoresist layer 5 around 9,500Angstrom thick and a polysilicon layer 3 to irradiate the photoresist layer 5 with the so-called G ray with wavelength of 436nm for exposure. The refractive index around 2.0 of the silicon nitride layer 4 is an intermediate value between the refractive index around 1.6 of the photoresist layer 5 and the one around 5.0 of the polysilicon layer 3. The reflectivity becomes 2% or smaller, accomplishing remarkable prevention of reflection compared with the case when the silicon nitride layer 4 is not formed. Through these procedures, the photoresist layer 5 can be exposed to incident ray only improving the precision of resist pattern remarkably.

Description

[Detailed description of the invention] 〔Technical field〕 The present invention relates to a technique that is effective when applied to etching.

[Background technology]

One of the wafer processing steps is a wiring forming step.

This wiring formation generally involves forming an upper resist layer on the layer to be processed by depositing a wiring forming material, and then exposing and developing the resist l-[ in a predetermined pattern, using the resist layer as a mask. This is done by etching away unnecessary parts of the layer to be processed.

Therefore, the pattern accuracy of the resist layer directly affects the pattern accuracy of the wiring. Therefore, it is extremely important to maintain and improve the pattern accuracy of the resist layer.

However, when a resist layer is formed directly on a layer to be processed as described above, the exposure light is reflected by the layer to be processed during exposure, and the resist layer is exposed to light by the reflected light. Therefore, exposure unevenness occurs, resulting in a decrease in pattern accuracy of the resist layer. The above-mentioned decrease in pattern accuracy depends on the layer thickness of the resist layer, so if there is a difference in layer thickness, the width of the resist back cover will vary depending on the location, which in turn will cause a difference in the width of the wiring back cover. become. Therefore, the inventor found that there is a problem in reliability.

Etching is explained in detail in "Integrated Circuit Handbook JP 244-P271, Complete Edition, Integrated Circuit Handbook Editorial Committee, published by Maruzen Co., Ltd., November 25, 1961.

[Purpose of the invention]

An object of the present invention is to provide a technique that can improve the accuracy of a resist pattern in an etching process.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Summary of the invention]

A brief overview of typical inventions disclosed in this application is as follows.

That is, by forming an intermediate layer that is an antireflection layer with a refractive index n between a resist layer with a refractive index n1 and a processed layer with a refractive index n2, the exposure light reflected on the surface of the processed layer is absorbed by the antireflection layer. By being able to eliminate or attenuate the reflected light inside the layer, it is possible to prevent or suppress the reflected light from passing through the resist layer, and the above object is achieved.

〔Example〕

FIGS. 1(a) to 1(gl) schematically show an etching method according to an embodiment of the present invention using partial cross-sectional views of a wafer in each step.

FIG. 1(b) is a partial cross-sectional view showing the step of depositing a polysilicon layer 3, which is a layer to be processed, on silicon oxide N2 formed on a silicon substrate l of a wafer.
FIG. 1 is a partial sectional view showing the process of depositing a silicon nitride layer 4 as an antireflection layer on the upper surface of the polysilicon layer 3 (C1 is a photoresist layer 5 deposited on the silicon nitride layer 4). FIG. 3 is a partial cross-sectional view showing the process of depositing and forming the .

FIG. 1+d+ is a partial sectional view showing the step of exposing and developing the resist layer 5 to form a predetermined resist pattern 5a, and FIG. FIG. 3 is a partial cross-sectional view showing a step in which a silicon nitride layer 4a and a polysilicon layer 3a are formed by dry etching.

FIG. 1 (fl is a partial cross-sectional view showing the step of removing the resist pattern 5a, and FIG. 1 (phantom is a partial cross-sectional view showing the step of removing the silicon nitride layer 4a and forming the wiring pattern 3a). .

In this example, a silicon nitride layer 4 of approximately 500 thickness is formed between a photoresist layer 5 of approximately 9500 nm thickness and a polysilicon layer 3, and a so-called G
The photoresist layer 5 is exposed by radiation. The refractive index of the polysilicon layer 3 is approximately 2.0, which is a value between the refractive index of the photoresist layer 5: approximately 1.6 and the refractive index of the polysilicon layer 3: approximately 5.0.

When the photoresist layer 5 was exposed under the above conditions,
The reflectance was 2% or less. This is the silicon nitride layer 4
Since the reflectance when not forming is about 30%,
This shows that very significant anti-reflection is achieved.

In fact, the processing accuracy for the width of the resist pattern was 0.1 μm per 100 photoresist thicknesses under conditions without a silicon nitride layer, but in this example it was reduced to 0.0 μm.
The width has been greatly improved to 3 μm.

As mentioned above, by preventing the reflection of exposure light to a large extent and improving the processing accuracy of resist patterns,
Even if the photoresist layer has uneven thickness at stepped portions of the underlying pattern, a highly accurate resist pattern can be formed. Therefore, through subsequent steps such as dry etching, it is possible to form a highly accurate wiring pattern 3a made of polysilicon.

The reason why the silicon nitride layer 4 is used as the antireflection layer in this example is based on the following idea.

That is, in general, when an intermediate layer having a refractive index n and a thickness d is formed between a resist layer having a refractive index n and a layer to be processed having a refractive index n2, and the resist layer is exposed to light having a wavelength λ, the following formula is obtained. It is known that if there is a relationship, reflected light passing through the resist layer can be completely eliminated.

n=(n+・n2)0・5・・・・・・(1)(n,<
n<nt) λ This means that when the above formula holds true, the phase of the light reflected on the surface of the processed layer is exactly π/2 different from that of the incident light, so that the reflected light and the incident light are completely separated in the intermediate layer. This is because the reflected light does not reach the resist layer.

Therefore, by forming the resist layer, intermediate layer, etc. under conditions that satisfy the above formula, the acid intermediate layer will function as a complete antireflection layer. Therefore, it is possible to completely prevent the resist layer from being exposed to reflected light.
It becomes possible to expose the resist layer using only incident light, and as a result, the precision of the resist pattern can be greatly improved.

In this way, in order to completely reduce the reflected light that passes through the resist layer to zero, it is necessary to satisfy the above-mentioned equations (11 and (2). However, conditions close to the above conditions must be satisfied. By selecting this, it is possible to reduce the reflected light that passes through the resist layer by partially canceling out the reflected light.

The etching method of this embodiment is based on the above-described concept.

That is, in this example, n + = 1.6, n, = 5
．． 0, n #2.0, and the relationship does not satisfy the above formula +11, but the relationship n<n<n. Therefore, by forming the silicon nitride layer as the intermediate layer with the thickness as described above, the reflectance can be reduced.

By being able to reduce the amount of reflected light that passes through the resist layer in this way, it is also possible to prevent standing wave phenomena caused by the phase of incident light and reflected light matching.

Note that when a silicon nitride layer is used as an antireflection layer to process a polysilicon layer as in this embodiment, the following advantages are also provided.

(1) The silicon nitride layer can be easily deposited by low-pressure CVD, and the thickness of the silicon nitride layer can be controlled with high precision.

+21. Since the thin layer can prevent reflection, the etching accuracy of the polysilicon layer is not deteriorated.

(3) The silicon nitride layer can be anisotropically dry etched in the same process as the polysilicon layer.

(4) Since the silicon nitride layer can be removed with high selectivity to the polysilicon layer by using hot phosphoric acid, highly accurate pattern formation can be performed on the polysilicon layer.

〔effect〕

(1) By forming an intermediate layer that is an antireflection layer with a refractive index n between a resist layer with a refractive index of n and a processed layer with a refractive index of ng, the exposure light reflected on the surface of the processed layer is prevented. Since it can be eliminated or attenuated inside the antireflection layer, it is possible to prevent the resist layer from being exposed to reflected light.

(2), the above fl) can improve the precision of the resist pattern.

(3) According to (2) above, it is possible to improve the etching accuracy of the layer to be processed.

(4) The reliability of the semiconductor device can be improved by the above (3).

(51) Since the thin layer achieves sufficient antireflection, it is possible to prevent the etching accuracy of the underlying layer to be processed from deteriorating.

(6) When the layer to be processed is a polysilicon layer and the antireflection layer is a silicon nitride layer, the antireflection layer can be easily formed with an accurate thickness by low pressure CVD.

(7) In (6) above, the silicon nitride layer can be anisotropically dry etched in the same process as the polysilicon layer.

(8) In (6) above, the silicon nitride layer can be selectively removed using hot phosphoric acid, so highly accurate pattern formation can be performed on the polysilicon layer.

Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the Examples and can be modified in various ways without departing from the gist thereof. Nor.

For example, although a case has been described in which the processed layer is made of polysilicon and the antireflection layer is made of silicon nitride, it goes without saying that the present invention is not limited to this. Even if the layer to be processed is made of another metal or a non-metal, it may be of any material as long as there is a predetermined relationship between the refractive indexes of the respective forming materials.

The thickness of the antireflection layer is not limited to that shown in the examples, and the optimum thickness is determined through experiments, especially when light of a single wavelength is not used.

[Application field]

In the above explanation, the invention made by the present inventor was mainly applied to wiring formation on a wafer, which is the background field of application, but the invention is not limited thereto. implantation of impurity elements into silicon substrates, oxidation of silicon substrates,
Furthermore, it is an effective technique that can be applied to any technique that uses the resist layer or the antireflection layer itself as a mask, such as etching of an insulating layer.

[Brief explanation of drawings]

FIG. 1 (fat) is a partial cross-sectional view showing the step of depositing a polysilicon layer, which is a layer to be processed, on a silicon oxide layer formed on a silicon substrate of a wafer.
FIG. 1 is a partial cross-sectional view showing the process of depositing a silicon nitride layer as an antireflection layer on the top surface of the polysilicon layer (el shows the process of depositing a photoresist layer on the silicon nitride layer). Partial sectional view shown in Figure 1f
dl is a partial cross-sectional view showing the process of exposing and developing the resist layer to form a predetermined resist pattern, and FIG. A partial cross-sectional view showing the process of dry-etching the layer, Figure 1 tf) is a partial cross-sectional view showing the process of removing the resist pattern. It is a partial sectional view showing a process. 1... Silicon substrate, 2... Silicon oxide layer, 3.
3a...Polysilicon layer, 4,4a...Silicon nitride layer, 5...Photoresist layer, 5a...Resist pattern. Figure 1

Claims (1)

[Claims] 1. An antireflection layer having a refractive index n that is larger than the refractive index n_1 of the resist layer and smaller than the refractive index n_2 of the processed layer is formed between the resist layer and the processed layer, and An etching method in which, after exposing and developing a layer, the antireflection layer and the layer to be processed are removed using the resist layer as a mask. 2. When the wavelength of exposure light is λ, the thickness d of the antireflection layer
2. The etching method according to claim 1, wherein the thickness is an integral multiple of λ/4n or approximately equal to λ/4n. 3. The etching method according to claim 1, wherein the layer to be processed is a polysilicon layer and the antireflection layer is a silicon nitride layer.