JPS63292248A - Data processing system - Google Patents

Data processing system

Info

Publication number
JPS63292248A
JPS63292248A JP62127453A JP12745387A JPS63292248A JP S63292248 A JPS63292248 A JP S63292248A JP 62127453 A JP62127453 A JP 62127453A JP 12745387 A JP12745387 A JP 12745387A JP S63292248 A JPS63292248 A JP S63292248A
Authority
JP
Japan
Prior art keywords
processor
time information
processors
memory
main memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62127453A
Other languages
Japanese (ja)
Inventor
Shinji Kobayashi
信二 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62127453A priority Critical patent/JPS63292248A/en
Publication of JPS63292248A publication Critical patent/JPS63292248A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To accurately analyze the spreading status of a fault, etc., by writing time information managed by a clocking mechanism on a common memory by one of processors, generating log information for each processor by adding the time information written on the common memory, and writing it on respective local memories. CONSTITUTION:The clocking mechanism 7 performs clocking based on a system clock, and applies interruption on the processor 1 with a prescribed cycle. The processor 1 interruption on the processor 1 with a prescribed cycle. The processor 1 receiving the interruption receives the time information under managing from the clocking mechanism 7, and writes it in a time information storing area 4a in a main memory 4. The processors 1-3 generate the log information at every execution of various kinds of operations such as communication with another processor or the input/output of data by adding the time information read out from the main memory 4 on the record of the operation, and write it in the log information storing area of corresponding logical memories 1b-3b. And when the fault is generated, the contents of the local memories 1b-3b in the processors 1-3 and that of the main memory 4 are dumped on an external memory device 5, and they are re-arranged in sequence of the time information, then, they are analyzed.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、ディジタル・情報処理や制御などに利用され
るデータ処理システムに関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a data processing system used for digital information processing, control, and the like.

従来の技術 ディジタル・情報処理などに利用されるデータ処理シス
テムでは、これを構成する各プロセッサが障害解析など
に利用するため動作の記録を順次保存してゆくロギング
(Logging)機能を備えるものがある。
Conventional technology Some data processing systems used for digital and information processing are equipped with a logging function that sequentially saves records of the operations of each of the processors that make up the system for use in failure analysis, etc. .

従来、上述のようなロギングは動作の記録に時刻情報を
付さないで動作順に配列することにより行ったり、各プ
ロセッサで管理される時刻情報を付して行ったりしてい
る。
Conventionally, logging as described above has been performed by arranging the operation records in the order of the operations without adding time information, or by adding time information managed by each processor.

発明が解決しようとする問題点 上記従来のロギングでは、動作記録に時刻情報が付され
ていなかったり、付されていてもこれがプロセッサごと
にばらついたりする。
Problems to be Solved by the Invention In the above-mentioned conventional logging, time information is not attached to the operation record, or even if time information is attached, it varies from processor to processor.

このため、プロセッサ間で行われた通信の記録を解析す
る場合などに各プロセッサの動作の前後関係を正確に把
握することが困難となり、障害の波及状況を解析する場
合などに支障をきたすという問題がある。
This makes it difficult to accurately grasp the context of each processor's operations when analyzing records of communications between processors, which poses a problem when analyzing the spread of failures. There is.

問題点を解決するための手段 本発明のデータ処理システムは、それぞれがローカル・
メモリを備えた複数のプロセッサと、これらプロセッサ
のそれぞれからアクセス可能な共用メモリとを備え、こ
れらプロセッサの一つは刻時機構で管理される時刻情報
を共用メモリに書込む手段を備え、各プロセッサは共用
メモリに書込まれた時刻情報を付加しつつログ情報を作
成してそれぞれのローカル・メモリに書込む手段を備え
ることにより、各プロセッサのログ情報をシステム内で
ユニークな時刻情報を付しつつ収集できるように構成さ
れている。
Means for Solving the Problems The data processing system of the present invention each has a local
It includes a plurality of processors each having a memory and a shared memory that can be accessed by each of these processors, one of these processors is equipped with means for writing time information managed by a clock mechanism into the shared memory, and each processor By providing a means for creating log information and writing it to each local memory while adding time information written to the shared memory, it is possible to attach unique time information to the log information of each processor within the system. It is structured so that it can be collected simultaneously.

以下、本発明の作用を実施例と共に詳細に説明する。Hereinafter, the operation of the present invention will be explained in detail together with examples.

第1図は、本発明の一実施例のデータ処理システムの構
成を示すブロック図であり、1〜3はプロセッサ、4は
主メモリ、5は外部記憶装置、6はシステム・バス、7
は刻時機構である。
FIG. 1 is a block diagram showing the configuration of a data processing system according to an embodiment of the present invention, in which 1 to 3 are processors, 4 is a main memory, 5 is an external storage device, 6 is a system bus, and 7 is a block diagram showing the configuration of a data processing system according to an embodiment of the present invention.
is a clock mechanism.

プロセッサ1は、ALUlaとローカル・メモリ1bと
で構成され、このローカル・メモリに内蔵されたマイク
ロプログラムに従って他のプロセッサとの通信や主メモ
リ4へのアクセスを行う。
The processor 1 is composed of an ALUla and a local memory 1b, and communicates with other processors and accesses the main memory 4 according to a microprogram built into the local memory.

プロセッサ2も、ALU2 aとローカル・メモリ2b
とで構成され、このローカル・メモリに内蔵されたマイ
クロプログラムに従って他のプロセッサとの通信や主メ
モリ4へのアクセスを行う。これは、プロセッサ3につ
いても同様である。
Processor 2 also has ALU 2 a and local memory 2 b.
It communicates with other processors and accesses the main memory 4 according to the microprogram built in this local memory. This also applies to the processor 3.

刻時機構7は、システム・クロックに基づ(刻時を行い
、所定周期でプロセッサ1に割込みをかける。この割込
みを受けたプロセッサ1は、刻時機構7から管理中の時
刻情報を受取り、これを主メモリ4の時刻情報格納領域
4aに書込む。
The clock mechanism 7 performs clocking based on the system clock and interrupts the processor 1 at a predetermined period.The processor 1 that receives this interrupt receives the time information being managed from the clock mechanism 7, This is written into the time information storage area 4a of the main memory 4.

プロセッサ1〜3は、他のプロセッサとの通信やデータ
の入出力など各種の動作を行うたびに、この動作の記録
に主メモリ4から読出した時刻情報を付加することによ
ってログ情報を作成し、これを対応のローカル・メモリ
2a〜2C内のログ情報記憶領域内に書込む。
Each time the processors 1 to 3 perform various operations such as communication with other processors and input/output of data, they create log information by adding time information read from the main memory 4 to the record of this operation. This is written into the log information storage area in the corresponding local memory 2a to 2C.

このデータ処理システム内における障害発生時などに、
プロセッサ1〜3内のローカル・メモリ1a〜1cと、
主メモリ4の内容が外部記憶装置5にダンプされる。外
部記憶装置5にダンプされたローカル・メモリ1a〜l
c内のログ情報は、それぞれに付された時刻情報の順序
に並べ換えられ、解析される。
In the event of a failure within this data processing system,
Local memories 1a to 1c within processors 1 to 3;
The contents of main memory 4 are dumped to external storage device 5. Local memories 1a to 1 dumped to external storage device 5
The log information in c is rearranged in the order of the time information attached to each log information and analyzed.

以上、刻時機構7をプロセッサ1の外部に設置する構成
を例示したが、これをプロセッサ1に内蔵させてもよい
Although the configuration in which the clock mechanism 7 is installed outside the processor 1 has been exemplified above, it may be built into the processor 1.

また、プロセッサが3台の場合を例示したが、これらは
2台以上の適宜な台数でよい。
Further, although the case where there are three processors is illustrated, an appropriate number of processors such as two or more may be used.

発明の効果 以上詳細に説明したように、本発明のデータ処理システ
ムは、刻時機構で管理される時刻情報をプロセッサの一
つによって共用メモリに書込み、各プロセッサが共用メ
モリに書込まれた時刻情報を付加しつつログ情報を作成
してそれぞれのローカル・メモリに書込む構成であるか
ら、各プロセッサのログ情報をシステム内でユニークな
時刻情報を付加しつつ収集できる。
Effects of the Invention As explained in detail above, in the data processing system of the present invention, one of the processors writes time information managed by a clock mechanism into the shared memory, and each processor writes the time information managed by the clock mechanism into the shared memory. Since the configuration is such that log information is created while adding information and written to each local memory, log information of each processor can be collected while adding time information that is unique within the system.

この結果、プロセッサ間の通信の前後関係などが明確に
なり障害の波及状況などを正確に解析できるという効果
が奏される。
As a result, the context of communication between processors becomes clear, and the spread of a failure can be accurately analyzed.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本発明の一実施例のデータ処理システムの構
成を示すブロック図である。 1〜3・・・プロセッサ、1a〜3b・・・ローカル・
メモリ、4・・・主メモリ、7・・・刻時機構。
FIG. 1 is a block diagram showing the configuration of a data processing system according to an embodiment of the present invention. 1 to 3...Processor, 1a to 3b...Local
Memory, 4... Main memory, 7... Clock mechanism.

Claims (1)

【特許請求の範囲】 それぞれがローカル・メモリを備えた複数のプロセッサ
と、これらプロセッサのそれぞれからアクセス可能な共
用メモリとを備えたデータ処理システムにおいて、 前記複数のプロセッサの一つは、刻時機構で管理される
時刻情報を前記共用メモリに書込む手段を備え、 前記複数のプロセッサのそれぞれは、前記共用メモリに
書込まれた時刻情報を付加しつつログ情報を作成し、そ
れぞれのローカル・メモリに書込む手段を備えたことを
特徴とするデータ処理システム。
[Scope of Claim] A data processing system comprising a plurality of processors each having a local memory and a shared memory accessible by each of the processors, wherein one of the plurality of processors has a clock mechanism. means for writing time information managed in the shared memory into the shared memory, each of the plurality of processors creates log information while adding the time information written in the shared memory, and writes the log information into the respective local memory. A data processing system characterized by comprising means for writing to.
JP62127453A 1987-05-25 1987-05-25 Data processing system Pending JPS63292248A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62127453A JPS63292248A (en) 1987-05-25 1987-05-25 Data processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62127453A JPS63292248A (en) 1987-05-25 1987-05-25 Data processing system

Publications (1)

Publication Number Publication Date
JPS63292248A true JPS63292248A (en) 1988-11-29

Family

ID=14960300

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62127453A Pending JPS63292248A (en) 1987-05-25 1987-05-25 Data processing system

Country Status (1)

Country Link
JP (1) JPS63292248A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11143738A (en) * 1997-11-07 1999-05-28 Hitachi Ltd Supervisory method of computer system
JPWO2016117102A1 (en) * 2015-01-23 2017-07-27 株式会社日立製作所 Computer system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11143738A (en) * 1997-11-07 1999-05-28 Hitachi Ltd Supervisory method of computer system
JPWO2016117102A1 (en) * 2015-01-23 2017-07-27 株式会社日立製作所 Computer system

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