JPS63289588A - Image display device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Summary] An image display device that digitizes a moving image, synthesizes it with a digital still image from a computer, etc., and displays it, which has an extended function of shrinking the image before compositing the screen. By adding , it is possible to save moving images in the same way as still images.

(Industrial Application Field) The present invention relates to an image display device, and particularly to an image display device that synthesizes still images and moving images.

Combining still images from computers, etc., and moving images from TV, video, etc. adds value in the form of data to the raw images, and has a variety of uses, and along with this, there are a wide variety of display methods. It is necessary to devise various measures.

[Conventional technology]

FIG. 8 shows a conventionally used image display device for screen composition. In the figure, 51 is a still image memory for inputting and storing text/graphic information from a personal computer or the like via a CPU bus; 52 is an A/D converter that converts the digital data in the still image memory 51 into an analog signal; 53 is an A/D converter that converts the digital data in the still image memory 51 into an analog signal; 53 converts the video signal (NTSC signal) into R (red), G (green), and B (
Blue) An interface circuit for converting into an analog signal, 54 is an RSG, a frequency conversion circuit that converts the frequency of the B analog signal to the display frequency of a display device such as a personal computer, 5
5 is a synthesis circuit for selecting and superimposing an analog still image and an analog moving image, and 56 is a C R'r for displaying an analog signal output from the synthesis circuit 55.

In such conventional image display devices, as shown in FIG. 9, an analog synthesis circuit is used to insert a moving image into the center of a still image from the CPU (not shown) side, or vice versa. It controls 55.

[Problem that the invention seeks to solve]

In the conventional image display devices mentioned above, the display screen is a composite screen, but this image is simply displayed, and although still images can be saved and processed, moving images cannot be saved or processed. There was a problem.

Therefore, it is an object of the present invention to provide a device that displays still images and moving images in a composite manner, in which the moving images can be stored and processed.

[Means for solving problems]

The present invention solves the conventional problems by digitizing a still image, which is originally stored in the form of a digital signal, and a moving image, and then combining the two. However, if you simply combine both images, ■
The composition circuit becomes complicated because the number of display colors for moving images and still images is different.■ Because the number of display colors for moving images and still images is different, the colors are compressed when saving one frame of a moving image as a still image. Another problem arises in that a circuit is required. Therefore, in the image display device according to the first aspect of the present invention, as conceptually shown in FIG. , a pixel data reduction circuit 2 that generates video information by reducing the pixel data of the digitized video information to match pixel data of a still image;
Digitized still image information and pixel data reduction circuit 2
It is provided with a synthesis circuit 3 that synthesizes the video information output from the synthesis circuit 3 on the screen, and a display device 4 that converts the output of the synthesis circuit 3 into an analog signal and displays it.

Furthermore, as conceptually shown in FIG. 2, the image display device according to the second aspect of the present invention includes a digital moving image information generating circuit 1 that digitizes moving image information, and a digital moving image information generating circuit 1 that digitizes moving image information. A pixel data reduction circuit 2 that generates moving image information that has been reduced to match the pixel data of a still image, and still image information that has expanded the pixel data of the digitized still image information and made it match the pixel data of the moving image information. a pixel data expansion circuit 5 that generates pixel data expansion circuit 5; a synthesis circuit 3 that synthesizes the digitized video information and still image information output from the pixel data expansion circuit 5; and a synthesis circuit 3 that converts the output of the synthesis circuit 3 into an analog signal. The display device 4 is equipped with a display device 4 for displaying images.

[For production]

In the first image display device of the present invention shown in FIG. The pixel data is reduced until it matches the pixel data and is input to the synthesis circuit 3. In the synthesis circuit 3, digital still image information from a CPU or the like is synthesized with digital moving image information in which pixel data has been reduced, and the display device 4 converts the digital still image information into an analog signal and displays the signal.

Then, the moving image information whose pixel data has been reduced can be stored and processed in a CPU or the like.

In the image display device of the second invention shown in FIG. 2, digitized moving image information is input to the synthesis circuit 3 without being reduced, and digital still image information is expanded by the pixel data expansion circuit 5. The pixel data of the moving image information and the pixel data of the video information are inputted to the synthesis circuit 3 in the same form as the pixel data of the video information. Then, the digital moving image information is reduced to the level of still image information by a pixel data reduction circuit 2 so that it can be stored and processed.

〔Example〕

Embodiments of the image display device according to the present invention will be described below.

FIG. 3 shows an embodiment of the image display device of the first invention shown in FIG. ,
An interface circuit 11 for converting into a B analog signal;
An A/D converter 12 that converts the analog signal from the interface circuit 11 into a digital signal, and an A/D converter 12 that stores the digital signal from the A/D converter 12 and outputs the stored digital signal by a read signal as necessary. It is composed of a video memory 13. In addition, the display device 4
includes a D/A converter 41 that converts the screen-combined digital signal output from the combining circuit 3 into an analog signal, and a CRT 42 that displays this analog signal. Further, the still image information from the CPU bus is temporarily stored in the still image memory 51.

In this first aspect of the invention, the synthesis level in the synthesis circuit 3 is made to match the still image information, and a specific circuit of the pixel data reduction circuit 2 used for this purpose is shown in FIG. In this pixel data reduction circuit 2, each R
, , G, and B signals are composed of three OR circuits 21 to 23.

The operation of this pixel data reduction circuit 2 will be explained below.

Now, a still image displays 16 colors at 4 bits/pixel (R, G, B and common brightness "1' or "0"), and a video displays 18 bits/pixel (6 bits each for RSG, B, brightness level). ) in 2
Considering the normal case of displaying 62144 colors, R, G
, B. In order to convert video data of 6 bits each into still image data of 16 colors, taking the R signal as an example as shown in the figure, the upper 4 bits (R5-R2) of the 6 bits of the R signal of the moving image are converted.
If even one bit is "1", the OR circuits 21 and 22 assume that there is R information, and the OR circuit 22 outputs R.
Set the signal to “1”.

Also, if there is "l" in even one focus among the top two bifs (R5, R4) of the R signal, it is assumed that the brightness is high, and the brightness information of the R signal is changed to "1°" through the OR circuit 21. Then, the luminance information of only this R signal is combined with the luminance information of the G and B signals by an OR circuit 23 to obtain final luminance information.

By doing this, it is possible to convert video data with a total of 18 focuses/pixel (6 bits each of R, G, and B) into still image data with 4 bits/pixel, so the embodiment shown in FIG. , 4-bit/pixel still image data and 4-bit/pixel video data from the CPU bus are synthesized in digital form by the synthesis circuit 3, converted into analog signals by the D/A converter 41, and displayed on the CRT 42. do.

In the above explanation, the color information is the logical sum of the top 4 bits, and the brightness information is the logical sum of the top 2 bits, but it is also possible to change the darkness value of the color information and brightness information by changing the focus number. I don't mind.

FIG. 5 is a block diagram showing an embodiment of the image display device according to the second invention. In this embodiment, the pixel data expansion circuit 5 temporarily stores still image information from the CPU bus in the still image memory 51. After that, the pixel data is read out according to a read command and sent to the pixel data expansion circuit 52 as necessary. The rest of the structure is the same as that shown in FIG.

This second invention attempts to match the synthesis level in the synthesis circuit 3 with the moving image data, and the specific configuration of the pixel data expansion circuit 52 used for this purpose is the sixth invention.
As shown in the figure.

Figure 6 shows a method of expanding the R signal to 6 bits using the R signal and luminance information of the still image output.
, B signals can also be realized in the same way by combining them with luminance signals.

First, if we consider the case where there is no R signal information and Uchi is "0", the output focus R5 to R3 will both be 10 degrees, and since the R signal is connected to the reset terminal A of the selector S, the selector S is reset and the output bits R2~R
O also becomes "0", and all 6-bint outputs become "0" regardless of the luminance information.

Next, if we consider the case where there is R signal information, that is, the case of "1", output bits R5 to R3 will be 1", but the output of output bits R2 to RO will be based on the brightness information common to R, G, and B. That is, when the luminance information is "l", the R signal information is selected by the selector S, and the output bits R2 to RO
becomes “1”, and when the brightness information is “O”,
The information of the B terminal (0■) of the selector S is selected, and the output bits R2 to RO become 0''.

In this way, 4 bits/pixel data of a still image is 6x
3=18 bits/pixel, which means that there is a one-to-one correspondence with the pixel data of the moving image.

For the sake of explanation, the selector S has three outputs, but it is easily possible to increase or decrease the selector S by 1 to 5 in order to obtain intermediate brightness.

Here, the bit conversion in the above embodiment is summarized as shown in the following table.

table However, X may be either "'0" or 1.

In this way, the synthesis circuit 3 can synthesize still image information and moving image information of 18 bits/pixel and display it on the display device 4, and this synthesized screen can be displayed on the display device 4 in the form of 4 bits/pixel. This means that it can be stored and processed.

An embodiment of the synthesis circuit 3 will now be described with reference to FIG.

The video frequency signal from the video frequency generation circuit 31 is sent to a video address generation circuit 32 and a synchronization circuit 33. The video frequency address generation circuit 32 is, for example, a counter that counts the video frequency signal as a clock signal, and is reset by a vertical synchronization signal from the synchronization circuit 33.

The video address generation circuit 32 sends the count value to the video display comparator 34, which receives video display position information (start point address, end point address, and video width address) from the CPU, and compares this information with the count value. By comparing the values and controlling the switching circuit 35, a composite screen as shown in FIG. 9 can be provided to the display device 4.

Incidentally, in each of the above embodiments, the moving image memory 13 and the still image memory 51 are used, but it goes without saying that these memories can be replaced by a memory such as a CPU connected to the image display device of the present invention.

〔Effect of the invention〕

As described above, in the first and second aspects of the present invention, the pixel data level of digitized still image information or moving image information can be matched by reducing or expanding the pixel data level so that the screen can be synthesized. It becomes possible to store and process information at the pixel data level, and in particular, in the second aspect of the invention, since the screen is displayed at the pixel data level of moving image information, a fine-grained screen can be obtained.

[Brief explanation of drawings]

FIG. 1 is a principle block diagram of an image display device according to the first invention, FIG. 2 is a principle block diagram of an image display device according to the second invention, and FIG. 3 is an image diagram according to the first invention. A block diagram showing an embodiment of the display device; FIG. 4 is a block diagram showing an embodiment of the screen data reduction circuit; FIG. 5 is a block diagram showing an embodiment of the image display device according to the second invention. , FIG. 6 is a block diagram showing an embodiment of a pixel data expansion circuit, FIG. 7 is a block diagram showing an embodiment of a synthesis circuit used in the present invention, and FIG. 8 is a block diagram showing a conventional image display device. FIG. 9 is a diagram showing a composite screen. In FIGS. 1 and 2, l represents a dinotal video information generation circuit, 2 represents a pixel data reduction circuit, 3 represents a synthesis circuit, 4 represents a display device, and 5 represents a pixel data expansion circuit, respectively. In the drawings, the same reference numerals indicate the same or corresponding parts.

Claims (5)

[Claims] (1) A digital video information generation circuit (1) that digitizes video information, and a pixel data reduction circuit that reduces the pixel data of the digitized video information to generate video information that matches the pixel data of a still image. a circuit (2), a synthesis circuit (3) for synthesizing digital still image information and video information output from the pixel data reduction circuit (2), and converting the output of the synthesis circuit (3) into an analog form. An image display device comprising: a display device (4) that converts into a signal and displays the signal; (2) The image display device according to claim 1, wherein the digital moving image information generating circuit (1) includes a memory (13) from which moving image information can be read out as needed. (3) A digital video information generation circuit (1) that digitizes video information, and a pixel data reduction circuit that reduces the pixel data of the digitized video information to generate video information that matches the pixel data of a still image. circuit (2), and a pixel data expansion circuit (5) that generates still image information by expanding the pixel data of digitized still image information to match pixel data of video information.
), a synthesis circuit (3) that synthesizes the digital video information and the still image information output from the pixel data expansion circuit (5), and converts the output of the synthesis circuit (3) into an analog signal. An image display device comprising: a display device (4) for displaying images; (4) The image display device according to claim 3, wherein the digital moving image information generating circuit (1) includes a memory (13) from which moving image information can be read out as needed. (5) The image display device according to claim 3 or 4, wherein the pixel data expansion circuit (5) includes a memory (51) from which still image information can be read out as needed.