JPS63288045A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the metal of a wiring pattern from scattering at the time of fusing, from moving from a prescribed position by surface tension and from cohering to swell by a method wherein an insulating film on metal wiring films is fixed by suppressing the wiring pattern from its upper surface and a tunnel, through which a wiring passes, is formed. CONSTITUTION:An SiO2 insulating film 3 is adhered on a semiconductor substrate 1 comprising functional elements 2 constituted therein and thereafter, prescribed patterns are each formed on contact regions by a lithography technique. Al is adhered on the whole surface of the substrate 1, whereon contact holes 4 are opened, using a bias sputtering method and so on and after that, a wiring pattern is formed by a lithography technique. A form maintaining film 6, with which Al wiring films 4 are covered and which consists of SiO2, is adhered on the whole surface of the substrate 1 by a sputtering method and so on and the adhered forms of the films 5 are changed to remove the contact holes 4 in regions where are wanted to flatten and the film 6 on other step part. When the substrate 1 is heated at the melting point, 660 deg.C, or more of the films 5 using infrared rays or a laser beam and so on, the Al is instantaneously changed into a liquid phase state from a solid phase state, flows in a contact hole 3 and the surface is flattened.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device such as an LSI, and particularly to a semiconductor device suitable for improving the distribution of a metal film at a stepped portion such as a contact hole. The present invention relates to a wiring forming method.

[Conventional technology]

In submicron LSI, contact holes are minute and
Even if a metal film is deposited using bias sputtering, etc., which has an aspect ratio (height/diameter) of 1 or more and has good zero-level coverage, the side walls of the contact hole will be in the shadow of each other and the film thickness at the bottom will be small. It becomes extremely thin. In the contact portion, conduction failure occurs due to disconnection or electromigration.

Therefore, a technique for flattening the wiring has been disclosed in which a metal film is melted by heating and flowed into the contact hole to be buried.

AQ is the most widely used wiring material for LSI.

The melting point of AQ is 660'C. The dominant forces in melting the metal and flattening the wiring are surface tension and viscosity at that temperature. The surface tension of AQ at 800"C is 5
20dy■3-” is 8 times larger than water and has a viscosity of 1.4
X 10-'' poise is comparable to that of water. Therefore, the method of burying molten AQ into the contact hole can easily flatten the surface of the wiring.

[Problem that the invention seeks to solve]

Melted AQ has a higher light reflectance than a film deposited using a film forming device such as sputtering, and in the process of transferring wiring patterns onto a wafer using a stepper, it is not possible to form fine wiring with high precision due to reflection. As the deposited AQ film is flattened at the stepped portions by melting, the film thickness varies depending on the location.
It becomes difficult to etch at the same time.

Therefore, the above problem can be solved by patterning AIIM in advance to form a wiring pattern and then melting it by heat treatment.

However, in the method of heating after pattern formation, as shown in FIG. 4(a), whose plan view is shown in FIG. 4(a), and in FIG. There was a problem that the wires would not be continuous and would be disconnected.8 The purpose of the present invention was to solve these problems. It is an object of the present invention to provide a highly reliable method for forming wiring in a semiconductor device, in which wiring metal can be melted and flowed into a recess to be buried therein.

[Means for solving problems]

The above purpose is a step of depositing an insulating film on a semiconductor substrate, and a step of opening a contact hole in the insulating film.

depositing a wiring metal on the insulating film including the contact hole and forming a wiring pattern after patterning;
a step of depositing an insulating film on the semiconductor substrate including the wiring pattern and forming an opening in a step region including the contact hole; heating the wiring metal film to a temperature equal to or higher than its melting point to melt it; This is achieved by the method for forming interconnections in a semiconductor device of the present invention, which includes a step of causing the flow to flow into the recesses.

[Effect]

The insulating film on the wiring metal film of the present invention presses and fixes the wiring pattern from above and forms a tunnel through which the wiring passes, so it moves to maintain a certain shape.

This prevents the metal in the wiring pattern from scattering during melting, from moving in a predetermined position due to surface tension, or from agglomerating and swelling.

The molten wiring retains its cross-sectional shape at the time of pattern formation and is not cut into pieces, so there is no disconnection.

In addition, in contact holes and other stepped areas that are melted and flattened, they are opened in advance on the wiring metal film, and then melted, so that a state of poor rolling performance is not maintained, and the surrounding area is It melts and flows inside the insulating film, filling the depression and flattening it.

〔Example〕

An embodiment of the present invention will be explained with reference to FIG. Figure 1 (a
) and 5i on the semiconductor substrate 1 that constitutes the functional element 2.
After depositing the ns insulating film 3, a predetermined pattern is formed in the contact area using lithography technology, and the 5iOz insulating film 3 is etched until it reaches the semiconductor substrate 1 using first and fifth reactive ion etching RIE, etc., to form a contact. Forming holes 4 Next, as shown in FIG. 1(b), 8Ω is deposited on the entire surface of the semiconductor substrate 1 with contact holes 4 using bias sputtering, etc., and then a wiring pattern is formed by phosphorography. Then, the AQ wiring film 5 is formed by etching using RIE or the like, as shown in FIG. 1(c).
As shown in the figure, a shape maintaining film 6 made of 5 iOz is deposited on the entire surface of the semiconductor substrate 1 by sputtering or the like to cover the AQ wiring line 5.
The film is deposited to a thickness of ~1.0 μm, and then, as shown in FIG. 1(d), the shape of the deposited All wiring II5 is changed and a shape-maintaining film is applied over the contact hole 4 and other step portions in the area to be flattened. 6
Next, as shown in FIG. 1(e), when the semiconductor substrate 1 is heated to the melting point of the A1 wiring film 5 of 660° C. or higher using infrared or laser, AQ changes from the solid phase to the liquid phase. In the contact hole 4 and other stepped portions, the melted AQ flows due to surface tension and potential energy, flows into the contact hole 3 from the contact region and its vicinity, and flattens the surface. At this time, the AΩ wiring 1lI5 covered with the shape maintaining film 6 is melted at the same time, so that the film quality is improved, but the shape maintains the state at the time of pattern formation and becomes approximately a parallelogram. The shape maintaining film 6 can be left as is and used as part of the insulating film between the eyebrows.

According to one embodiment of the present invention, after forming the AQ wiring pattern,
Even if Q is melted, the wiring will be continuous as shown in the plan view shown in FIG. 2, the steps at the contact portion will be flattened, and no shape defects will occur in the wiring pattern.

Another embodiment of the present invention will be described with reference to FIG.

The steps of forming the shape retaining layer H6 and removing the contact hole 4 in the region to be flattened and the shape retaining film 6 on the stepped portion are the same as in the embodiment of the present invention, and are omitted. A reflection control film 7 made of 5iaNa having a refractive index different from that of 5iOz is deposited on the surface of the reflection control film 6 by plasma CVD or the like. AQ
It is known that the incident energy of a laser, which is one of the heating methods for melting the wiring film 5, changes significantly due to reflection at a solid interface. Depending on the thickness of the insulating film on the surface of the AQ wiring film 5, it acts as a reflective film or an anti-reflection film, so the combination of the thicknesses of the shape maintaining film 6 and the reflection control film H7 thereon is set to 0.6 μm and 0.0 μm, respectively. When the thickness is .1 μm, it acts as a reflective film, so the reflection control film 7 is formed only on the shape maintenance IIIG in the region of the AQ wiring film 5 that is not desired to be melted during laser irradiation, and the other regions are removed. After that, laser is irradiated to melt the AQ wiring 1lI5 and contact hole 4
Wiring with a flat surface can be formed by flowing it to other stepped portions and filling in the depressions.

In this embodiment, AQ wiring crotch is used as the wiring material, but the present invention is not limited to this, and the same effect can be obtained with other wiring materials.

Further, in this embodiment, 5iOz was described as the shape maintaining film 6, but it is not limited to this (, 5iaN
4, PSG, a-5i, etc., or a high melting point metal or a compound thereof.

Furthermore, although the above embodiments have been described with respect to the case of contact holes in the first layer wiring, the technical scope of the present invention is also applicable to the case of contact holes and wiring in a broad sense such as through holes in multilayer wiring.

〔Effect of the invention〕

As explained above, according to the wiring forming method of the present invention in which a shape-maintaining insulating film is provided on the wiring pattern, AQ wiring can be formed anywhere by heating and melting after wiring pattern formation, which was difficult to realize with conventional techniques. There is no continuous disconnection even in the region of 1, and since patterning can be performed before melting, which has a low reflectance, it is possible to easily form fine wiring with high precision.

[Brief explanation of drawings]

1(a) to 1(e) are vertical cross-sectional views showing one embodiment of the method for forming interconnects in a semiconductor device according to the present invention in the order of steps, and FIG.
FIG. 3 is a plan view showing another embodiment of the present invention, FIG. ) is a longitudinal sectional view.

Claims (1)

[Claims] 1. A method for manufacturing a semiconductor device in which a contact hole is opened in a semiconductor substrate having a functional element covered with an insulating film, and a wiring metal film is deposited to form lead wiring from the functional element, in which the contact hole is opened. a step of depositing the wiring metal film on the semiconductor substrate and patterning it to form a wiring pattern; depositing an insulating film on the semiconductor substrate including the wiring pattern and forming a step including the contact hole; 1. A method for manufacturing a semiconductor device, comprising the steps of: forming an opening in a region of the semiconductor device; and heating the wiring metal film to a temperature higher than its melting point to melt it and cause it to flow into the recess.