JPS63285995A - Circuit substrate - Google Patents
Circuit substrateInfo
- Publication number
- JPS63285995A JPS63285995A JP12004187A JP12004187A JPS63285995A JP S63285995 A JPS63285995 A JP S63285995A JP 12004187 A JP12004187 A JP 12004187A JP 12004187 A JP12004187 A JP 12004187A JP S63285995 A JPS63285995 A JP S63285995A
- Authority
- JP
- Japan
- Prior art keywords
- protrusions
- protrusion
- circuit pattern
- circuit
- same height
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 title abstract description 8
- 238000007747 plating Methods 0.000 claims abstract description 12
- 238000004519 manufacturing process Methods 0.000 abstract description 5
- 239000004033 plastic Substances 0.000 abstract description 2
- 238000000034 method Methods 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- TXUICONDJPYNPY-UHFFFAOYSA-N (1,10,13-trimethyl-3-oxo-4,5,6,7,8,9,11,12,14,15,16,17-dodecahydrocyclopenta[a]phenanthren-17-yl) heptanoate Chemical compound C1CC2CC(=O)C=C(C)C2(C)C2C1C1CCC(OC(=O)CCCCCC)C1(C)CC2 TXUICONDJPYNPY-UHFFFAOYSA-N 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- 229910021626 Tin(II) chloride Inorganic materials 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 239000003054 catalyst Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000001746 injection moulding Methods 0.000 description 1
- 210000003127 knee Anatomy 0.000 description 1
- 239000011259 mixed solution Substances 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 239000003973 paint Substances 0.000 description 1
- PIBWKRNGBLPSSY-UHFFFAOYSA-L palladium(II) chloride Chemical compound Cl[Pd]Cl PIBWKRNGBLPSSY-UHFFFAOYSA-L 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 235000011150 stannous chloride Nutrition 0.000 description 1
- 239000001119 stannous chloride Substances 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229920005992 thermoplastic resin Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0284—Details of three-dimensional rigid printed circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/061—Etching masks
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
Landscapes
- Structure Of Printed Boards (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Abstract
Description
【発明の詳細な説明】 （産業上の利用分野） 本発明は量産性に適した回路基板に関するものである。[Detailed description of the invention] (Industrial application field) The present invention relates to a circuit board suitable for mass production.
（従来の技術）
一般に、回路基板本体は絶縁製積層板で溝成し、この平
板状の積層板の表面に所定の回路パターンを形成してい
るが、この回路パターンの形成方法は、例えば銅張り積
層板に所望のパターンを残してエツチングするサブトラ
クト法や、積層板に接着剤を塗付した後、表面に所望の
回路パターン以外の部分をメツキレシスト層で保護し、
その後レジスト層で保護されていない回路パターン予定
部分に直接鋼またはニッケルなどの化学メッキにより回
路パターンを形成するアディティブ法がおる。(Prior Art) Generally, the circuit board body is made of an insulating laminate with grooves formed on it, and a predetermined circuit pattern is formed on the surface of this flat laminate. The subtract method involves etching leaving a desired pattern on the stretched laminate, or after applying adhesive to the laminate, parts other than the desired circuit pattern on the surface are protected with a mesh resist layer.
Thereafter, there is an additive method in which a circuit pattern is formed by chemical plating of steel or nickel directly on the portion where the circuit pattern is not protected by the resist layer.
（発明が解決しようとする問題点）
しかしながら、従来例では、回路パターンを形成しよう
とする部分以外の表面を、スクリーン印刷法でメツキレ
シストを付与することを必要とするが、この印刷は一回
ごとの間歇作業となるために生産性が低く、レジスト付
与行程にコストがかかる問題がある。また回路パターン
部は、回路基板本体表面に薄く形成されるので、基板本
体に実装されているＩＣチップやコンデンサなどからの
熱の影響を受けやすく、反対に回路パターン部からの発
熱によって基板本体や実装部品に悪影響を与える問題が
めった。(Problem to be Solved by the Invention) However, in the conventional example, it is necessary to apply a mesh resist to the surface other than the part where the circuit pattern is to be formed using a screen printing method, but this printing is performed every time. There is a problem that productivity is low due to intermittent work and that the resist application process is costly. In addition, since the circuit pattern section is thinly formed on the surface of the circuit board body, it is easily affected by heat from IC chips and capacitors mounted on the board body. Problems that adversely affect mounted components are rare.
本発明の目的は、生産性がよく低コストで生産でき、回
路パターン部と基板本体および実装部品とは互いに熱影
響を受けにククシた回路基板を提供することにある。SUMMARY OF THE INVENTION An object of the present invention is to provide a circuit board that can be produced with high productivity and at low cost, and in which the circuit pattern portion, the board main body, and the mounted components are not mutually affected by heat.
（問題点を解決するための手段）
本発明の回路基板は、基板本体１の一面に回路パターン
用突部１１，１２．１３を基板本体と一体に突設してあ
り、全ての回路パターン用突部は同一高さとするもので
あり、回路パターン用突部上にメッキ層２を設けである
。(Means for Solving Problems) The circuit board of the present invention has protrusions 11, 12, 13 for circuit patterns protruding from one side of the board body 1 integrally with the board body. The protrusions are of the same height, and a plating layer 2 is provided on the protrusions for the circuit pattern.
（実施例）
第１，２図において、回路基板本体１はプラスチックに
より型成形したものである。本体１の上面には回路パタ
ーン用突部１１，１２．１３を基板本体と一体に突設し
である。これらの突部は全て同一高さにしておる。回路
パターン用突部１゛１゜１２．１３のうち、突部１３の
先端にはスルーホール１３ａを開けである。各回路パタ
ーン用突部１１．１２．１３上にはメッキ層２を設けて
おる。(Example) In FIGS. 1 and 2, the circuit board body 1 is molded from plastic. On the upper surface of the main body 1, circuit pattern protrusions 11, 12, and 13 are provided to protrude integrally with the substrate main body. All of these protrusions are at the same height. A through hole 13a is formed at the tip of the protrusion 13 among the circuit pattern protrusions 1, 1, 12, and 13. A plating layer 2 is provided on each circuit pattern protrusion 11, 12, 13.
なお、基板本体１の下面に用途に応じて突部１ａを一体
に形成しである。Note that a protrusion 1a is integrally formed on the lower surface of the substrate main body 1 depending on the application.
次に本発明の回路基板の製法の一例を説明する。Next, an example of the method for manufacturing the circuit board of the present invention will be explained.
まず、熱可塑性樹脂を用いて射出成形により第３図に示
す回路基板本体１を成形する。成形と同時に、基板本体
１の上面に同一高さの回路パターン用突部１１，１２．
１３も成形され、下面にも用途に応じた突部１２ａが成
形される。ついで、回路基板本体１を表面粗化してから
、塩化第一すずと塩化パラジウム混合液へ浸漬して、全
面を触媒付与する。First, the circuit board main body 1 shown in FIG. 3 is molded by injection molding using a thermoplastic resin. At the same time as molding, circuit pattern protrusions 11, 12 .
13 is also molded, and a protrusion 12a according to the purpose is also molded on the lower surface. Next, the surface of the circuit board body 1 is roughened, and then immersed in a mixed solution of stannous chloride and palladium chloride to apply a catalyst to the entire surface.
そして無電解銅メッキを行って、第４図に示すように基
板本体１の表面に銅メッキ層２を付着する。メッキ後、
基板本体１をコンベアーなどを用いて第４図左方に移動
させ、同図鎖線に示す塗装用ローラＲを基板本体上を相
対的に走行させると、第５図に示すように回路パターン
用突部１１〜１３上にのみ塗料からなるレジスト３が塗
付される。Then, electroless copper plating is performed to deposit a copper plating layer 2 on the surface of the substrate body 1 as shown in FIG. After plating,
When the board main body 1 is moved to the left in FIG. 4 using a conveyor or the like, and the coating roller R shown by the chain line in the same figure is run relatively over the board main body, the circuit pattern protrusions are formed as shown in FIG. A resist 3 made of paint is applied only on portions 11 to 13.
乾燥後、基板本体１をエツチングして、第６図に示すよ
うに回路パターン用突部１１〜１３を除く部分のメッキ
層２を除去し、最後に各突部上のレジストを剥離すると
、第１図に示す製品としての回路基板が形成される。After drying, the board body 1 is etched to remove the plating layer 2 from the parts excluding the circuit pattern protrusions 11 to 13, as shown in FIG. 6, and finally, the resist on each protrusion is peeled off. A circuit board as a product shown in FIG. 1 is formed.
（発明の効果）
以上説明したように本発明によれば、基板本体は同一高
さの回路パターン用突部を備えているので、レジストの
形成作業を連続して行え、作業が簡単となり、量産性に
適し、低コストで生産できる。メッキ層は基板本体の面
から所定高さにある突部上に設けており、しかも突部間
における突部側面および基板本体表面から放熱されるの
で、回路パターン部と基板本体および実装部品とは互い
に熱影響を受けにくい。(Effects of the Invention) As explained above, according to the present invention, since the board body is provided with protrusions for circuit patterns of the same height, the resist formation work can be performed continuously, the work is simple, and mass production is possible. It is suitable for many people and can be produced at low cost. The plating layer is provided on the protrusions at a predetermined height from the surface of the board body, and heat is dissipated from the side surfaces of the protrusions between the protrusions and the surface of the board body, so the circuit pattern area, the board body, and the mounted components are They are not easily affected by each other's heat.
第１図は第２図ニーＩ線断面図、
第２図は要部の一部切欠斜視図、
第３図乃至第６図は製造工程を段階的に示す断面図でお
る。
１・・・回路基板本体、
１１〜１３・・・回路パターン用突部、２・・・メッキ
層。
以上
第１屈
／ａ。
第２因1 is a sectional view taken along the knee I line in FIG. 2, FIG. 2 is a partially cutaway perspective view of the main part, and FIGS. 3 to 6 are sectional views showing the manufacturing process step by step. DESCRIPTION OF SYMBOLS 1... Circuit board main body, 11-13... Protrusion for circuit patterns, 2... Plating layer. The above is the first clause/a. Second cause
Claims (1)
に突設してあり、回路パターン用突部上にメッキ層を設
けてあり、全ての回路パターン用突部は同一高さである
ことを特徴とする回路基板。A protrusion for the circuit pattern is provided on one side of the board body, integrally with the board body, and a plating layer is provided on the protrusion for the circuit pattern, and all the protrusions for the circuit pattern must be at the same height. A circuit board featuring:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62120041A JP2533322B2 (en) | 1987-05-19 | 1987-05-19 | Circuit board manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62120041A JP2533322B2 (en) | 1987-05-19 | 1987-05-19 | Circuit board manufacturing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63285995A true JPS63285995A (en) | 1988-11-22 |
| JP2533322B2 JP2533322B2 (en) | 1996-09-11 |
Family
ID=14776434
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62120041A Expired - Lifetime JP2533322B2 (en) | 1987-05-19 | 1987-05-19 | Circuit board manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2533322B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010507261A (en) * | 2006-10-18 | 2010-03-04 | スリーエム イノベイティブ プロパティズ カンパニー | Method for patterning a material on a polymer substrate |
| JP2010238626A (en) * | 2009-03-31 | 2010-10-21 | Nissha Printing Co Ltd | Transparent conductive sheet, manufacturing method therefor, and decorative molded article |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5180650U (en) * | 1974-12-20 | 1976-06-26 | ||
| JPS61205169U (en) * | 1985-06-13 | 1986-12-24 |
-
1987
- 1987-05-19 JP JP62120041A patent/JP2533322B2/en not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5180650U (en) * | 1974-12-20 | 1976-06-26 | ||
| JPS61205169U (en) * | 1985-06-13 | 1986-12-24 |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010507261A (en) * | 2006-10-18 | 2010-03-04 | スリーエム イノベイティブ プロパティズ カンパニー | Method for patterning a material on a polymer substrate |
| US8764996B2 (en) | 2006-10-18 | 2014-07-01 | 3M Innovative Properties Company | Methods of patterning a material on polymeric substrates |
| JP2010238626A (en) * | 2009-03-31 | 2010-10-21 | Nissha Printing Co Ltd | Transparent conductive sheet, manufacturing method therefor, and decorative molded article |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2533322B2 (en) | 1996-09-11 |
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