JPS63281516A - Ic protecting circuit - Google Patents

Abstract

PURPOSE:To protect the IC of a buffer circuit by providing a direct current breaking capacity in the input side of the self-bias type buffer circuit of a digital IC and a switch between an input edge and an earth or a power source and operating the switch at the time of an input signal cutting. CONSTITUTION:An electrostatic capacity 2 in the input side of a buffer circuit 1 breaks the direct current part of an input signal Sin. The output edge of a switch 4 is connected to an input edge (a) of the buffer circuit 1 and the input edge is connected to an earth (or a power source voltage.) When the switch 4 is operated by an external control signal C, the electric potential of the input edge (a) of the buffer circuit 1 is come to be the earth (or the power source voltage) by force. Accordingly, at the time of the input signal Sin cutting or at the time of the cutting detection, the switch 4 is turned on by the signal C, the electric potential of the input edge (a) is enforced to the earth (or the power source VDD), a current IDD is reduced as a value away from a steady bias VDD/2 and the IC of the buffer circuit 1 can be protected from destruction.

Description

[Detailed Description of the Invention] [Summary] A protection circuit for a self-biased buffer circuit that can automatically obtain a bias of about V DD /2 by simply connecting a feedback resistor between the input and output of a CMOS IC inverter,
In order to prevent the CMOS IC from being damaged due to the continuous flow of a maximum current of 100 when the input signal to the buffer circuit is cut off, a DC cutoff capacitor is connected to the input side of the buffer circuit, and the input terminal of the buffer circuit is connected to ground or ground. A switch is installed between the buffer circuit and the power supply, and when the input signal is cut off, the switch is operated to force the input end of the buffer circuit to ground or to the power supply voltage (Vial) for protection.

[Industrial application field]

The present invention relates to a buffer circuit used for an interface between an analog circuit and a digital circuit, and more particularly to a protection circuit for a self-biased buffer circuit using a CMOS digital IC.

In recent years, with the progress of digitization of various circuits, CMOS has become an important interface between analog and digital circuits.
Many self-bias buffer circuits are used, which can be easily combined with a digital IC inverter and a feedback resistor.

A self-biased buffer circuit can reduce approximately V D by simply connecting a feedback resistor between the input and output of the CMO3IC inverter.
A bias of D/2 is automatically obtained, but at that time, the positive voltage HV DD of the source of P channel MOS 11ET
The current IDD flowing from the source of the N-channel MOS FET to the negative power supply ■SS becomes maximum.

If this state continues for a long time, the IC may break down due to heat generation. However, when a signal is present at the input, the buffer circuit performs a switching operation based on the signal, so that the current 100 is averaged and becomes a normal value. Therefore, since the above self-biased buffer circuit requires the presence of an input signal as a prerequisite for use, and uses a DC blocking capacitor between it and the analog circuit, the duty ratio of the input signal is approximately 50%. was limited to cases of

However, in recent years, they have been used in a variety of ways, and depending on how they are used, the input signal may be cut off and the maximum current may continue to flow through the buffer circuit, destroying the IC.

Therefore, as a self-biased buffer circuit,
In order to prevent tC breakdown when the input signal is disconnected, it is desired to realize a small and simple protection circuit.

[Conventional technology]

Conventionally, self-biased buffer circuits are used only when there is always an input signal, or as shown in FIG. In addition, even if the input signal Sin is cut off, the comparator 5 sends out a signal at a constant level to protect the self-bias buffer 1 circuit l from being destroyed by abnormal current.

[Problem that the invention seeks to solve]

The self-bias type buffer 1 circuit receives the human input signal S' in
When the human input signal Sin is disconnected because it is used in a case other than when it is guaranteed that it exists, the input level of the self-bias type buffer circuit 1 becomes unstable, and an abnormal current may flow and destroy the IC. be.

Therefore, a self-bias buffer circuit cannot be used in cases where input signals are turned on and off as necessary.

Furthermore, if a comparator 5 or the like is used before the self-bias buffer circuit 1, not only will the number of additional parts increase, resulting in higher costs, but also the output signal will fluctuate and become unstable due to variations in the threshold of the comparator 5. There is a problem with becoming.

[Means for solving problems]

This problem is caused by the capacitance 2 on the input side of the self-biased buffer circuit 1 that blocks the DC component of the input signal Sin, and the capacitance 2 on the input side of the self-biased buffer circuit 1 between the input end and the ground or power supply. When the input signal is disconnected or when an input disconnection is detected, the switch 4 is operated by the control signal C, and the input terminal a of the self-bias buffer circuit 1 is forcibly grounded. Alternatively, this problem can be solved by the present invention, which maintains the power supply voltage VDD at a constant level.

In FIG. 1 showing the principle configuration of the present invention, l is an output voltage Sout obtained by inverting and amplifying the input signal Sin, which is fed back to the input side by a resistor Rf, and the operating bias is automatically set to a constant value (
2 is a capacitor that blocks the DC component of the input signal Sin, and 4 is a self-bias buffer circuit that is operated by an external control signal C and is connected to the input terminal a of the self-bias buffer circuit 10. This is a switch that forces the potential at a constant value away from the steady bias.

[Effect]

The capacitance 2 on the input side of the self-bias buffer circuit 1 of the digital IC blocks the DC component of the input signal Sin. The switch 4 has its output terminal connected to the input terminal a of the self-biased buffer circuit 1, and its input terminal is connected to ground or the power supply voltage VDD, so that the switch 4 is operated by the external control signal C. When this happens, the potential at the input terminal a of the self-biased buffer circuit 1 is forced to become
Ground or power supply voltage VDD.

Therefore, when the input signal Sin is disconnected or is detected to be disconnected, by turning on the switch 4 by the external control signal C, the potential of the input terminal a of the self-bias buffer circuit 1 is set to the ground or power supply voltage. Force the current ID to VDD and set it to a value far from the steady bias VDD/2.
D can be made small and the IC of the self-biased buffer circuit 1 is protected from destruction.

In addition, since the DC-blocking capacitor (jt2 and switch 4) that constitute the IC protection circuit of the present invention are small and simple components and circuits, the IC protection circuit of the present invention does not require high cost or large size. The problem is solved without any problem.

〔Example〕

FIG. 2 is a block diagram showing the configuration of the IC protection circuit according to the first embodiment of the present invention.

The self-bias buffer circuit 1 is composed of a MOS digital IG inverting amplifier 1 and a feedback resistor 11A, and the capacitance 2 for cutting off DC is composed of a small capacitor 21.

The input disconnection detector 3 sets the state of its output terminal to "L1 level" when the input signal Sin is disconnected or is disturbed.The output terminal of the 3-state buffer 41 is connected to the inverting amplifier 11 of the CMOS digital IC. It is connected to input terminal a.

The DC component of the input signal Sin is always connected to a DC-blocking capacitor 2.
1 is blocked.

It is operated to bring the state of its output terminal to the ``L'' level.

However, since the output terminal of the 3-state buffer 41 is connected to the input terminal a of the self-biased buffer circuit 10 and the inverting amplifier 110, when the input is cut off, the switch 4
By the operation of the 3-state buffer 41, the inverting amplifier 1
The input terminal a of No. 1 is forcibly grounded. Therefore, self-biased buffer circuit 1 is protected from destruction.

In the configuration of the IC protection circuit of this embodiment, the DC cutoff capacitor 21, the 3-state buffer 41 of the switch 4, and the input disconnection detector 3 are simple components and circuit configurations, so the cost and size of the circuit can be reduced. I can do it without any problem.

FIG. 3 is a block diagram showing the configuration of an IC protection circuit according to a second embodiment of the present invention.

This embodiment is a protection circuit for a phase-locked oscillator (PLL oscillator) integrated into an IC, and 11.12 is C? IQS digital IC inverting amplifier, 13 is a phase comparator, 14 is a loop filter, 15 is a voltage controlled oscillator (VCO), 1
6 is a termination resistor, 17 is a frequency divider, and 21.22 is a DC cutoff capacitor. The switch 4 is composed of 3-state buffers 41 and 42 and a switch controller 43.

In order to save power during operation, the PLL oscillator turns off the output of the signal oscillator IO and the VCO 15 or the power supply when not in use. At this time, since those output signals disappear, the input signals Sin of the inverting amplifiers 11 and 12 are cut off.

Therefore, in order to prevent the inputs of the inverting amplifiers 11 and 12 from becoming unstable, the switch 40 control signal C is controlled at the same time as the power of the signal oscillator 10 and VCO 15 is turned off. 41.4
2 is operated, and the state of its output terminal is set to "L" level.

Since the output terminals of the 3-state buffers 4i and 42 are directly connected to the input terminals a+b of the inverting amplifier 11.12 of the CMOS digital IC, the states of the input terminals a and b of the inverting amplifier 11.12 are forcibly grounded. and protect it from destruction.

In this way, the configuration of the IC protection circuit of this embodiment allows the I'LL oscillator to be turned on and off as needed.
The power consumption of the PLL oscillator can be reduced without destroying the C. In addition, since the component parts and circuit configuration are simple, the cost and size of the circuit can be reduced and there is no problem.

〔Effect of the invention〕

As explained above, according to the present invention, the structure of the protection circuit of the self-bias buffer circuit, which is often used in various circuits of digital devices, can be configured with simple components and circuits, thereby reducing the cost and miniaturization of digital devices. Moreover, the effect of enabling power saving can be obtained.

[Brief explanation of drawings]

FIG. 1 is a principle block diagram showing the configuration of the IC protection circuit of the present invention. FIG. 2 is a block diagram showing the configuration of the IC protection circuit of the first embodiment of the present invention. FIG. 4 is a block diagram showing the configuration of an IC protection circuit according to an embodiment of the present invention. FIG. 4 is a block diagram of a conventional IC protection circuit. In Figs. 1 to 4, 1 is a self-biased buffer circuit, 11.12 is an inverting amplifier, 2 is a capacitance for DC cutoff, 21.22 is a capacitor, 3 is an input disconnection detector, 4 is a switch, 41.42 is a 3-state buffer. 'F Ashiizumi A row o1c Bobin J! Replacement bu■, soph shouting
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Claims (1)

[Claims] An output voltage (Sout) obtained by inverting and amplifying an input signal (Sin).
) is fed back to the input side by a resistor (Rf) to automatically maintain the operating bias at a constant value (approximately VDD/2).
In the protection circuit of the self-biased buffer circuit (1) of C, the capacitance (2) blocks the DC component of the input signal (Sin).
and a switch (operated by an external control signal (C) to force the potential of the input terminal (a) of the self-biased buffer circuit (1) to a constant value away from the steady bias (approximately VDD/2). 4), and operates the switch (4) when the input signal (Sin) is disconnected.