JPS6327798B2 - - Google Patents

Info

Publication number
JPS6327798B2
JPS6327798B2 JP59167342A JP16734284A JPS6327798B2 JP S6327798 B2 JPS6327798 B2 JP S6327798B2 JP 59167342 A JP59167342 A JP 59167342A JP 16734284 A JP16734284 A JP 16734284A JP S6327798 B2 JPS6327798 B2 JP S6327798B2
Authority
JP
Japan
Prior art keywords
memory cell
storage device
memory
test
testing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP59167342A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60167200A (ja
Inventor
Osamu Matsuoka
Atsushi Nigorikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP59167342A priority Critical patent/JPS60167200A/ja
Publication of JPS60167200A publication Critical patent/JPS60167200A/ja
Publication of JPS6327798B2 publication Critical patent/JPS6327798B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor

Landscapes

  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Semiconductor Memories (AREA)
JP59167342A 1984-08-10 1984-08-10 半導体記憶装置の検査方法 Granted JPS60167200A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59167342A JPS60167200A (ja) 1984-08-10 1984-08-10 半導体記憶装置の検査方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59167342A JPS60167200A (ja) 1984-08-10 1984-08-10 半導体記憶装置の検査方法

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP51129911A Division JPS5816559B2 (ja) 1976-10-27 1976-10-27 半導体記憶装置の検査装置および検査方法

Publications (2)

Publication Number Publication Date
JPS60167200A JPS60167200A (ja) 1985-08-30
JPS6327798B2 true JPS6327798B2 (enrdf_load_stackoverflow) 1988-06-06

Family

ID=15847947

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59167342A Granted JPS60167200A (ja) 1984-08-10 1984-08-10 半導体記憶装置の検査方法

Country Status (1)

Country Link
JP (1) JPS60167200A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0424612A3 (en) * 1989-08-30 1992-03-11 International Business Machines Corporation Apparatus and method for real time data error capture and compression for redundancy analysis of a memory

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5066124A (enrdf_load_stackoverflow) * 1973-10-12 1975-06-04

Also Published As

Publication number Publication date
JPS60167200A (ja) 1985-08-30

Similar Documents

Publication Publication Date Title
US6477672B1 (en) Memory testing apparatus
KR100432791B1 (ko) 메모리 시험방법 및 메모리 시험장치
US6182262B1 (en) Multi bank test mode for memory devices
EP1377981B1 (en) Method and system to optimize test cost and disable defects for scan and bist memories
KR100327136B1 (ko) 반도체 메모리 장치 및 이 장치의 병렬 비트 테스트 방법
JP2762397B2 (ja) メモリモジユールの不良回路の確認および位置探索のための装置および方法
US7178072B2 (en) Methods and apparatus for storing memory test information
US5680544A (en) Method for testing an on-chip cache for repair
KR100458357B1 (ko) 메모리를 검사하기 위한 검사 장치
US7859938B2 (en) Semiconductor memory device and test method thereof
US3962687A (en) Method of inspection of semiconductor memory device
US6711705B1 (en) Method of analyzing a relief of failure cell in a memory and memory testing apparatus having a failure relief analyzer using the method
US4642784A (en) Integrated circuit manufacture
JPH10106292A (ja) メモリ試験装置
US6675336B1 (en) Distributed test architecture for multiport RAMs or other circuitry
KR100212599B1 (ko) 메모리 시험장치
US5758063A (en) Testing mapped signal sources
JPS6327798B2 (enrdf_load_stackoverflow)
JPS5816559B2 (ja) 半導体記憶装置の検査装置および検査方法
JPS6327797B2 (enrdf_load_stackoverflow)
US7689878B2 (en) System and method for testing defects in an electronic circuit
US5522038A (en) Testing mapped signal sources
JPH0823016A (ja) 半導体メモリのテスト方法
US7257733B2 (en) Memory repair circuit and method
JP4183854B2 (ja) メモリ試験装置