JPS63276273A - Silicon carbide semiconductor element - Google Patents

Abstract

PURPOSE:To provide a substantially improved silicon carbide semiconductor element, by forming the element from a single-crystal silicon carbide film of good quality having internal stress being decreased. CONSTITUTION:An aluminum mask 16 is formed selectively on the crystal growing surface of a single-crystal silicon substrate 15 used as a supporting substrate having a crystal face (111) on which crystals are to be grown. The surface of the substrate 15 not covered with the mask 16 is etched by the RIE process to form recesses. The mask is removed to provide a substrate 14 for growing single crystals of silicon carbide. After silicon carbide semiconductor films 17 and 18 are formed by the CVD process. Al for providing source and drain electrodes 119 and 20 and Au for providing a gate Schottky electrode 21 are deposited by vacuum vapor deposition. In this manner, a plurality of field effect transistors of Schottky junction type can be juxtaposed on the flat bottoms of the recesses as well as on the flat tops of the projected sections.

Description

[Detailed Description of the Invention] Technical Field The present invention relates to a semiconductor device structure formed using a silicon carbide single crystal obtained by using a unique silicon single crystal substrate as a substrate for growing a silicon carbide single crystal. It is.

<Prior Art> Silicon carbide semiconductors have a wide forbidden band width (2.2 to 3 JeV), are extremely stable thermally, chemically and mechanically, and are resistant to radiation damage.

Therefore, semiconductor devices using silicon carbide are conventionally made from silicon (Si).
) and other semiconductors are difficult to use under high temperatures.

It is expected to be applied in a wide range of fields as an element material that can be used under harsh conditions such as high-power drive and radiation irradiation. However, silicon carbide semiconductors have many advantages such as
Despite being a material with great potential, practical application has been hindered by the need for large-area, high-quality materials with well-controlled dimensions and shapes required for mass production on an industrial scale with productivity in mind. The reason for this is that crystal growth technology that could stably supply single crystals had not been established.

Conventionally, on a laboratory scale, silicon carbide single crystals have been grown by sublimation recrystallization method (also known as Rayleigh method), and on single crystal pieces obtained by Rayleigh method, vapor phase growth method or liquid phase growth method has been used. By epitaxially growing a larger silicon carbide single crystal, we have obtained a silicon carbide single crystal of minimum practical size. However, these single crystals have a small area, and it is difficult to control their size and shape with high precision. Furthermore, it is not easy to control the crystal polytypes and impurity concentrations present in silicon carbide.

On the other hand, the present inventors have recently proposed a method of growing a high-quality, large-area 3C-type silicon carbide single crystal on a silicon single-crystal substrate by vapor phase growth (CVD) (Patent Application No. 58).
-76842). This method is a method by which a large-area, high-quality silicon carbide single crystal can be grown on a silicon single-crystal substrate, which is inexpensive and easily available, with controlled crystal polymorphism, impurity concentration, size, shape, etc. A method has also been developed in which the surface of a silicon single crystal substrate is heated and carbonized in a hydrocarbon gas atmosphere to form a thin film of silicon carbide on the surface, and a silicon carbide single crystal is grown on this thin film by CVD. . However, even if these methods are used, the internal stress due to the difference in lattice constant between the silicon single crystal substrate and the obtained silicon carbide single crystal cannot be completely removed, causing warping, cracking, and Problems arise at the element fabrication stage.

<Purpose of the Invention> In view of the above-mentioned problems, the present invention provides a method for growing a silicon carbide single crystal growth region by using a silicon single crystal substrate having a flat surface with steps or irregularities formed thereon as a growth substrate. The silicon carbide single crystal with reduced internal stress and good crystallinity is formed in the growth layer, and various semiconductor devices and integrated circuits such as pn junction diodes or Schottky barrier junction field effect transistors are formed on this silicon carbide single crystal. The purpose is to provide technology to obtain the following.

<Example 1> FIG. 1, FIG. 2, and FIG. 3 are manufacturing process diagrams of a silicon carbide single-crystal semiconductor device, respectively, to provide a detailed explanation of the present invention, and illustrate the manufacturing process of a diode and a MES-FET. ing. FIG. 4 is a configuration diagram showing an example of a growth apparatus used for crystal growth.

As shown in FIG. 1 tAl, a mask 16 of aluminum (A) is selectively formed on the crystal growth surface of the silicon single crystal substrate 15 used as a support substrate for crystal growth, which is set on the crystal growth surface (111). After that, clean this side with chlorofluorocarbon gas (C
Using F4) and oxygen gas (02) or active ion etching (RIE), the uncovered portion of the mask 16 is etched to a depth of approximately 3 μm so that the bottom surface is flat, as shown in Figure 1B). An etched recess is formed, and then mask 16 is removed to provide silicon carbide single crystal growth substrate 14. After 15 minutes of etching, the height difference between the concave and convex portions becomes approximately 5 μm. Further, the masks 16 of A No. are 1 inch in diameter, and the mutual spacing between them is set to 1 inch. With this flat surface73. A silicon single crystal substrate IQ having an uneven shape formed thereon is placed on the sample stage 2 of the growth apparatus shown in FIG. Next, the growth apparatus shown in FIG. 4 will be explained. A quartz support 8 on which a graphite sample holder 2 is mounted is installed inside a water-cooled horizontal double quartz tube 1, and a high-frequency current is passed through a work coil 4 wound around the outer body of the reaction tube 1. This sample stage 2 is heated by induction. The sample stage 2 may be installed horizontally or may be appropriately inclined. A branch pipe 5 serving as a gas inlet is provided at one end of the reaction tube 1, and cooling water is supplied to the quartz tube outside the double quartz tube 1 via a branch pipe 6.7. The bent end of the reaction tube 1 is closed with a stainless steel flange 8, and a stop plate 9 is placed around the periphery of the flange. Bolt 10. Nut 11.0-
It is sealed with a ring 12. A branch pipe 13 serving as a gas outlet is provided at the center of the flange 8. Using this growth apparatus, crystal growth is performed as follows.

Silane gas (SiH4) and propane gas (C3H
8)? -Chemical vapor deposition method (C
A silicon carbide single crystal film is grown by VD method). In this growth step, diborane gas (BzHs)'! is first applied as a carrier forming gas onto the silicon single crystal substrate 14. By adding z, a p-type silicon carbide single crystal film 17 of approximately 5 μm is grown on each uneven flat surface. Next, the supply of B2H and gas is cut off, and a non-doped n-type silicon single crystal film 18 is continuously grown. Grow to .5 μm. After forming the silicon carbide semiconductor films 17 and 18, a source electrode 19 and a drain electrode 2 are formed on the silicon carbide single crystal film 18.
0 is Ai, the gate Schottky electrode 21 is formed by vacuum evaporation of gold (Au) FJC, and a plurality of Schottky junction field effect transistors (FETs) are formed in parallel on each flat part of the unevenness. can. A silicon carbide single crystal 1 is placed on a silicon single crystal substrate 14 having irregularities formed in this way.
7.18'i By dividing and forming each unevenness along the flat surface, internal stress is reduced and an FET can be formed using silicon carbide single crystal with good crystallinity. Mutual fundductance (g
m ) is 0.5 mS when a silicon single crystal substrate with no unevenness is used, but it increases to 2 mS in the above example, and the characteristics are improved. In the above embodiment, n-type silicon carbide single crystal film 17 may be formed by carbonizing the surface of silicon single crystal substrate 140 instead of growing by CVD. That is, hydrogen (B2) gas was used as a carrier gas at 10 rpm, and propane (C3) was used for surface carbonization.
Ha) Gas is flowed at a rate of about 1.0 cc per minute, and B2) 1a gas is added for carrier formation, and the work coil 4 is
A high frequency current is supplied to inductively heat the graphite sample stage 2, and the temperature of the silicon single crystal substrate 14 is raised to about 1350°C.

At this temperature, the surface of the silicon single crystal substrate 14 is carbonized 751
B enters from the surface to form a thin film of p-type silicon carbide single crystal. If necessary, monosilane (SiH4) gas as a silicon raw material and propane (C3Ha) gas as a carbon raw material are both supplied onto this silicon carbide single crystal thin film at a flow rate of 0.9 cc/min, and further B, H, and gases are added. By doing C
A p-type silicon carbide single crystal film of sufficient thickness is grown using the VD method.

The silicon carbide film superimposed on the n-type silicon carbide single crystal film 17 may be a polycrystalline or amorphous film in addition to single crystal.
It is possible to operate it as an ET.

<Example 2> In the above Example 1, only a field effect transistor was formed on a silicon carbide single crystal grown on a silicon single crystal substrate 14 on which an uneven surface was formed, but in this example, an F transistor was formed on a flat surface of a convex part.
ET, a diode is formed on the flat surface of the recess. As shown in FIG. 1 (tc), a silicon carbide single crystal film 17. As shown in FIG. 2 (Al), only the peripheral edge of the flat surface of the recess is partially etched by reactive ion etching using CF* and 02 gas to form an n-type silicon carbide single crystal film 18. The n-type silicon carbide single crystal film 17 is removed to expose the n-type silicon carbide single crystal film 17.The exposed p-type silicon carbide crystal film 17 surface and the n-type silicon carbide single crystal film 1 are removed in the recess.
A diode electrode 221 is formed on each of the 8 surfaces, and this region is used as a pn junction diode. The source electrode 19 of A) is provided on the flat surface of the convex portion as in the first embodiment. A drain electrode 20 and an Au Schottky electrode 21 for the gate are formed and used as an FET. With the above, a plurality of diodes and MES-FET's can be arrayed and formed on the same substrate as shown in FIG. 2).

In Example 24C above, a plurality of different types of elements may be formed on one of the flat surfaces of the concave portion or the convex portion.

<Example 3> In Example 1.2 above, elements are formed over almost the entire area of a silicon carbide single crystal film grown on the entire surface of a silicon substrate having irregularities, but in this example, a silicon carbide film having irregularities is formed. A part of silicon carbide single crystal 1 on the substrate is removed to form an element.

First, as in Example 1, a silicon carbide single crystal film 17.1g is formed on a silicon substrate 14 having irregularities as shown in FIG. 1c). Next, an A mask 28 is formed only in the element formation region. Next, the silicon carbide single crystal in the uncovered portion of the A mask 23 is etched away using CF, 02 or active ion etching, and the silicon carbide single crystal film 17 is partially etched as shown in FIG. 18 remain. Next, M on the remaining silicon carbide single crystal @17,18
Ai was deposited as the source and drain electrodes 19 and 20 of the ESFET, and Au'i was deposited as the gate electrode 21.
A MES-FET is formed as shown in Figure β).

In this embodiment, the MES-FET is formed on the flat surface of the convex portion, but it may be formed on the flat surface of the concave portion. Alternatively, impurities can be vapor-phase diffused onto the surface of the silicon substrate from which the silicon carbide single crystal films 17 and 18 have been removed, and a composite semiconductor substrate can be obtained in which a semiconductor element such as a Si-based diode is formed in this region.

Furthermore, in each of the above embodiments, the diode and MES・FE
Although we have explained the fabrication of T, MOS-FET and pnp
) It is also easy to form transistors, logic circuits, and integrated circuits.

Although active ion etching was used to etch the silicon substrate, other etching methods may be used. In addition to processing the growth surface of the silicon single crystal substrate 14 into an uneven shape, it may be processed into a step shape to form a step difference, or a processing state that is a mixture of both methods may be used. In this case, it is desirable that the difference in height between the steps or irregularities be 0.5 μm or more from the viewpoint of the growth thickness of the silicon carbide single crystal film. Since each divided silicon carbide single crystal film is grown to have a sufficient area as a wafer for forming an element, no problem occurs in forming the element.

<Effects of the Invention> According to the present invention, by forming an element using a high quality silicon carbide single crystal film with reduced internal stress, it is possible to significantly improve the characteristics of the element. It becomes possible to develop a wide range of application fields that take advantage of the advantages of silicon semiconductors.

[Brief explanation of the drawing]

FIG. 1, FIG. 2, and FIG. 8 are sectional views showing the manufacturing process of a silicon carbide semiconductor device, each of which explains the present invention in detail. FIG. 4 is a cross-sectional view of the silicon carbide growth apparatus. 14...Silicon single crystal substrate, 16.28...Aluminum mask, 17...P silicon carbide single crystal film, 18.
...N-type silicon carbide single crystal film, 19...Source electrode, 2
0...Drain electrode, 21...Schottky gate electrode, 22...Diode electrode. Agent Patent Attorney Takeshi Sugiyama (1 other person) Figure 11 Figure 21! 2 Figure 3 Figure 4 Sen

Claims (1)

[Claims] 1. A silicon carbide film grown on each flat surface divided in correspondence with steps or irregularities formed on a silicon single crystal substrate surface, and a means for feeding power to the silicon carbide film. A silicon carbide semiconductor device characterized by comprising: 2. The silicon carbide semiconductor device according to claim 1, wherein the height difference of the steps or irregularities formed on the surface of the silicon single crystal substrate is 0.5 μm or more. 3. A silicon carbide semiconductor device according to claim 1 or 2, in which a (111) plane is used as a silicon single crystal substrate surface.