JPS6326906B2 - - Google Patents

Info

Publication number
JPS6326906B2
JPS6326906B2 JP56213641A JP21364181A JPS6326906B2 JP S6326906 B2 JPS6326906 B2 JP S6326906B2 JP 56213641 A JP56213641 A JP 56213641A JP 21364181 A JP21364181 A JP 21364181A JP S6326906 B2 JPS6326906 B2 JP S6326906B2
Authority
JP
Japan
Prior art keywords
activation
specific address
activated
flop
flip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56213641A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58115572A (ja
Inventor
Masaaki Kobayashi
Noboru Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP21364181A priority Critical patent/JPS58115572A/ja
Publication of JPS58115572A publication Critical patent/JPS58115572A/ja
Publication of JPS6326906B2 publication Critical patent/JPS6326906B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/17Interprocessor communication using an input/output type connection, e.g. channel, I/O port

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
JP21364181A 1981-12-29 1981-12-29 起動制御方式 Granted JPS58115572A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21364181A JPS58115572A (ja) 1981-12-29 1981-12-29 起動制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21364181A JPS58115572A (ja) 1981-12-29 1981-12-29 起動制御方式

Publications (2)

Publication Number Publication Date
JPS58115572A JPS58115572A (ja) 1983-07-09
JPS6326906B2 true JPS6326906B2 (US07943777-20110517-C00090.png) 1988-06-01

Family

ID=16642510

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21364181A Granted JPS58115572A (ja) 1981-12-29 1981-12-29 起動制御方式

Country Status (1)

Country Link
JP (1) JPS58115572A (US07943777-20110517-C00090.png)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5463644A (en) * 1977-10-31 1979-05-22 Toshiba Corp Multiprocessing system
JPS58101361A (ja) * 1981-12-14 1983-06-16 Hitachi Ltd デ−タ処理装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5463644A (en) * 1977-10-31 1979-05-22 Toshiba Corp Multiprocessing system
JPS58101361A (ja) * 1981-12-14 1983-06-16 Hitachi Ltd デ−タ処理装置

Also Published As

Publication number Publication date
JPS58115572A (ja) 1983-07-09

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