JPS63263824A - 振幅変換回路 - Google Patents

振幅変換回路

Info

Publication number
JPS63263824A
JPS63263824A JP62098809A JP9880987A JPS63263824A JP S63263824 A JPS63263824 A JP S63263824A JP 62098809 A JP62098809 A JP 62098809A JP 9880987 A JP9880987 A JP 9880987A JP S63263824 A JPS63263824 A JP S63263824A
Authority
JP
Japan
Prior art keywords
mosfet
current
gate
source
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62098809A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0581088B2 (enrdf_load_stackoverflow
Inventor
Koichi Matsumoto
幸一 松本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62098809A priority Critical patent/JPS63263824A/ja
Publication of JPS63263824A publication Critical patent/JPS63263824A/ja
Publication of JPH0581088B2 publication Critical patent/JPH0581088B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/017509—Interface arrangements
    • H03K19/017518—Interface arrangements using a combination of bipolar and field effect transistors [BIFET]
    • H03K19/017527—Interface arrangements using a combination of bipolar and field effect transistors [BIFET] with at least one differential stage

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Manipulation Of Pulses (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)
  • Amplifiers (AREA)
JP62098809A 1987-04-21 1987-04-21 振幅変換回路 Granted JPS63263824A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62098809A JPS63263824A (ja) 1987-04-21 1987-04-21 振幅変換回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62098809A JPS63263824A (ja) 1987-04-21 1987-04-21 振幅変換回路

Publications (2)

Publication Number Publication Date
JPS63263824A true JPS63263824A (ja) 1988-10-31
JPH0581088B2 JPH0581088B2 (enrdf_load_stackoverflow) 1993-11-11

Family

ID=14229662

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62098809A Granted JPS63263824A (ja) 1987-04-21 1987-04-21 振幅変換回路

Country Status (1)

Country Link
JP (1) JPS63263824A (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02137409A (ja) * 1988-11-18 1990-05-25 Nec Corp 半導体集積回路装置
JPH10293995A (ja) * 1998-03-30 1998-11-04 Hitachi Ltd 半導体記憶装置
JP2014187605A (ja) * 2013-03-25 2014-10-02 Citizen Holdings Co Ltd 演算増幅回路

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02137409A (ja) * 1988-11-18 1990-05-25 Nec Corp 半導体集積回路装置
JPH10293995A (ja) * 1998-03-30 1998-11-04 Hitachi Ltd 半導体記憶装置
JP2014187605A (ja) * 2013-03-25 2014-10-02 Citizen Holdings Co Ltd 演算増幅回路

Also Published As

Publication number Publication date
JPH0581088B2 (enrdf_load_stackoverflow) 1993-11-11

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