JPS63260058A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent pitches of wiring leads from being shifted in a semiconductor device which has a plurality of wirings being small in width and in pitches between wirings, by forming the wiring leads on a flexible tape-shaped film and collectively connecting a semiconductor chip with the leads and next performing resin sealing for them. CONSTITUTION:A copper foil of about 30mum in thickness is stuck on a peripheral rear side of a cut-out part 3 of heat-resisting carrier tape 1 which has the cut-out part 3 in an mounting region of a semiconductor chip 6 to be mounted, and a photoetching method or the like is used to form this copper foil into any necessary wiring lead 2 of a pattern of e.g., 100mum or so in width. In succession, a semiconductor chip 6 is stuck on the rear side of the cut-out part 3 of the carrier tape 1, and wiring connections of the wiring leads 2 to electrode pads of the semiconductor chip 6 are collectively performed by a bump method or the like. Next, resin in a plastic mold molding method is used to perform dielectric sealing of the semiconductor chip 6 including part of the wiring leads 2. Pitches of leads can be hence prevented from being shifted.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device sealed with resin by plastic nac molding.

[Conventional technology]

Traditionally, the manufacturing method for this type of semiconductor device involves plastic mold assembly, in which a semiconductor chip is mounted on a lead frame made of iron-nickel alloy, leads and electrodes are connected by bonding, etc., and then molded and sealed with plastic resin. It had stopped.

[Problem that the invention seeks to solve]

In the conventional semiconductor device manufacturing method described above, the lead pitch is likely to be misaligned or deformed during processing, handling, and transportation of the lead frame, so the minimum lead pitch is about 0.65 mm. This has the disadvantage that it hinders the increase in the number of terminals and miniaturization of semiconductor devices.

[Means for solving problems]

The method for manufacturing a semiconductor device of the present invention includes the steps of bonding copper foil to a region in contact with a predetermined side of a cutout corresponding to a semiconductor chip installation region provided on a heat-resistant carrier tape, and removing the unnecessary portion of the copper foil. a step of removing a semiconductor chip to form a predetermined wiring lead pattern; a step of placing a semiconductor chip in the cutout and collectively connecting the wiring leads and the electrodes of the semiconductor chip; and a step of leaving the tip of the wiring lead. The method includes a step of covering and sealing the semiconductor chip and a portion of the wiring leads with a resin.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIGS. 1A and 1B are a plan view and a cross-sectional view taken along line A-A' of a semiconductor device manufactured using an embodiment of the present invention, respectively.

As shown in FIG. 1, a semiconductor device is arranged in a heat-resistant carrier tape 1, wiring leads 2 formed on the carrier tape 1 with a predetermined pattern, and cutouts 3 provided in the carrier tape 1. It is configured to include a semiconductor chip 6 and a plastic resin 7 that includes a part of the wiring leads 2 and seals the semiconductor chip 6.

Next, FIG. 2 is a plan view of the carrier tape of FIG. 1.

As shown in FIG. 2, a copper foil with a thickness of about 30 μm is attached to the back side around the cutout 3 of a heat-resistant carrier tape 1 made of polyimide or the like, which has a cutout 3 in the installation area of the semiconductor chip 6 to be mounted. The copper foil is then subjected to a microfabrication technique such as photoetching to form any necessary wiring leads 2 in a pattern with a width of, for example, about 100 μm.

The wiring leads 2 may be gold-plated or solder-plated, taking into account soldering performance when mounting them on a printed circuit board.

The shape of the carrier tape 1 and the shapes of the cutouts 3 and 4 are provided to match the semiconductor chip.

Next, the semiconductor chip 6 is applied to the cutout 3 of the carrier tape 1 from the back side, and the wiring leads 2 and the electrode pads of the half-shaped chip 6 are bundled together using a bump method ('1' A) 3 method). Connect the wiring.

Next, by a plastic molding method using a metal mold, the semiconductor chip 6 is molded into a resin 7 including a part of the wiring leads 2.
Then, as shown in FIG. 1, it is insulated and sealed.

Further, the area indicated by the two-dot chain line of the carrier tape 1 is cut and separated by paring, and the portion of the wiring lead 2 exposed from the resin 7 is bent, thereby obtaining the semiconductor device shown in FIG.

〔Effect of the invention〕

As explained above, the present invention forms wiring leads on a flexible tape-like film, connects the leads to the semiconductor chip all at once, and seals the wiring with resin using a plastic molding method. This has the effect of preventing pitch deviation of wiring leads in a semiconductor device having a large number of wirings with small widths and pitches between wirings.

[Brief explanation of the drawing]

1(a) and (b) are a plan view and a sectional view taken along line 8-A' of a semiconductor device manufactured using an embodiment of the present invention, and FIG. 2 is a plan view of the carrier tape shown in FIG. 1. It is. 1...Carrier tape, 2...Wiring lead, 3, 4
...Cutout part, 6...Semiconductor chip, 7...Resin.

Claims (1)

[Claims] A process of bonding copper foil to an area touching a predetermined side of a cutout corresponding to a semiconductor chip installation area provided on a heat-resistant carrier tape, and removing an unnecessary portion of the copper foil to form a predetermined wiring lead pattern. a step of placing a semiconductor chip in the cutout and connecting the wiring leads and the electrodes of the semiconductor chip together; and a step of connecting the semiconductor chip and the wiring leads, leaving the tips of the wiring leads. 1. A method for manufacturing a semiconductor device, comprising the step of covering and sealing with a resin.