JPS63253647A - Semiconductor device - Google Patents

Abstract

PURPOSE:To remove diffective connection among wirings due to the external diffusion of an impurity from an interlayer insulating film, and to improve the yield and reliability of manufacture by coating the side face of a contact hole formed to the interlayer insulating film having reflow properties with an insulating film preventing the reflow of the interlayer insulating film. CONSTITUTION:A P<+> type diffusion layer wiring 14, a gate oxide film 13 and a field oxide film 12 are shaped to the surface of an N-type semiconductor substrate 11. A PSG film 15 formed onto the surfaces of the wiring 14, oxide film 13 and oxide film 12 as an interlayer insulating film having reflow properties, and an oxide film 18 having no reflowing properties and by a CVD method is shaped onto the side face of a contact hole formed to the PSG film 15. A tungsten silicide wiring 19 connected the P<+> type diffusion layer wiring 14 through a CVD oxide film 16 is shaped onto the PSG film 15. Accordingly, the PSG film 15 does not reflow and protrude into the contact hole through heat treatment as a post-process, and an impurity does not also diffuse to the outside from the PSG film 15, thus completely connecting the wiring 19 and 14.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to the structure of an interlayer insulating film.

[Conventional technology]

Conventionally, a semiconductor device having a multilayer wiring structure has a structure in which an interlayer insulating film formed of a reflowable material containing impurities is exposed at a contact hole portion of an interlayer insulating film, particularly at a side surface of the contact hole.

[Problem that the invention seeks to solve]

In the conventional semiconductor device described above, since the interlayer insulating film containing impurities and having reflow properties is exposed at the contact hole portion, the contact hole is removed by heat treatment after opening the contact or heat treatment after forming the upper wiring layer. There is a drawback that outward diffusion of impurities from the first interlayer insulating film occurs in some regions, and the impurities cause deterioration of contact properties. for example,
When a PSG film is used as an interlayer insulating film, when phosphorus is diffused outward and diffused into the P+ diffusion layer wiring, the connection between the upper layer wiring and the P+ diffusion layer wiring becomes almost open, which makes it difficult to manufacture semiconductor devices. The disadvantage is that yield and reliability are reduced.

In addition, when an interlayer insulating film with good reflow properties is used, flow occurs again during heat treatment after the contact hole is formed, making the side surface of the contact hole convex and reducing the contact size. .

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device which eliminates the above-mentioned drawbacks, eliminates poor connection between wiring lines due to outward diffusion of impurities from an interlayer insulating film, and improves manufacturing yield and reliability.

[Means for solving problems]

A semiconductor device of the present invention includes an interlayer insulating film formed on a semiconductor substrate, a contact hole formed in the interlayer insulating film, and an insulating film formed on a side surface of the contact hole to prevent reflow of the interlayer insulating film. It consists of:

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a sectional view of a first embodiment of the invention.

In FIG. 1, on the surface of an N-type semiconductor substrate 11, a P+ type diffusion layer wiring 14. A gate oxide film 13 and a field oxide film 12 are formed. A PSG film 15 is formed on its surface as an interlayer insulating film with reflow properties, and on the side surface of the contact hole 17 formed in the PSG film 15, an acid f arsenic film (CVD method) without reflow properties ( A tungsten silicide wiring 19 (hereinafter referred to as a CVDPi film) is formed.Then, a tungsten silicide wiring 19 is formed on the PSG film 1 and connected to the P+ type diffusion layer wiring 14 via the CVD oxide film 16. The first
In this embodiment, the side surface of the contact hole 17 provided in the PSG film 15 is covered with a CVD oxide film 1 that does not have reflow properties.
8, the PSG film 15 will not flow into the contact hole and protrude even during heat treatment in a later process, and impurities will not diffuse outward from the PSG film 15. Therefore, the tungsten silicide wiring 19 and the P'' type resistive diffusion layer wiring 14 are perfect. 2 Next, the manufacturing method of the first embodiment is shown in FIGS.
First, as shown in FIG. 3(a), an N-type semiconductor substrate 11 is oxidized to a thickness of 0.5 mm by selective oxidation using a 5 oxidation-resistant mask.
A field acid film 12 of 6 μrn is formed, and a gate oxide film 13 is formed to a thickness of 300 μm. Next, by self-alignment using this field oxide film 12 as a mask, boron ions are implanted to form the source. or drain P+
A type diffusion layer wiring 14 is formed.

Next, as shown in FIG. 3(b), PS is used as an interlayer insulating film.
G film 15 is deposited to a thickness of 4,000 yen, and CVD acid film 16 is deposited to a thickness of 1,000 yen.5 Next, using a normal photoresist process, a PSG film 15 and a CVD oxide film 1 are deposited.
6 is etched to open a contact hole 17 that reaches the P' type resistive diffusion layer wiring 14.

Next, as shown in FIG. 3(c), a CVD oxide film 18 is deposited on the surface of the substrate to a thickness of 600 nm.

Subsequently, as shown in FIG. 3(d), the substrate is etched back by ion etching so that the CVD acid 1 arsenic film 18 remains only on the side surfaces of the contact hole 17. At this time, the CVD oxide film 16 is already on top of the PSG film 1.
Since the PSG film 15 is deposited, CVD is performed to prevent the PSG film 15 from being exposed due to over-etching during etching.
It is easy to leave the oxide film 16.

Next, heat treatment is performed at 900° C. in a nitrogen atmosphere in order to recover damage to the substrate during the formation of the contact hole. At this time,
Since the PSG film 15 is covered with the CVD oxide film 16.18, outward diffusion of phosphorus is suppressed, and
Since the side surface of the contact I/hole is fixed by the CDV oxide film 18, the shape of the contact does not change due to reflow.

Finally, tungsten silicide is deposited on the entire surface of the substrate by a sprinkling method and patterned into a predetermined shape to form tungsten silicide wiring 19 to complete the semiconductor device shown in FIG.

FIG. 2 is a longitudinal sectional view of a second embodiment of the invention.

In FIG. 2, the semiconductor device includes a field oxide film 12'A formed on an N-type semiconductor substrate 11, a polysilicon wiring 24 extending over the field oxide film 12A, and a BPSG film 25 as an interlayer insulating film. 5CDV nitride film 28
and an aluminum wiring 29 that is in contact with the polysilicon wiring through a contact hole 27 and extends over the interlayer insulating film. Here, the BPSG film 25 on the side surface of the contact hole 17 is covered with a CDV nitride film 28, and is clamped so that the shape of the contact hole does not change during reflow due to heat treatment after the contact hole is opened.

The manufacturing method of this second embodiment is a conventional MOSFET.
After forming polysilicon wiring 24, which is a gate electrode, by the ET manufacturing process.

A BPSG film 25 is deposited to a thickness of 5000 nm by CVD, and reflowed at 900° C. for 30 minutes in a nitrogen atmosphere. Next, a contact hole 17 is formed by anisotropic etching using a photoresist process. Next, C
After the VD nitride film is deposited to a thickness of 500 nm, it is etched back by anisotropic etching to leave the CDV nitride film 28 only on the side surfaces of the contact.

After this, heat treatment is performed at 900°C for 10 minutes in a nitrogen atmosphere to reduce damage during contact hole formation.At this time, the contact hole 27 p; and q surfaces are covered with a non-reflowable CDV nitride film. Therefore, the shape of the contact hole does not change (shrink) due to reflow of the BPSG film, and good contact properties are ensured.

Finally, two aluminum interconnections are formed using a conventional method to obtain a semiconductor device having the cross-sectional structure shown in FIG.

〔Effect of the invention〕

As explained above, the present invention prevents the reflow from the interlayer insulating film by coating the side surfaces of the contacts/holes formed in the interlayer insulating film with reflow properties with an insulating film that prevents reflow of the interlayer insulating film. This has the effect of suppressing outward diffusion of impurities and preventing deformation of the contact hole due to reflow of the interlayer insulating film during heat treatment after contact hole formation. Therefore, the manufacturing yield and reliability of semiconductor devices will improve2.

[Brief explanation of drawings]

FIG. 1 is a longitudinal cross-sectional view of a first embodiment of the present invention, FIG. 2 is a longitudinal cross-sectional view of a second embodiment of the present invention, and FIGS. 3(a) to (d)
1A and 1B are cross-sectional views of a semiconductor chip shown in the order of steps for explaining the manufacturing method of the first embodiment. 11...N-type semiconductor substrate, 12.12A...Field oxide film, 13...Gate oxide film, 14...P
+ type diffusion layer wiring, 15...PSG film, 16.18...
・CVD oxide film, 17... contact hole, 19...
Tungsten silicide wiring, 24... Polysilicon wiring, 25... BPSG film, 28... CVD nitride film,
Two...aluminum wiring.

Claims (1)

[Claims] The method includes an interlayer insulating film formed on a semiconductor substrate, a contact hole formed in the interlayer insulating film, and an insulating film formed on a side surface of the contact hole to prevent reflow of the interlayer insulating film. semiconductor devices.