JPS632420A - Duty factor conversion circuit - Google Patents

Abstract

PURPOSE:To convert pulses having an optional duty factor into pulses having a prescribed duty factor, by providing a frequency dividing means, triangular- wave converting means, pulse converting means, and exclusive 'OR' means. CONSTITUTION:Pulses having a small duty factor inputted to a D-type FF 31 used as a frequency dividing means are integrated and converted into triangular waves by means of an integration circuit 41 used as a triangular-wave converting means after their frequencies are divided, and then, inputted to an operational amplifier 51 working as a pulse converting means. The amplifier 51 changes the threshold level by changing the value of a variable resistor Rv, and thus, pulses having a different duty factor are outputted. Then the exclusive 'OR' of the frequency divided pulses from the FF 31 and the pulses from the amplifier 51 is taken at an exclusive 'OR' circuit 61 and pulses having a desired duty factor are obtained. When the FF 31, circuits 41 and 61, and amplifier 51 are provided in such way, pulses having an optional duty factor can be converted into pulses having a prescribed duty factor.

Description

[Detailed Description of the Invention] [Summary] In the duty factor conversion circuit, the frequency-divided pulse obtained by frequency-dividing the pulse of the duty factor D1 which is manually input is converted into a triangular wave, and this triangular wave is converted to a predetermined duty factor. After converting the pulse into a pulse having a predetermined duty factor D2, the exclusive OR of this pulse and the frequency-divided pulse described above is performed to obtain a pulse having a predetermined duty factor D2.

[Industrial application field]

The present invention relates to improvements in duty factor conversion circuits.

In recent years, the miniaturization of devices has progressed, and with this, LSI circuits have become smaller.
In order to test the operation of this LSI, it is necessary to supply a clock, and the duty factor of this clock is determined to be, for example, approximately 50χ, so the clock must be supplied to the LSI under test. When the clock duty factor is other than about 50%, this must be converted to about 50K.

Therefore, there is a need for a duty factor conversion circuit that can output a clock with a duty factor of about 50x even if the duty factor of the input clock changes over a wide range.

[Conventional technology]

FIG. 4 is a block diagram of a conventional example, and FIG. 5 is a time chart of FIG. 4. Note that the numbers on the left side of FIG. 5 indicate the waveforms of the portions with the same numbers in FIG.

The operation shown in FIG. 4 will be explained below with reference to FIG.

First, when a pulse of the duty factor D3 as shown in FIG. 5(a)-■ is input, the negative part is delayed by the delay circuit 1 as shown in FIG. portion is directly added to the OR circuit 2. Therefore, Fig. 5(a)-
As shown in (2), two pulses are synthesized to obtain an output pulse with a duty factor larger than the duty factor of the input pulse, but by changing the delay amount τ of the delay circuit 1, a An output pulse with a utility factor can be obtained.

[Problem that the invention seeks to solve]

However, if the pulse width of the input pulse is shorter than the delay time τ of delay circuit 1 (the duty factor is smaller), as shown in Figure 5 (mountain)-■, the pulse that has passed through this delay circuit and the There is a problem in that even if two pulses are added to the OR circuit 2, they cannot be combined and two pulses are output as shown in FIG.

[Means for solving problems]

As shown in FIG. 1, the above problems are caused by the frequency dividing means 3 that divides the frequency of the pulse of the duty factor D+, the triangular wave converting means 4 that converts the output of the cough frequency dividing means into a triangular wave, and the triangular wave converting means. pulse converting means 4 for converting the output of the frequency dividing means into a pulse having a predetermined duty factor, and a duty factor Ih determined by taking the exclusive OR of the output of the frequency dividing means and the output of the pulse converting means. This problem is solved by the factor conversion circuit of the present invention, which is comprised of exclusive OR means 6 that outputs pulses.

[Effect]

The present invention uses the output pulse of the frequency dividing means 3 which operates only at the rising or falling edge of the input pulse to obtain a pulse with a predetermined duty factor D2, and the duty factor of the input pulse is I designed the circuit so that it is unrelated.

That is, the input duty factor applied pulse is divided into frequency dividing means 3. After converting into a triangular wave via the triangular wave converting means 4,
The pulse conversion means 5 having a predetermined threshold level converts the pulse into a pulse having a predetermined duty factor, and the exclusive OR means 6 performs exclusive OR of this pulse and the output pulse from the frequency dividing means. Take duty factor D2
It was converted to a pulse of

〔Example〕

FIG. 2 shows a circuit diagram of an embodiment of the present invention, and FIG. 3 shows a time chart of FIG.

Note that the numbers on the left side of FIG. 3 indicate the waveforms of the portions with the same numbers in FIG. Also, the same reference numerals indicate the same objects throughout the figures. Hereinafter, the 1 frequency dividing means will be explained as follows.
The operation of the diagram will be explained.

However, the D type flip-flop 31 has a frequency dividing means 3,
The integration circuit 41 includes a triangular wave conversion means 4, an operational amplifier 51. The variable resistor Rv is a pulse conversion means 5 and an exclusive OR circuit 6
1 is a component of the exclusive OR means 6.

First, as shown in Figure 3--, for example, a pulse with a small duty factor D is connected to a D-type flip-flop 3.
In addition to 1, after obtaining a pulse whose frequency is divided by 2 as shown in Fig. 3-■, this is integrated by an integrating circuit 41 composed of a capacitor C and a resistor R, for example, and converted into a triangular wave. It is added to the operational amplifier 51.

The threshold level of the operational amplifier 51 changes by changing the value of the variable resistor RvO, and the dashed-dotted line in FIG. Therefore, the operational amplifier 51 outputs a pulse whose duty factor has changed by changing the position of the slope of the triangular wave that crosses this threshold level to the left and right, but the pulse whose duty factor is approximately 50χ is output. In this case, the median value of the peak and trough values of the triangular wave is set as the threshold level, as shown by the dashed line in Figure 3-■. At this time, the changing point of the pulse output from the operational amplifier 5I is the third
It is located approximately midway between the changing point of the frequency division wave shown in Figure ○ and the next changing point.

Therefore, when the exclusive OR circuit 61 calculates the exclusive OR of the frequency-divided pulse and the pulse from the operational amplifier 51, a pulse with a duty factor of about 50χ is obtained.

Furthermore, if the -dotted chain line is lowered, the duty factor of the pulse shown in Figure 3-■ becomes smaller, so the output pulse becomes approximately 50
A pulse with a duty factor smaller than χ is output, and vice versa, an output pulse with a duty factor larger than about 50χ is obtained.

〔Effect of the invention〕

As described in detail above, according to the present invention, there is an effect that a pulse having an arbitrary duty factor can be converted into a pulse having a predetermined duty factor.

[Brief explanation of drawings]

Figure 1 is a block diagram of the principle of the present invention. FIG. 2 is a circuit diagram of an embodiment of the present invention, Figure 3 is the time chart of Figure 2, Figure 4 is a block diagram of the conventional example. FIG. 5 shows the time chart of FIG. In the figure, 3 is a frequency dividing means; 4 is a triangular wave conversion means; 5 pulse conversion means, 6 indicates exclusive OR means. Akira Hon'ei's Kenpō Pro, Figure 77 Chiang 1 mouth The circuit of the entire efl book) Figure 2 Chiku 2 En's time f ya H 3rd M Submissive Ita'Jo F D 77μno Mature 4 figure

Claims (1)

[Claims] Frequency dividing means (3) for frequency dividing the input pulse of duty factor D_1, triangular wave converting means (4) for converting the output of the frequency dividing means into a triangular wave, and an output of the triangular wave converting means. pulse converting means (5) for converting D into a pulse having a predetermined duty factor; 1. A duty factor conversion circuit comprising: exclusive OR means (6) for outputting an output.