JPS6323892Y2 - - Google Patents

Info

Publication number
JPS6323892Y2
JPS6323892Y2 JP3102782U JP3102782U JPS6323892Y2 JP S6323892 Y2 JPS6323892 Y2 JP S6323892Y2 JP 3102782 U JP3102782 U JP 3102782U JP 3102782 U JP3102782 U JP 3102782U JP S6323892 Y2 JPS6323892 Y2 JP S6323892Y2
Authority
JP
Japan
Prior art keywords
chip jumper
chip
solder
jumper element
element body
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP3102782U
Other languages
Japanese (ja)
Other versions
JPS58133954U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP3102782U priority Critical patent/JPS58133954U/en
Publication of JPS58133954U publication Critical patent/JPS58133954U/en
Application granted granted Critical
Publication of JPS6323892Y2 publication Critical patent/JPS6323892Y2/ja
Granted legal-status Critical Current

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  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Combinations Of Printed Boards (AREA)

Description

【考案の詳細な説明】 この考案は、プリント基板などの回路パターン
上に回路素子を実装して組立てる際に用いられる
チツプジヤンパ素子に関するものである。
[Detailed Description of the Invention] This invention relates to a chip jumper element used when mounting and assembling circuit elements on a circuit pattern of a printed circuit board or the like.

一般に、チツプジヤンパ素子は、プリント基板
などの回路パターン上にチツプタイプの回路素子
を実装して組立てる場合にその回路パターン間に
おける電気的接続素子として用いられているもの
である。
In general, chip jumper elements are used as electrical connection elements between circuit patterns when chip-type circuit elements are mounted and assembled on circuit patterns such as printed circuit boards.

従来のこの種のチツプジヤンパ素子としては、
たとえば銅などの導電材よりなる薄板状の素材の
表面に絶縁層を被覆し、これを一定の長さに切断
して素子本体を形成し、その切断面の両端部を導
電端子部として構成したものがある。かかるチツ
プジヤンパ素子をプリント基板の回路パターン上
に取付ける場合は、第1図に示すように、プリン
ト基板2に形成された導電層よりなる回路パター
ン3,4間にチツプジヤンパ素子1を接着剤15
により仮に位置決めして載置し、半田デイツプに
よりこのチツプジヤンパ素子の各導電端子部1
a,1bにそれぞれ半田5,6を形成して回路パ
ターン3,4に接続する方法がとられている。
As a conventional chip jumper element of this type,
For example, an insulating layer is coated on the surface of a thin plate-like material made of a conductive material such as copper, which is cut to a certain length to form the element body, and both ends of the cut surface are configured as conductive terminals. There is something. When such a chip jumper element is mounted on a circuit pattern of a printed circuit board, as shown in FIG.
Temporarily position and place the chip jumper element with a solder dip.
A method is used in which solders 5 and 6 are formed on a and 1b, respectively, and connected to the circuit patterns 3 and 4.

しかし、チツプジヤンパ素子はその寸法が小さ
く、たとえば、縦、横の寸法にして1.6,3.2
(m/m)程度と小さいものであるから、従来の
チツプジヤンパ素子を用いて取付ける場合には、
回路パターンとの半田付け取付け時にチツプジヤ
ンパ素子1が第1図の矢印方向に容易に浮きやす
くなる。回路パターン間への仮位置決め時にチツ
プジヤンパ素子1が第2図に示すように、一方の
回路パターン側に位置ずれを生じていた場合など
には上述の浮きの問題ともあいまつてさらに半田
切れ等が生じ易くこれらチツプジヤンパ素子の浮
きおよび位置ずれなどによつて半田付けの信頼性
が極めて悪くなるという欠点があつた。
However, the size of the chip jumper element is small, for example, 1.6, 3.2 in vertical and horizontal dimensions.
(m/m), so when installing using a conventional chip jumper element,
The chip jumper element 1 easily floats in the direction of the arrow in FIG. 1 when it is soldered and attached to the circuit pattern. When the chip jumper element 1 is temporarily positioned between circuit patterns, as shown in FIG. 2, if the chip jumper element 1 is misaligned on one side of the circuit pattern, solder breakage, etc. may occur due to the floating problem mentioned above. There was a drawback in that the reliability of soldering became extremely poor due to the floating and positional displacement of these chip jumper elements.

この考案は上記した点に鑑みてなされたもの
で、その目的は、素子本体の両端部間にわたる半
田用溝部を設けることにより、回路パターンへの
取付け時に発生する位置ずれや浮きなどによつて
影響されることなく、確実な半田付けを行なうこ
とができるチツプジヤンパ素子を提供するもので
ある。
This idea was made in view of the above points, and its purpose is to provide a solder groove extending between both ends of the element body, thereby reducing the effects of misalignment and lifting that occur when attaching to a circuit pattern. To provide a chip jumper element capable of performing reliable soldering without being soldered.

以下、この考案の実施例を図について説明す
る。
Hereinafter, embodiments of this invention will be described with reference to the drawings.

第3図はこの考案の一実施例によるチツプジヤ
ンパ素子を示す拡大斜視図である。このチツプジ
ヤンパ素子は、銅などの導電材よりなるチツプタ
イプの素子本体11と、この表面に被覆されたエ
ナメル層などからなる絶縁層12と、この素子本
体11の上面にその両端部間にわたつて形成され
た半田用溝部13とからなり、前記両端部を導電
端子部11a,11bとして構成し、他の周部を
絶縁層12にて電気的に絶縁した構造を有してい
る。絶縁層12は素子本体11の酸化防止の役目
をも兼ねており、半田用溝部13はこの絶縁層1
2より深く形成されている。そして前記両端部の
導電端子部11aおよび11bには予備半田付け
処理を施しておくのが好ましい。
FIG. 3 is an enlarged perspective view showing a chip jumper element according to an embodiment of the invention. This chip jumper element consists of a chip-type element body 11 made of a conductive material such as copper, an insulating layer 12 made of an enamel layer or the like coated on the surface of the element body 11, and a chip-type element body 11 formed on the upper surface of the element body 11 between both ends thereof. It has a structure in which both ends are configured as conductive terminal parts 11a and 11b, and the other peripheral parts are electrically insulated by an insulating layer 12. The insulating layer 12 also serves to prevent oxidation of the element body 11, and the solder groove 13 is formed in this insulating layer 1.
It is formed deeper than 2. Preferably, the conductive terminal portions 11a and 11b at both ends are subjected to a preliminary soldering process.

なお、このようなチツプジヤンパ素子の形成手
段を第4図に基づいて説明すると、これは、薄板
状の導電材よりなる長尺状の素材20の表面にま
ず絶縁層を被覆し、その上面の長手方向に沿つて
半田用溝部21を形成した後、これを各切断部2
2で一定の長さに切断することにより、第3図に
示した構造のチツプジヤンパ素子10を形成する
ことができる。
The means for forming such a chip jumper element will be explained based on FIG. 4. In this method, the surface of a long material 20 made of a thin plate-like conductive material is first coated with an insulating layer, and then the longitudinal direction of the upper surface is covered with an insulating layer. After forming the solder groove 21 along the direction, it is connected to each cut portion 2.
By cutting to a certain length at step 2, the chip jumper element 10 having the structure shown in FIG. 3 can be formed.

上記実施例の構成によると、チツプジヤンパ素
子10を回路パターン上に半田付け固定する場合
は、第5図に示すように、チツプジヤンパ素子1
0をプリント基板2の回路パターン3,4間に載
置し、そして接着剤15によりプリント基板2に
接着仮止めする。ついで、このチツプジヤンパ素
子10を接着したプリント基板2を半田デイツプ
槽に浸漬してチツプジヤンパ素子10の導電端子
部11a,11bと前記溝部13内とに半田5,
6およびこれらをブリツジする半田14を図示す
るように半田付けして行なう。したがつて、従来
のように、回路パターン3,4間の半田付け後に
チツプジヤンパ素子10の浮きが発生したり、ま
た第6図に示すように、チツプジヤンパ素子10
が回路パターン3,4のいずれか一方側に位置ず
れを生じていても、溝部13内の半田14がブリ
ツジされて半田の接続が確実となり、半田付け面
の信頼性を向上させることができる。
According to the configuration of the above embodiment, when the chip jumper element 10 is soldered and fixed onto the circuit pattern, as shown in FIG.
0 is placed between the circuit patterns 3 and 4 of the printed circuit board 2, and is temporarily adhered to the printed circuit board 2 with an adhesive 15. Next, the printed circuit board 2 to which the chip jumper element 10 is bonded is immersed in a solder dip bath, and solder 5,
6 and the solder 14 that bridges them together as shown in the figure. Therefore, as in the conventional case, the chip jumper element 10 may float after soldering between the circuit patterns 3 and 4, and as shown in FIG.
Even if a positional shift occurs on either side of the circuit patterns 3, 4, the solder 14 in the groove 13 is bridged to ensure the solder connection, and the reliability of the soldering surface can be improved.

なお、上述の実施例では素子本体の上面に1つ
の半田用溝部を設ける場合について示したが、上
面以外の側面、底面に設けたり、あるいは半田用
溝部の数を複数個設けたりすることもできる。
In addition, although the above-mentioned embodiment shows the case where one solder groove is provided on the top surface of the element body, it is also possible to provide the solder groove on a side surface other than the top surface, the bottom surface, or to provide a plurality of solder grooves. .

以上説明したように、この考案のチツプジヤン
パ素子によれば、素子本体の面にその両端部にわ
たる半田用溝部を設けることにより、回路パター
ン間への半田付けを確実に行うことができ、これ
によつて、半田付け面の信頼性を向上させること
ができる効果を奏する。
As explained above, according to the chip jumper element of this invention, by providing a solder groove extending over both ends of the element body, soldering between circuit patterns can be reliably performed. Therefore, the reliability of the soldering surface can be improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図および第2図は従来のチツプジヤンパ素
子の回路パターンへの取付手段を説明するための
一部断面図および上面図、第3図はこの考案の一
実施例によるチツプジヤンパ素子の拡大斜視図、
第4図は第3図のチツプジヤンパ素子の形成手段
を説明するための斜視図、第5図および第6図は
第3図のチツプジヤンパ素子の回路パターンへの
取付手段を説明するための一部断面図および上面
図である。 11……素子本体、11a,11b……導電端
子部、12……絶縁層、13……半田用溝部。
1 and 2 are partial cross-sectional views and top views for explaining the means for attaching a conventional chip jumper element to a circuit pattern, and FIG. 3 is an enlarged perspective view of a chip jumper element according to an embodiment of the invention.
4 is a perspective view for explaining the means for forming the chip jumper element shown in FIG. 3, and FIGS. 5 and 6 are partial cross-sectional views for explaining the means for attaching the chip jumper element to the circuit pattern shown in FIG. 3. FIG. 3 is a diagram and a top view. 11...Element body, 11a, 11b...Conductive terminal portion, 12...Insulating layer, 13...Solder groove.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 導電材よりなる素子本体の両端部を導電端子部
として構成してなるチツプジヤンパ素子におい
て、前記素子本体の面に、その両端部間にわたる
少なくとも1つの半田用溝部を形成したことを特
徴とするチツプジヤンパ素子。
A chip jumper element in which both ends of an element body made of a conductive material are configured as conductive terminal parts, characterized in that at least one solder groove is formed on a surface of the element body extending between the both ends. .
JP3102782U 1982-03-05 1982-03-05 Chip jumper element Granted JPS58133954U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3102782U JPS58133954U (en) 1982-03-05 1982-03-05 Chip jumper element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3102782U JPS58133954U (en) 1982-03-05 1982-03-05 Chip jumper element

Publications (2)

Publication Number Publication Date
JPS58133954U JPS58133954U (en) 1983-09-09
JPS6323892Y2 true JPS6323892Y2 (en) 1988-06-30

Family

ID=30042719

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3102782U Granted JPS58133954U (en) 1982-03-05 1982-03-05 Chip jumper element

Country Status (1)

Country Link
JP (1) JPS58133954U (en)

Also Published As

Publication number Publication date
JPS58133954U (en) 1983-09-09

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