JPS63236411A - Solid-state relay - Google Patents

Abstract

PURPOSE:To realize the fast operation of a solid-state relay, by constituting a bias circuit to be connected between the gate and the source of a driving transistor of a parallel circuit consisting of a diode array and a resistor. CONSTITUTION:When an input current flows between the input terminals 1 and 1', an eletromotive force is generated on an optical electromotive force diode array 3. In a case that the bias circuit 10 is constituted of the parallel circuit of the diode array 8 and the resistor 9, no charge operation is delayed because a circuit is clamped by the diode 8. At a moment when the input current between the input terminals 1 and 1' is interrupted, the transistor 6 is turned on, but, since the resistor 9 is connected to the bias circuit 10 in parallel, a time when the transistor 6 is turned off state depends on the value of the resistor 9, therefore, the time can be accelerated compared with the case that only the diode is provided.

Description

[Detailed Description of the Invention] [Technical Field] The present invention converts an input signal into an optical signal using a light emitting diode, converts the optical signal into an electrical signal using a photovoltaic diode array optically coupled to the light emitting diode, and converts the optical signal into an electrical signal. Metal oxide semiconductor field effect transistor (M
This invention relates to a solid-state relay using optical coupling that drives an OSFET.

[Background Art] Figure 4 shows an example of a drive circuit for a field effect transistor using a photovoltaic diode array, in which a light emitting diode (LED) 2 is connected between input terminals 1 and 1''. , the photovoltaic diode array 3 is optically coupled to the light emitting diodes 2.

When an input current flows between the input terminals 1 and 1', the light emitting diode 2 generates an optical signal, and this optical signal generates an electromotive force at both ends of the photovoltaic diode array 3. This electromotive force is passed through diode 4 to the power MOS FET.
At the same time, the voltage is applied between the gate and source of the transistor 5 and flows through the driving transistor 6, which is a normally-on static induction transistor (SIT) or a field effect transistor (FET). Therefore, MOS FET 5
The current that charges the gate capacitance of the drive transistor 6
The current flowing through the diode 4 flows through the diode 4.

Therefore, the gate of the driving transistor 6 is biased to a negative voltage due to the forward voltage drop of the diode 4.

This bias voltage instantly puts the driving transistor 6 into a high impedance state. Therefore, due to the presence of the driving transistor 6, the gate of the power MOSFET 5
There is no delay in charging operations between sources. When the input current is constantly flowing between input terminals 1 and 1', a small amount of current flows through the diode 4 through the driving transistor 6, which biases the gate of the driving transistor 6 to a negative voltage. and maintains a high impedance state.

At the moment the input current between input terminals 1 and 1' is cut off,
The charge accumulated in the gate capacitance of MOSFET5 is
It is discharged to the source of the MOSFET 5 via the driving transistor 6. At this time, since no current passes through the diode 4, the gate of the driving transistor 6 is not biased to a negative voltage, and the transistor 6 is in an on state.

Therefore, this discharge operation is extremely short (several μs to tens of μs).
Complete with s).

When no input current flows between input terminals 1-1'', there is a large voltage change (d) between relay output terminals 7-7''.
v/dt) is applied, the mirror current that charges the parasitic capacitance between the drain and gate of MOSFET 5 is discharged to the source of MOSFET 5 via drive transistor 6 which is a normally-on type SIT or FET. . Therefore, there is no possibility of erroneous instantaneous ignition, and the driving transistor 6 also functions as a gate surge protection circuit.

However, in such a conventional example, a plurality of diodes 4 may be required depending on the threshold voltage of the driving transistor 6. Furthermore, considering the temperature characteristics, it is necessary to consider the forward voltage drop of the diode 4 at high temperatures, and when used at room temperature, the internal resistance of the diode 4 exhibits a considerably large value. In such a case, the turn-on time of the driving transistor 6 is delayed, and the MOSFET
This had the disadvantage that the discharge of the gate charge of ET5 was slow.

[Object of the Invention] The present invention was made to improve the above-mentioned drawbacks, and its purpose is to provide a solid state relay that enables high-speed operation of a driving transistor.

[Disclosure of the Invention] The present invention will be described below based on examples. FIG. 1 is a circuit diagram showing an embodiment of the present invention. The difference from the conventional example is that a bias circuit 10 consisting of a parallel circuit of a diode array 8 and a resistor 9 is provided between the gate and source of the driving transistor 6. Since the other configurations are the same as those of the conventional example, the explanation will be omitted by assigning the same reference numerals to the equivalent configurations.

Next, the operation of the above embodiment will be explained. Input terminal 1-1'
When an input current flows between them, the light emitting diode 2 generates an optical signal, which causes the photovoltaic diode array 3 to
This electromotive force is applied between the gate and source of the power MOSFET 5 via the bias circuit 10, and at the same time, it is applied to the normally-on static induction transistor (SIT) or the electric field. The signal flows through a driving transistor 6 which is an effect transistor (FET). Therefore, the current that charges the gate capacitance of the MOSFET 5 and the current that flows through the driving transistor 6 flow through the bias circuit 10.

Therefore, due to the forward voltage drop of the bias circuit 10,
The gate of the driving transistor 6 is biased to a negative voltage. In particular, when the current charging the gate capacitance of MOSFET 5 is large and the bias circuit 10 is composed of only resistors, this voltage becomes high and the photovoltaic diode array 3
cannot provide sufficient performance and delays the charging operation between the gate and source of the power MO5FET5 (see characteristics B, C, and D in Figure 2. Characteristic B is 100Ω,
(Characteristic C shows the case where a resistor of 300Ω is used, and Characteristic shows the case where a resistor of IMΩ is used.) However, when the bias circuit 10 is configured with a parallel circuit of a diode array 8 and a resistor 9 as in the above embodiment, the diode 8, the charging operation is not delayed (see characteristic A in FIG. 2).

When the input current is flowing steadily between the input terminals 1 and 1°, a small amount of current flows into the bias circuit 10 via the driving transistor 6, and this causes the gate of the driving transistor 6 to become a negative voltage. biased and maintains a high impedance state. However, if the transistor 6 is a SIT, the power MOSFE is
When a high voltage surge that causes dielectric breakdown of the gate of T5 is superimposed on the gate of T5, the MOSFET becomes in a low impedance state and protects the gate of MOSFET5.

Regarding only this function, it is better to use an SIT as the transistor 6 than an FET.

At the moment the input current between input terminals 1 and 1' is cut off,
The charge accumulated in the gate capacitance of MOSFET5 is
It is discharged to the source of the MOSFET 5 via the driving transistor 6. At this time, since no current flows through the bias circuit 10, the gate of the driving transistor 6 is not biased to a negative voltage, and the transistor 6 is in an on state. However, the time the bias circuit 10 is turned on varies depending on the bias circuit 10. Figure 3 shows the bias circuit 10 and MOSFET.
As is clear from the figure, which shows the relationship between ET5 and the time it takes to turn off, the time it takes to turn off with only diodes becomes slower as the number of diodes increases (
In FIG. 3, D, DX2, DX3. DX4 indicates that the number of diodes is 1, 2, 3, and 4, respectively), and if the resistor 9 is connected in parallel as in this example, the time it will be in the off state will depend on its resistance value. It depends on
faster than with only diodes (in Figure 3, 100 K II D x 4 means 100 resistors and 4 diodes;
The number of resistors and diodes is 4 (indicates 11).

When no input current flows between input terminals 1 and 1', there is a large voltage change (d) between relay output terminals 7 and 7'.
v/dt) is applied, the mirror current that charges the parasitic capacitance between the drain and gate of the MOSFET 5 is discharged to the source of the MOSFET 5 via the drive transistor 6 which is a normally-on type SIT or FET. . Therefore, there is no possibility of erroneous instantaneous ignition, and the driving transistor 6 also functions as a gate surge protection circuit.

[Effects of the Invention] As described above, the present invention improves the gate and
By configuring the bias circuit connected between the sources with a parallel circuit of a diode array and a resistor, we were able to provide a solid-state relay that can operate at high speed both on and off. Also,
There is also the advantage that there is no need to increase the number of steps in the process of the photovoltaic diode play and the driving transistor, and process consistency is extremely high.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram showing one embodiment of the present invention, Fig. 2 is a circuit diagram showing an embodiment of the present invention.
A graph showing the relationship between the ON state time (Ton) of SFET and input current (IF), Figure 3 is for MOS FET.
FIG. 4 is a graph showing the relationship between the time when the ET is in the off state (Toff) and the bias circuit, and FIG. 4 is a circuit diagram showing a conventional example. 2... Light emitting element, 3... Photovoltaic diode array, 5... MOSFET, 6... Drive transistor, 8... Diode or diode array, 9...
・Resistance, 10...bias circuit.

Claims (1)

[Claims] (1) A light emitting element that generates an optical signal in response to an input signal, a photovoltaic diode array arranged so that an electromotive force is generated by the optical signal, and a photovoltaic diode array that is arranged so that the electromotive force is applied between the gate and the source. from the first impedance state to the second impedance state.
MOSFET for power that changes to the impedance state of
A solid state relay comprising: a cathode connected to the negative electrode of the photovoltaic diode array;
a diode or a diode array whose anode is connected to the source of the MOSFET; a resistor connected in parallel with the diode or diode array; and a drain and source connected between the gate and source of the MOSFET, the gate of which is connected to the photovoltaic element. and a normally-on driving transistor connected to the negative electrode of the diode array so as to be biased by a potential difference between both ends of the resistor so as to increase the impedance between the drain and source. Features a solid state relay.