JPH04324713A - Optical coupling type relay circuit - Google Patents

Abstract

PURPOSE:To enhance noise immunity of a high speed processing circuit in the optical coupling type relay circuit in which the high speed processing circuit is connected between a drain and a gate of an output MOSFET. CONSTITUTION:A normally-on control transistor(TR) 6 is connected in parallel with a resistor 8 used to control a bipolar TR 5 connecting between a drain and a gate of an output MOSFET10 and a resistor 7 connected in series with the resistor 8 is used to drive a control TR 6. Thus, so long as a photo diode array 3 does not produce an optical current, the resistor 8 controlling the bipolar TR 5 is short-circuited to enhance noise immunity.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optically coupled relay circuit in which input and output are insulated using an optical coupling method.

0002

2. Description of the Related Art FIG. 3 is a circuit diagram of a conventional optically coupled relay circuit. In this circuit, a photodiode array 3 receives an optical signal generated by a light emitting diode 2 connected between input terminals 1a and 1b, and generates a photovoltaic force.
This photovoltaic force is passed through a resistor 8 to an output MOSFET 10.
It is applied between the gate and source of. MO for output
The source and drain of a first control transistor 4 made of a normally-on type J-FET are connected to the gate and source of the SFET 10, respectively, and the gate and source of this transistor 4 are connected to both ends of a resistor 8. It is connected. In addition, the gate of output MOSFET10
To reduce the charge accumulation time between the source and the drain
A high-speed circuit consisting of a diode 9 and a bipolar transistor 5 connected in series is connected between the gates.

The operation of the circuit shown in FIG. 3 will be explained below. When an input signal is applied to the light emitting diode 2 and a photovoltaic force is generated in the photodiode array 3, the resistor 8
A photocurrent flows through the normally-on first control transistor 4 and a voltage is generated across the resistor 8. This voltage biases the first control transistor 4 to a high resistance state, so the photoelectromotive force of the photodiode array 3 is applied between the gate and source of the output MOSFET 10, turning the output MOSFET 10 on. Become. At this time, the voltage generated across the resistor 8 causes the output M
Charge flows from the drain to the gate of the OSFET 10, significantly shortening the on-time of the output MOSFET 10.

[0004] When the input signal to the light emitting diode 2 is cut off, the photovoltaic force of the photodiode array 3 disappears,
Since the voltage across the resistor 8 disappears, the normally-on first control transistor 4 becomes short-circuited, and the bipolar transistor 5 as the second control transistor
is in an open state, so the accumulated charge between the gate and source of the output MOSFET 10 is transferred to the first control transistor 4.
The output MOSFET 10 is turned off.

[0005]

Generally, semiconductor relay circuits are required to have high switching speed. In the conventional circuit shown in FIG. 3, the output MOSFET 10
A high-speed circuit consisting of a diode 9 and a bipolar transistor 5 connected in series is connected between the drain and gate of the semiconductor relay.
The storage time of the gate-source capacitance of the OSFET 10 is shortened. However, if a signal due to noise or the like is input to the base of the bipolar transistor 5 while the output MOSFET 10 is off, the resistance of the bipolar transistor 5 decreases, causing the output MOSFET to
There was a problem in that charges flowed from the drain side of MOSFET 10 to the gate side, turning on output MOSFET 10.

The present invention has been made in view of the above points, and its purpose is to provide an output MOSFET.
The object of the present invention is to improve the noise resistance of the high-speed circuit in an optically coupled relay circuit in which the high-speed circuit is connected between the drain and gate of a T.

[0007]

[Means for Solving the Problems] In order to solve the above problems, in the optically coupled relay circuit of the present invention, as shown in FIG. A diode 2, a photodiode array 3 arranged to receive an optical signal from the light emitting diode 2, and a photovoltaic force of the photodiode array 3 applied between the gate and source to change the conduction state and non-conduction state between the drain and source. An output MOSFET 10 whose conductive state is switched, a normally-on first control transistor 4 that forms a discharge path for accumulated charge between the gate and source of the output MOSFET 10 when an optical signal disappears, and a first control transistor 4. resistors 7 and 8 that generate a voltage that biases the first control transistor 4 to a high resistance state when the photocurrent of the photodiode array 3 is passed through the control transistor 4; and the output MOSFET 1.
A second control transistor consisting of a bipolar transistor 5 connected between the drain and gate of the output MOSFET 10 is connected in series with the second control transistor so as to prevent reverse current between the drain and gate of the output MOSFET 10. a normally-on type third diode 9 connected in parallel with the resistor 8 that generates a driving voltage for the second control transistor, and biased to a high resistance state by the voltage generated in the resistor 7 by the photocurrent. It is characterized in that it consists of a control transistor 6.

[0008] As the second control transistor,
Instead of the bipolar transistor 5 in FIG. 1, a MOSFET 12 may be connected as shown in FIG.

[0009]

[Operation] In the circuit shown in Figure 1, the output MOSFET 10
A normally-on third control transistor 6 is connected in parallel with a resistor 8 that controls a bipolar transistor 5 as a second control transistor connected between the drain and gate of the transistor. Since this is done with a resistor 7 connected in series, the photodiode array 3
As long as no photocurrent is generated, both ends of the resistor 8 that controls the bipolar transistor 5 as the second control transistor are short-circuited, and noise resistance can be improved.

0010

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a circuit diagram of an embodiment of the present invention. Light emitting diode 2 is connected between input terminals 1a and 1b. The light emitting diode 2 is optically coupled to a photodiode array 3. The positive electrode of the photodiode array 3 is connected to the output MOSFET 1 through a series circuit of resistors 7 and 8.
0 and the negative electrode is connected to the source of the output MOSFET 10, respectively. The gate of the output MOSFET 10 is connected to the drain of a normally-on first control transistor 4 made of a depletion mode J-FET, and the source of the first control transistor 4 is connected to the source of the output MOSFET 10. The gate of the first control transistor 4 is connected to the photodiode array 3.
connected to the positive terminal of the The drain of the output MOSFET 10 is connected to the output terminal 11a, and the source is connected to the output terminal 11b. Further, the anode of a diode 9 is connected to the drain of the output MOSFET 10, and the collector of a bipolar transistor 5 as a second control transistor is connected to the cathode of the diode 9. The emitter of the bipolar transistor 5 is an output MOS
The gate of FET 10 and the base of bipolar transistor 5 are connected to the connection point of resistors 7 and 8. Further, the source of a normally-on third control transistor 6 is connected to the emitter of the bipolar transistor 5, and the drain of the third control transistor 6 is connected to the base of the bipolar transistor 5. The gate of the third control transistor 6 is connected to the photodiode array 3.
connected to the positive terminal of the

The operation of this embodiment will be explained below. When an input signal is applied between the input terminals 1a and 1b, the light emitting diode 2 generates an optical signal, and the photodiode array 3 receives this optical signal and generates a photovoltaic force. A normally-on third control transistor 6 connected in parallel to the resistors 7 and 8 and the resistor 8 by this photovoltaic force;
and a normally-on first control transistor 4
A photocurrent flows through the This photocurrent causes resistance 7 to
A voltage is created across the normally
The on-type third control transistor 6 reaches an open state. When the third control transistor 6 becomes open, a voltage is generated across the resistor 8, and the voltage generated between the resistors 7 and 8 causes the normally-on type first control transistor 4 to be generated. is biased to a high resistance state, so
The photovoltaic force of the photodiode array 3 is applied between the gate and source of the output MOSFET 10. On the other hand, the bipolar transistor 5 as the second control transistor is short-circuited due to the voltage generated across the resistor 8, and charges flow from the drain side to the gate side of the output MOSFET 10, causing photoactivation from the photodiode array 3. The gate-source capacitance of the output MOSFET 10 is rapidly charged together with the electric power, and the output MOSFET 10
reaches the on state.

When the input signal between the input terminals 1a and 1b is cut off, the photovoltaic force between the terminals of the photodiode array 3 disappears. As a result, there is no potential difference between the resistors 7 and 8, the first control transistor 4 is in a short-circuited state, the third control transistor 6 is in a short-circuited state, and the bipolar transistor 5 as the second control transistor is opened. state. As a result, the output MOSFET 10 is connected to the output MOSFET 10 via the short-circuited first control transistor 4.
The charge between the gate and source of is discharged, and the semiconductor relay is turned off.

FIG. 2 is a circuit diagram of another embodiment of the present invention. In this embodiment, a MOSFET 12 is used in place of the bipolar transistor 5 used as the second control transistor in the circuit shown in FIG. 1, and the operating principle is the same as that of the circuit shown in FIG. It is.

[0014]

Effects of the Invention In the present invention, in an optically coupled relay circuit, an impedance element is connected in parallel with an impedance element that generates a voltage to control a second control transistor connected between the drain and gate of an output MOSFET. Since the normally-on type third control transistor is connected, the second control transistor will not be driven unless the photodiode array for driving the output MOSFET generates a photocurrent, and the output MOSFET will not be driven due to noise or the like. This has the effect of preventing charge from flowing from the drain side to the gate side, thereby improving the noise resistance of the relay.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of an embodiment of the present invention.

FIG. 2 is a circuit diagram of another embodiment of the present invention.

FIG. 3 is a circuit diagram of a conventional example.

[Explanation of symbols]

1a, 1b Input terminal 2 Light emitting diode 3 Photodiode array 4
First control transistor 5 Second control transistor (bipolar transistor) 6 Third control transistor 7
Resistor 8 Resistor 9 Diode 10 Output MOSFET 11a Output terminal 11b Output terminal

Claims (2)

[Claims] 1. A light emitting diode that generates an optical signal in response to an input signal, a photodiode array arranged to receive the optical signal of the light emitting diode, and a photovoltaic force of the photodiode array between a gate and a source. The output MOSFET switches between a conducting state and a non-conducting state between the drain and source when an optical signal is applied to the output MOSFET, and a normally-on type MOSFET that forms a discharge path for the accumulated charge between the gate and source of the output MOSFET when the optical signal disappears. a first control transistor; an impedance element that generates a voltage that biases the first control transistor to a high resistance state when the photocurrent of the photodiode array is energized through the first control transistor; and an output impedance element; A second control transistor made of a bipolar transistor connected between the drain and gate of the MOSFET, and connected in series with the second control transistor so as to prevent reverse current between the drain and gate of the output MOSFET. a normally connected diode in parallel with a portion of the impedance element that generates the driving voltage for the second control transistor and biased to a high resistance state by a voltage generated in another portion of the impedance element by the photocurrent; On-type third
An optically coupled relay circuit characterized by comprising a control transistor and a control transistor. 2. The optically coupled relay circuit according to claim 1, wherein the second control transistor is an enhancement mode MOSFET instead of a bipolar transistor.