JPS63236359A - Semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a device structure suitable to form a collector layer into a thin film and effective for reducing the sheet resistivity of a base by a method wherein the base layer of a two-dimensional electron gas heterojunction bipolar transistor (2DEG-HBT) is formed in a three-layer structure with two-dimensional electron gas (2DEG). CONSTITUTION:For example, a P<+> GaAs layer 41 (collector layer) containing Be of 1X10<19>cm<-3>, an undoped GaAs collector layer 42, an N-type AlxGa1-xAs (x-0.3) layer 43' containing Si of 3X10<18>cm<-3>, an undoped GaAs layer 42, an N-type AlGaAs layer 43 containing Si of 3X10<18>cm<-3>, a P-type AlGaAs layer 45 containing Be of 1X19<19>cm<-3> and a P-type GaAs layer 45' are respectively formed on a semi-insulative GaAs substrate 40 in 4000 Angstrom , 700 Angstrom , 60 Angstrom , 100 Angstrom , 200 Angstrom , 1500 Angstrom and 2000 Angstrom using an MBE (molecular beam epitaxy) method. Then, an emitter region, a base region and an interelement isolation are formed by mesa etching and a metal emitter electrode 25, a metal base electrode 24 and a metal collector electrode 26 are each formed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a bipolar transistor using a two-dimensional carrier as a base layer, and particularly relates to a bipolar transistor using a two-dimensional carrier as a base layer.
The present invention relates to a two-dimensional electron gas heterojunction bipolar transistor suitable for improving collector breakdown voltage or improving cutoff frequency fT.

[Conventional technology]

HBT with a new structure (generally referred to as 20EG-HBT) uses a two-dimensional carrier formed at the heterojunction interface between gallium arsenide (GaAs) and aluminum gallium arsenide (A )
(Japanese Patent Application No. 60-164126, Japanese Patent Application No. 164128-1982, Japanese Patent Application No. 61-4024)
No. 4). In addition, these applications
In No. 9, a junction type gate structure (the same published patent publication No. 5,
In Figure 6, the gate 13 is p-type AQ GaAs or G
It can also be said that it is a bipolar transistor based on a new principle using the unique action of the case (corresponding to the case of a A s).

The transistors described in the above patent applications are collectively referred to as 2DEG-HBT.

The present invention relates to an improvement of the 2DEG-HBT in terms of a structure that allows the base resistance rbb' of the 2DEG-HBT to be approximately 173 times higher than that of the conventional 2DEG-HBT, and provides a higher withstand voltage between the base and collector or a higher cutoff frequency.

[Problem that the invention seeks to solve]

In the structure of the above patent application, G a A s/Al2
When GaAs, a two-dimensional electron gas at a heterointerface, is used as the base, the base-collector transit time t2 is a coefficient, WB is the base film thickness, Xv is the collector film thickness, and v and g are the hole saturation speeds. The first term on the right side is the transit time of the two-dimensional electron layer, which is about 0.05 psec, and the second term is about 1.50 psec when there are 3000 p-QaAs collector layers.

That is, the tdl of the conventional 2DEG-HBT is almost entirely dominated by the transit time of the p-type GaAs collector layer.

When trying to further reduce t,i, p-type GaA
The most effective method is to make the collector layer thinner (xv→smaller), but in the case of the conventional 20EG-HBT, the thickness of 1500~20
00 people is the lower limit.

In addition, in the case of conventional 2DEG-HBT, a single 2DEC is used, so the base sheet resistance ρB at room temperature is IKΩ.
/ About a mouthful.

An object of the present invention is to provide a device structure suitable for thinning the collector layer and effective for reducing base sheet resistance.

[Means for solving problems]

That is, the above purpose is to form three 2DEGs to (1) make the base sheet resistance 330Ω/gate (at room temperature) and (2) make the p-type collector layer thinner with about 700 people. It becomes possible.

Furthermore, by replacing the p-type collector layer with a material having a wide forbidden band, such as p-type AΩGaAs, the p-type collector layer can be made thinner by about 500 people.

FIGS. 1(a), (b), (c), and (d) each show a device cross-sectional structure of the 2DEG-HBT of the present invention (FIG. 1(a)).
and the corresponding energy band diagram (Fig. 1 (b), (Q)
, (d)').

40 is a semi-insulating GaAs substrate, 41 is p÷ type GaAs,
42' is undoped aaAs (p-collector layer) 43
' is an n-type AQ GaAs layer (doping 3X101'
Country-3 film thickness about 60 people) 42 is undoped G a A
s, 100 people, 43 are n-type AjlGaAs.

45 is p-type A 12 xGaz-, As (0≦, X≦
1) 24 is a base electrode metal, 25 is an emitter electrode metal, 26 is a collector electrode metal, and 59 is a two-dimensional electron gas.

In particular, since the 20EG formed in the undoped GaAs 42 is supplied with carriers from both 43 and 43', the 2DEG sheet resistance (14Ω/hole) is about half of the normal value (~500Ω/hole).

Also, the 2DEG formed on the 42' side is the n-type A of 43'.
Q It is formed from a GaAs layer. 2DEG like this
When the base layer is made into three layers, the base sheet resistance becomes about 1/3 that of the conventional one, but the base film thickness is about 260 Pa compared to the conventional W.
a (= 100 people) 2.6p see to Q, 33
8 psec, which is about 6 times larger.

In addition, in order to improve the base-collector breakdown voltage, the method shown in Figure 1 (
As shown in c), the p-G a As layer 42' has a thickness of 10
The number of people should be around 0 to 200, and the other p- collector layer should be p-
It is further improved by replacing it with type AQ xGax-xAs50. In addition, in this case, the AQ composition ratio X is graded
It is also possible to do as shown in FIG. 1(d). That is, the AQ composition ratio X on the 2DEG side is increased (0,2 to 0.
45), reduce X on the p-type collector layer 41 side (~o
, 0).

[Effect]

In this way, by making the base layer a three-layer structure of 2DEG.

(1) The base can have a resistance of about 173.

(2) The p-type collector layer can be made thinner (up to 700 layers).

Furthermore, the p-type collector layer is made of p-type AQGaA as described above.
By replacing it with sM, the pace-collector avalanche breakdown voltage can be increased, and as a result, (3) the p-type collector layer can be made even thinner (up to 500 layers).

It is possible to reduce p See to 0.25 pssc, about 1/6, and even if we take into account the effect that the base layer is about 2.6 times thicker, td1 during base running is 0.58111.
p see, which is about 1/3 that of the conventional 2DEG-HBT.

That is, the present invention can increase (1) the base resistance by about 1/3, and (2) increase the intrinsic cutoff frequency ft+ by about 3 times compared to the conventional 2DEG-HBT. It is possible to increase the speed by about 6 times.

〔Example〕

The present invention will be explained in more detail below through examples.

Example 1 FIG. 1(a) shows an example of a prototype pnp type 2DEG-HBT using a GaAs/AQ GaAS heterojunction.

MBE (Molecular Beam Epitaxy) is applied on the semi-insulating GaAs substrate 4o.
4000 layers of p+GaA 541 (collector layer) containing Be IXIO19am-δ and 700 layers of undoped GaAs collector layer 42' using the xy) method.
Human, n-type A jl containing 3XIO18am-8 Si
xGaz-xAs (x ~0.3)43' to 60
100 people, undoped Ga As 42, Si
n-type AQ Ga containing 3 x 1018 cm-”
200 people of As43, I x 101gcm-3 of Be
Containing p-type AQGaAs45 and p-type G
2000 people formed a A s 45'.

Next, an emitter region, a base region, and isolation between elements were formed by mesa etching, and an emitter electrode metal 25, a base electrode metal 24, and a collector electrode metal 26 were formed, respectively.

The emitter layer p-type AΩGaAs 45 may be omitted depending on the purpose, that is, it may be p-type GaAs, and the doping level is usually selected in the range of lx10''7 to 10zO2-8 depending on the purpose.

Further, the isolation between elements may be performed by ion implantation such as 02 instead of the mesa etching method.

As shown in FIG. 1 (Q) and (d), undoped Ga
A s 42' is undoped G a A s 42
'100 people, p-type 1014-IQiIIcn-8)
A Q xGax-xAm50 You may replace it with 400 people, etc. Further, the p-type collector layer may be embedded in the substrate.

Example 2 2DEG-HBT and 2DE are shown in Fig. 2 (a), (b), and (e).
An example in which G-FETs are formed on the same substrate is shown.

The epitaxial structure obtained by MBE is the same as in Example 1.

3 layers of 2 D E G It F E T (Fiel
When used in the active layer of dEffatTransistor, the source/drain electrodes 20 and 21 are
The junction type gate electrode metal 22 is formed using AuGe/Ni/Au on As45.
/ A u (Fig. 2(a)), FET
An external control potential terminal is often attached to the p-type GaAs layer 41 below the FET, where the portion is denoted by A and the HBT portion is denoted by B.

When you want to have a Schottky gate structure in the FET part,
As a Schottky gate metal, Ti/Pt/
Metals such as A ur A Qt W S x and W A n are formed on the n-type A Q GaAs 45 (FIG. 2(b)).

In the FET portion, as shown in FIG. 2(Q), the gate metal portion may be formed in undoped GaAs 42 by removing n-type AOGaAs 43 by etching. Alternatively, one may choose to form it on n-type AQGaAs 43' using dry etching of a CCQ 2Fx/He gas mixture.

The doping level of p-type AQ GaAs 45 is often in the range of 1017 to 10'' (1 m''''3) depending on the purpose.

In the above embodiments, the case of a GaAs/AQGaAs heterojunction system was explained, but other binary/ternary heterojunctions, such as GaAs/Ge
.

AuGaAg/Ge, InAAAs/InGaAs
.

A two-dimensional carrier is also formed in a heterojunction such as InGaAgP/InP, and a conventional base layer can be replaced with a three-dimensional carrier as in the present invention.
It is possible to create a JB with a similar effect by using a layered structure.

Furthermore, instead of 20EG, two-dimensional hole gas (Two D
annual Hole Gas; T D
A similar invention can be achieved using HG). For example, in Example 1, p-type and p-type may be replaced. That is, an npn type two-dimensional hole HBT can be realized even if Si and Bθ used as impurities are replaced in many embodiments.

Further, the threshold voltage V t v of the FET portion is determined by adjusting the film thickness and doping level of the lower portion of the gate metal, that is, by adjusting the film thickness by, for example, etching, as in the conventional FET.

〔Effect of the invention〕

According to the present invention, by forming the base layer in a three-layer structure using 2DEG, (1) the base sheet resistance can be reduced to about 1/3 of that of the conventional structure.

(2) The p-collector layer can be made thinner by about 700 people.

(3) By replacing the p-type collector layer with P-type A 12 GaAs (a material with a wider energy gap than the p-type collector layer), the p-type collector layer can be expanded to about 500 base layers.・The film can be made thinner without reducing the withstand voltage between the collectors, and the 1ntr is about three times that of conventional npn-type HBTs.
insic fT can be realized.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional structure diagram and an energy band diagram of a transistor for explaining the present invention. Figure 2 shows pnp type 2DEG-HBT and 2DEG-FET.
FIG. 3 is a cross-sectional structural diagram when the two are formed in the same substrate. 50-p-AQGaAs, 50'-graded
p-AQGaAs. 45-p-A Q GaAs, 45'-p+GaA
s, 43°43' -n -AD, GaAs, 4
2.42'...Undoped G a As, 41-
p + Ga As, 4.0-...Semi-insulating Ga
A s substrate, 25... Emitter electrode metal, 24.
...Base electrode metal, 26...Collector electrode metal, 22...Junction type gate electrode metal, 22'...Schottky gate metal, 20.21...Source and drain electrode metal. Figure 1 Figure 1 Figure 12 Picture Bud 2

Claims (1)

[Claims] 1. A heterojunction between a semiconductor layer I with a wide energy bandgap and a semiconductor layer II with a narrow energy gap is arranged in the form I -II- I -II, and the secondary carriers at the three heterojunction interfaces created by this are used as a base region. A semiconductor device having a bipolar transistor, characterized in that: