JPS6323616B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an apparatus for vacuum processing a semiconductor wafer, and particularly to a cooling means for the semiconductor wafer.

In processing semiconductor wafers, such as processing to make integrated circuits, it is sometimes necessary to expose the wafer to high temperatures. Such high temperatures are desirable for diffusion of impurities, growth of epitaxial layers, annealing of metal-semiconductor contacts, etc. However, at many points during processing, it is undesirable to expose the wafer to high temperatures because unnecessary diffusion beyond specified limits and segregation of impurities at epitaxial interfaces are undesirable. The intermediate photoresist layer is also affected at these high temperatures.
This problem becomes a major problem in the manufacture of very large scale integrated circuits (VLSI), where many processing steps must be used sequentially, especially near the end of the processing chain. This poses a major problem because impurities, conductive layers, and insulating layers are disposed therein, and it is undesirable to disturb these physical features by heat treatment.
It is therefore desirable to expose the semiconductor wafer to high temperatures only when a processing step actively requires high temperatures, and to otherwise be able to cool the semiconductor wafer to prevent high temperatures.

For example, ion implantation has become a standard technique for introducing impurities into semiconductor wafers. For example, "Ion..." by PDT Townsend et al.
Ion Implantation, Sputtering and their applications
262-263 (1976). Impurities are introduced into the volume of the semiconductor wafer using the momentum of the accelerated ions as a means of embedding them within the crystal lattice of the semiconductor material. The kinetic energy of the colliding ions determines the depth of penetration. The depth of penetration is usually selected to provide a suitable depth at which impurities are permanently fixed. However, thermal diffusion may optionally be used in conjunction with ion implantation, such as in low-energy predeposition machines, where the subsequent thermal diffusion has a known time-temperature characteristic. This is a special processing step.

As the accelerated ions strike the semiconductor wafer and travel into its volume, heat is generated by the atomic bombardment. This heat becomes significant as the energy level is increased. It may also be desirable for economic reasons in commercial applications to have high material throughput, so that ion fluxes as high as possible are used without causing physical damage to the structure of the semiconductor material of the wafer. Ru. In this way a large amount of heat is generated. As noted above, this heat is undesirable.

Previous attempts to cool semiconductor wafers undergoing ion implantation include intermittent exposure by scanning either the ion beam or the wafer, or both. limiting material throughput), providing an actively cooled metal plate coated with grease or oil on which the semiconductor wafer rests; (Ion Milling for Semiconductor Manufacturing Processes, by L.D. Bollinger).
Solid State Production Processes)
Technology (Solid State Tecknology) 1977
Please refer to the November issue]. It has been found that these conventional techniques and devices are not completely effective when faced with high ion fluxes or high energy levels.

SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide an apparatus for effectively cooling a semiconductor wafer undergoing vacuum processing.

Another object of the present invention is to provide an apparatus for mechanically pressing a semiconductor wafer against a thermally conductive flexible material deposited on a convex curved platen to provide rapid dissipation of thermal energy. That's true.

Yet another object of the present invention is to provide an apparatus for cooling a semiconductor wafer, which provides good heat transfer without being affected by any surface irregularities of the semiconductor wafer.

An apparatus for actively cooling a semiconductor wafer during vacuum processing in a vacuum processing chamber, such as an ion implantation chamber or an etching chamber, is used in a vacuum processing chamber such as an ion implantation chamber or an etching chamber. A convex platen is provided. More specifically, the housing incorporates a convex curved platen having a coating of a flexible, thermally conductive material deposited on its surface and in slidable relationship with the convex curved platen. a pressing ring mounted within the housing;
Movement of the push ring causes the push ring and the convex curved platen to form a slot for receiving the semiconductor wafer, and the push ring contacts the semiconductor wafer with its circumferential edge to secure the semiconductor wafer. a pressing ring between a fixed position where the ring is firmly pressed against the convex curved platen;
Equipped with. In the fixed position, the wafer conforms to the contour of the convex curved platen on its rear side. An active cooling mechanism is provided to transfer thermal energy away from the platen.

Ion bombardment at high energy levels or high ion flux densities begins to generate heat,
It was found that active cooling was required. As mentioned earlier, the need for cooling is compounded by the need to protect the photoresist from decomposition;
It arose from a desire to avoid unnecessary proliferation.
Such active cooling is only possible if contact with good heat transfer properties is made to the back side of the wafer, and the front side of the wafer is necessarily exposed to the impinging ion beam or etching. There is no adequate heat transfer from the periphery of the wafer. Due to surface irregularities, sometimes called "bowing", that exist on semiconductor surfaces,
It has been recognized that it is difficult to obtain planar contacts with good heat transfer properties. The bow or surface depression can be as deep as 5/1000ths of an inch (25.4 mm). As a result, the rigid plate-like contact member contacts only the peripheral portion of the arcuate region, and heat transfer occurs only by radiation and convection rather than conduction. Even with flexible contact materials, it has been found that it is most difficult for the plate-like features to contact the entire contour of the arcuate region in perfect alignment.

The apparatus of the invention places the wafer on a convex curved platen coated with a flexible thermally conductive layer or body, and then mechanically holds the wafer at its outer edge between a pressure ring and the platen. By pressing, contact with the back side of the semiconductor wafer is achieved with good heat transfer properties. Semiconductor wafers are thin, on the order of 200 microns to 400 microns thick, and can be bent to their elastic limits. Therefore, the semiconductor wafer is curved to have the same shape as the curved platen. The radius of curvature of the platen is chosen to be small enough to smooth out the bowing that occurs naturally by creating tension in the wafer, and this results in a smooth profile. Allows perfectly consistent contact between flexible materials. The radius of curvature is also selected to be sufficiently large that the angle of incidence of the impinging ion beam does not deviate from normal incidence by more than a specified amount, typically 2 1/2 degrees. There is. For a 3 inch (76.2 mm) wafer, 15/1000 of an inch (25.4 mm) from center to edge
A deformation resulting in a deviation of 0.381 mm was found to yield a satisfactory curvature.

The use of a flexible thermally conductive coating on the platen is desirable to accommodate any bowing still remaining in the wafer when it is under tension. For example, the wafer may be shaped to some degree so that the forces applied to each adjacent region of the wafer vary gradually rather than abruptly, reducing the possibility of exceeding elastic limits at the boundaries between such adjacent regions. It is best to apply different forces to different parts of the wafer depending on the matching surfaces of the wafer. The thickness of the coating should be thick enough to provide a cushioning effect, but not so thick that it becomes a significant barrier to heat transfer. Emerson & Cumming, Inc.
When using a thermally conductive silicone rubber such as Eccosil 4952 (registered trademark) sold by Eccosil, the optimal thickness is 9/1000ths of an inch (25.4 mm) or 0.229 mm. It was determined that The material is applied by standard techniques as disclosed by the vendor.

The entire operating sequence is shown in Figure 1A, Figure 1B, and Figure 1.
This can be understood by referring to Figure C. These figures illustrate a wafer cooling system 10 installed inside an ion implantation chamber. In the unfixed position, the wafer cooling device 10 cools the incoming semiconductor wafer 1 as shown in FIG. 1A.
3 and its wafer 13
is typically introduced into slot 11 by gravity. Apparatus 10 is rotated as indicated by the arrow by support rod 12 to a position perpendicular to the input path of the working ion beam, typically the vertical position of FIG. 1B. Ru. During the positioning process, the second
Wafer 1
3 is fixed in position by a force ring and bent under tension towards the convex curved platen. The wafer is then actively cooled during implantation or etching. After the implantation or the like is completed, the wafer cooler 10 is rotated as indicated by the arrow by the support rod 12 to the position shown in FIG. It is possible to eject the liquid by means of an ejection pin mechanism such as the above.
When the apparatus 10 is rotated to the ejection position, the push ring and platen are disengaged and the wafer 13 is free to slide out of the slot 11.

The mechanical feature of this wafer cooling device is the third
This is illustrated in detail in the cross-sectional view of FIG. 2, taken along line 2--2, and in FIGS. 3 and 4. Housing member 40 is bored to accommodate movable rod 34. Movable rod 3
4 is attached between the bottom plate 35 and the pressing ring 36. The spring 27 is the housing 40
It is held in a compressed state between the bottom surface of and the bottom plate 35. Bottom plate 35 relative to housing 40
The movement of the linear bearing 38 shown in FIG.
This is done using Cam 26, one of the two cams mounted on bottom plate 35 (both cams shown in FIG. 4), is at the high point of its stroke when push ring 36 is in the receiving or ejecting position. In these positions the pressure ring 36 is lifted above the slot 11 so that the wafer held therein is released. At the low point of the stroke of the cam 26, the spring 27 is expanded and the pressure ring 3
6, the wafer 3 placed in the slot 11
2 to its fixed position where it presses against the circumferential edge. In this position, the wafer 32
The rear side is a flexible thermally conductive material coating or material body 31 applied to the surface of the convex curved platen 30.
becomes substantially isomorphic.

Active cooling of device 10 is achieved by flowing liquid Freon 29 into a liquid reservoir defined by internal cavity 28 inside housing 40 .
Freon is supplied through an inlet 39 inside the support rod 12 and flows into the liquid reservoir 28 through a channel 41 inside the housing 40. A coaxial outlet (not shown), also within support rod 12, provides an exit path for freon from the device. The temperature and flow rate of the liquid Freon can be varied to control the temperature of the wafer. As a typical value, it is desirable to maintain the surface temperature of the wafer 32 below 140°C.

As seen in the dotted line depiction in FIG. 2 and the front view in FIG.
Set the internal orbit of . The terminal bumper 42 is
Before pressing, determine the final stopping position for the wafer. These bumpers are constructed of a silicone rubber compound so that the wafers are not damaged during insertion.

As previously discussed with respect to FIGS. 1A-1C, loading wafers into and ejecting wafers from the wafer cooling system 10 includes:
It seems to be caused by the action of gravity. To avoid friction between the semiconductor wafer and the flexible thermally conductive surface 31, a pair of low-friction guide rails are used during loading and unloading of the wafer, these guide rails being constructed of metal or low-friction plastic. has been done. As seen in FIG. 2, the guide rail 33 holds the wafer above the flexible thermally conductive coating 31 until the wafer is fixed in position. Since the guide rails 33 are attached to the movable rods 34, they move up and down with the movement of the movable rods, so that when the pressure ring 36 is in the fixed position, it is below the surface of the flexible thermally conductive coating 31. It then enters a recess formed in the thermally conductive coating 31 and the convex curved platen itself. At times, the wafer does not slide smoothly along the guide rail 33 and may take longer than necessary to slide out of the assembly. In that case, the ejection pin 22 pushes the wafer along the guide rail 33 and out of the slot 11. Ejection pin 2
2, the vehicle 2 is moved between the stop member 44 and the stop member 45.
It is attached to a movable assembly 19 that moves using 0. The trajectory within which the movable assembly 19 moves is shielded from the ion beam by a shield 23.

As previously discussed with respect to FIGS. 1A-1C, wafer cooler 10 is held in a vertical position during vacuum processing, so that movable assembly 19 is held against stop member 45 by gravity. . When the wafer cooler 10 is rotated to the ejection position, the slidable assembly 19 with ejection pin 22 is moved along its trajectory until the stop member 44 ensures that the wafer is actually ejected. Move along. Normally, the wafer is evacuated by itself due to the action of gravity. Movement of the cam 26 is actuated when the arm 46 is pressed against a protruding member (not shown) mounted inside the vacuum processing chamber in which the apparatus 10 is mounted. While the device 10 is rotated by the support rod 12, the arm 46 engages the protruding member and forces the cam 26 between its high and low points. Thus, in the vacuum processing position of FIG. 1B, cam 26 is in its lower position and biasing ring 36 is biased against the wafer. In the receiving position of FIG. 1A and the ejecting position of FIG. 1C, the cam 26 is in its elevated position and the slots 11 are spaced apart. The ease of movement of cam 26 is determined by the setting of a brake clutch 47 shown in FIG.
Control the rotation speed of 6. As a result, the force exerted by spring 27 will not cause compression ring 36 to crush the semiconductor wafer in place within wafer cooling apparatus 10.

The advantages of the wafer cooling assembly used in the present invention can be seen with reference to FIGS. 5 and 6. FIG. 5 shows the relationship between temperature and ion beam power for ion implantation for standard platen A (an uncooled metal surface resting under its own weight) and for the present invention. It is illustrated in comparison with platen B of . The temperature shown in this graph is the equilibrium temperature for a 3 inch (76.2 mm) wafer. FIG. 6 shows the temperature rise of a cooled 3 inch (76.2 mm) wafer as a function of time for three different ion beam powers. Approximate equilibrium temperature is reached after about 10 seconds. As a typical numerical example, wafers are ion implanted for times ranging from 5 seconds to about 15 seconds, and the typical allowable temperature is 140°C, so ion implantation of semiconductor wafers is Acceptable temperature rise characteristics are obtained in the plantation.

[Brief explanation of the drawing]

FIG. 1A is a side view of the platen portion of the present invention in position to receive a semiconductor wafer by gravity feeding, and FIG. 1B is a side view of the platen portion of the present invention in position to expose the semiconductor wafer to a normal incident ion beam. FIG. 1C is a side view of the ion-implanted semiconductor wafer rotated to a position where it is ejected by gravity or by an ejection pin mechanism; FIG. 2 is a side view taken along line 2-- of FIG.
FIG. 3 is a front view of the platen portion of the present invention, FIG. 4 is a rear view, and FIG. 5 is a side sectional view taken along line 2, FIG. Figure 6 shows the temperature rise for a 3 inch (76.2 mm) wafer undergoing ion implantation while being held in the present platen. It is a graph of time. DESCRIPTION OF SYMBOLS 10... Wafer cooling device, 11... Slot, 12... Support rod, 13, 32... Wafer, 22... Ejection pin, 26... Cam, 27...
... Spring, 28 ... Cavity, 29 ... Liquid freon, 30 ... Convex curved platen, 34 ... Movable rod, 36 ... Pressing ring, 38 ... Linear bearing, 40 ... Housing.

Claims (1)

[Scope of Claims] 1. An apparatus for performing vacuum processing on a semiconductor wafer, wherein a thermally conductive flexible material is provided on the outer surface of a convex curved platen, and the semiconductor wafer is placed on the material. A vacuum processing apparatus for semiconductor wafers, characterized in that semiconductor wafers are placed in close contact with each other. 2. A vacuum processing apparatus for semiconductor wafers according to claim 1, wherein the thermally conductive flexible material is a thermally conductive silicone rubber. 3. A vacuum processing apparatus for semiconductor wafers according to claim 1, characterized in that a circumferential edge of the semiconductor wafer is pressed against the material body by a ring. 4. The vacuum processing apparatus for semiconductor wafers according to claim 3, wherein the curvature of the platen smooths out the naturally occurring arched curvature due to the generation of tension in the closely attached wafers. The value is chosen to be large enough for the device. 5. The semiconductor wafer vacuum processing apparatus according to claim 4, wherein the curvature of the platen is such that the incident angle of the colliding beam is 2 from normal incidence.
The value of this device is chosen to be small enough to prevent deviations of more than 1/2 degree. 6. The vacuum processing apparatus for semiconductor wafers according to claim 4, wherein the curvature is between the center and the edge of a 3-inch wafer.
A device selected to produce a deviation of 15 thousandths of an inch.