JPS6323487B2 - - Google Patents

Description

[Detailed Description of the Invention] (a) Description of the Technical Field A device such as a frequency analyzer that converts changes in physical quantities into changes in electrical quantities such as voltage and current, stores or records this, and performs analysis, etc. In some devices, a method is used in which an analog quantity is first converted into a digital quantity and then stored as a digital quantity.

The present invention relates to an analog quantity storage device that continuously stores situations in which analog quantities change as digital quantities.

(b) Description of Prior Art A case will be described in which a semiconductor memory is used as a method for digitally storing analog quantities.

FIG. 1 shows a simple block diagram of a conventional analog quantity storage device. When storing, the analog quantity is converted into a digital quantity by the analog-digital converter 1,
This is written into the read/write memory 4 by designating a write address by a counter 5 which sequentially increases the binary amount outputted by a clock pulse of a constant frequency. When reproducing a memory, a read command is issued by the operation circuit 8, a read control signal is given via the control circuit 6, a read address is specified by the counter 5, and the stored contents are sequentially read from the read/write memory 4. is read out and output to the digital-to-analog converter 3, thereby changing it into an analog quantity for storage and reproduction. When reading, as shown in FIG. 1, the output of the analog-to-digital converter 1 is connected to the external circuit by the interface circuit 2 so that the output of the read/write memory 4 is input to the digital-to-analog converter 3. I try not to affect it. The oscillation circuit 7 is a clock pulse generator for generating various control signals.

In the conventional analog quantity storage device described above, the step speed of the address when writing is constant, so when the analog quantity changes rapidly, there are fewer addresses for a certain analog variation, and therefore the number of analog quantities to be stored is The resolution of quantities increases, making it impossible to store highly accurate analog quantities. Therefore, when using such a storage device, it has been common practice to increase the address increment speed more than necessary in order to obtain the necessary resolution. An example of analog quantity change in Fig. 2, that is, interval T ₁ ,
As shown in T ₂ and T ₃ , when there is a mixture of sudden and gradual changes, the address increment speed is set to match the sudden changes, so it is adjusted even when the changes are gradual. , has the disadvantage of using addresses at a similar rate.

(c) Object of the Invention An object of the present invention is to provide an analog quantity storage device that improves the storage element address increment method during storage, in order to eliminate the disadvantages of the prior art.

(d) Structure of the invention FIG. 3 shows a block diagram of the analog quantity storage device of the invention.

First, an analog comparator 18, an up/down counter 10, a digital-to-analog converter 15
These circuits convert analog quantities into digital quantities during storage, and convert the analog quantity input from the ANALOG/IN terminal by the analog comparator 18 to the digital output of the up-down counter 10 to the digital-to-analog converter. 15, the gate circuit 9 is turned on and off depending on whether the amount is large or small, and the clock pulse of the oscillation circuit 11 is inputted to the up or down input of the up/down counter 10. Since this is a negative feedback circuit so that the input from the ANALOG IN terminal and the input from the digital-to-analog converter 15 are equal, these two analog quantities eventually match. In this way, the digital output of the up-down counter 10 is
This is a digital conversion of the analog input from the ANALOG IN terminal, achieving the purpose of analog-to-digital conversion. In addition, this part also has an analog conversion function for the digital storage contents during playback, since the gate circuit 12 switches the readout contents of the read/write memory 29 to the input of the digital-to-analog converter 15 when playing back the storage contents. It will become.

Next, the circuits such as the J-K flip-flop 17 and the digital subtraction circuit 19 are parts that monitor the change state of the analog quantity that changes every moment during storage, and the circuits such as the J-K flip-flop 17 and the digital subtraction circuit 19 are parts that monitor the change status of the analog quantity that changes every moment. The amount is temporarily stored by a JK flip-flop 17, and this temporarily held amount and the digital amount are combined into a digital subtraction circuit 19.
When there is a difference in a certain digital quantity unit between the two, it is constantly compared, and when this is detected, a write command is given to the read/write memory 29, and an increment clock is provided to the counter 30 for incrementing the address. have Since the contents temporarily stored in the JK flip-flop are updated every time these operations are performed, it is possible to constantly monitor changes in analog quantities in fixed units.

The circuits such as the up-down counter 41 have a function of measuring the time required for the operation of each cycle of the part that monitors the change in the previous analog quantity in a fixed unit. This is reset every time a certain unit of change in the analog quantity occurs, and since a clock pulse of a certain period in the up direction is normally input, the counter output just before being reset is the time taken for one cycle. This is stored in the read/write memory 29 together with the digital conversion value of the analog quantity. Also, when reproducing the memory, this amount is preset in the up-down counter 41,
Thereafter, it is counted by a clock pulse in the down direction at a constant period, and when the output reaches 0, it plays the role of incrementing the address increment counter 30. That is, it has the role of correctly reproducing the address step time required during storage.

Next, circuits such as the read/write memory 29 and the counter 30 serve as the main circuits for storage and reproduction, and they receive write commands from the read/write switching circuit 26 and the analog amount change monitoring section, and the up/down counter 41.
This is the part that performs address increment, write, and read operations in response to read commands, etc. from the CPU.

Next, the trigger adjustment circuit 22, analog comparator 23, flip-flop 24, and other circuits are used to automatically operate and stop the analog quantity storage device. When the analog input becomes larger than this, the analog comparator 23 detects this, operates the flip-flop, sets the output terminal Q to "O", enables the analog step counter 30 to step, and creates a start condition.

FIG. 4 shows a block diagram showing a modification of the present invention. In this modification, instead of storing a digital conversion value of an analog quantity in the read/write memory 58, a difference value, which is one of the answers of the subtraction results of the digital subtraction circuit 53, which detects when a certain change in analog quantity occurs, is used. Only the polarity code is stored, and during storage and reproduction, the up-down counter 46 is turned up or down in accordance with this polarity. Performs reproduction of digital conversion value. Since this method requires only the initial value of the digital conversion value, it is stored in a separately provided memory circuit 75, and its output is preset in the up-down counter 46 at the start of storage/reproduction.

(e) Effect of the invention Stored analog amount and digital amount in Figure 3
The outputs of the analog converter 15 are compared by an analog comparator 18, and the gate circuit 9 is switched based on this result. The clock pulse of the oscillation circuit 11 is input to the down input,
When this is not the case, a clock pulse is input to the up input, and the digital output of the up down counter 10 is input to the gate circuit 1.
2 to the digital-to-analog converter 15, both analog quantities are automatically controlled so that they always have the same magnitude. That is, the digital output of the up-down counter 10 is a digital conversion value of the analog quantity to be stored. Moreover, this digital conversion value becomes the input of the JK flip-flop 17,
This will be temporarily stored. This temporarily stored digital amount is constantly subtracted from the ever-changing digital conversion value by the digital subtraction circuit 19, and when this difference reaches a certain value, the AND circuit 1
6, the clock pulse from the oscillation circuit 11 becomes the clock input to the JK flip-flop 17, and the operation of temporarily storing a new digital conversion value is repeated. Also this J-
Before the K flip-flop 17 is refreshed, the output of the digital subtraction circuit 19 (terminal
DO) becomes “1” and the read/write memory 29
Give a write signal to J-K flip-flop 1
Immediately thereafter, the J-K flip-flop 17 is refreshed, but at the same time, the output of the AND circuit 16 is
The address counter 30 is incremented via the 0-OR circuit 32, and the up-down counter 41 is reset via the OR circuit 37. This up-down counter 41 is always up-counted during storage, and is reset at the same time as the J-K flip-flop 17 is refreshed, so that the up-down counter 41 always counts up at a certain constant time, that is, the refresh cycle period, that is, the analog amount to be stored. This means that the time required to reach the amount of change is detected. Also, this is stored in the read/write memory 29.
It is stored in the read/write memory 29 together with the temporarily stored digital conversion value which is the output of the K flip-flop 17. In other words, the read/write memory contains digital conversion values at a certain timing,
A digital amount representing the time until a certain amount of change in the digital conversion value is reached after a certain amount of time has elapsed is then stored. With the above storage method, the address of the read/write memory 29 is not incremented unless a certain change occurs in the digital conversion value, that is, the analog quantity to be stored. The basic principle of the invention can be embodied.

Next, the operation during memory reproduction will be explained.

First, a reset pulse is applied to the counter 30 and a read signal is applied to the read/write memory 29 from the read/write switching circuit 26 via the one shot circuit 27. In this way, first, the data at address 0, that is, the first digital conversion value, is output, and the data at address 0 is input to the digital-to-analog converter 15 via the gate circuit 12. Needless to say, this output becomes the first reproduced analog quantity. The read/write memory 29 also outputs a digital amount representing the time required to change from address 0 to address 1, and this is preset in the up/down counter 41. This is because the pulse is input to the preset terminal S of the up-down counter 41 via the OR circuit 42. During storage playback, the up-down counter 41 is counting down, so when a pulse amount corresponding to the preset digital amount is input, that is, the predetermined time from address 0 to address 1 changes. When the time elapses, the digital output of the up-down counter 41 becomes all "0", and at this time, the carry output terminal C becomes "1".
This signal is passed to the clock input terminal Cp of the counter 30 to increment the counter 30 and read the data at address 1 from the read/write memory 29. After that, the time data of the read/write memory 29 is preset into the up/down counter 41 via the on-delivery circuit 43 as before. As described above, it goes without saying that when reproducing the memory, it is possible to completely reproduce the interval of increments of the counter 30 during the memory. In addition, by changing the frequency of the clock pulse of the oscillation circuit 11 and changing the step speed of the address step counter 30, it is possible to change the overall change speed of the analog quantity during reproduction. Furthermore, the resolution of the stored analog quantity can be determined arbitrarily by adjusting how much the output terminal DO of the digital subtraction circuit 19 becomes "1" when the subtraction result of the digital subtraction circuit 19 becomes. I can decide. In addition, by separately providing a trigger adjustment circuit 22, an analog comparator 23, and a flip-flop 24, when a certain analog amount to be stored reaches a certain value, the analog comparator 23 automatically starts storing. It is conceivable that a state where almost no change in quantity occurs continues for a long time, but in this case, the digital conversion value of time, which is the output of the up-down counter 41, will be fully counted and become all "1", and the value will change immediately. With the next input pulse, all become "0" and the time data is reset, but when transitioning from all "1" to all "0", the carry output terminal C becomes "1" and all At the same time as reading the time data of "1", a step signal is output, the counter 30 is incremented, and the next time count is started, so the time data is stored correctly regardless of the length. . In the present invention, it is possible to reproduce in an analog quantity, but it goes without saying that it can also be reproduced as a digital output.

(f) Other embodiments Next, other embodiments of the present invention will be described.

As shown in FIG. 4, the digital subtraction circuit 53
When the output terminal DO becomes "1", the output of the up-down counter 71 which is time data and the output (terminal C) is stored, and the digital conversion value of the analog quantity to be stored is not stored. When reproducing the memory, the counter 30 is incremented according to the time data as before, but the up-down counter 4 is incremented according to the polarity code read at this time.
A method is used in which a clock pulse is input to the UP or DOWN input of 6 to reproduce the digital conversion value. Furthermore, since the above method does not read the digital conversion value (absolute value), a memory circuit 75 is provided as shown in FIG. 4, and the digital conversion value is temporarily stored in the memory circuit 75 at the starting point during storage. However, at the starting point during reproduction, it is necessary to preset this value in the up-down counter 46 to determine the initial magnitude of the analog quantity to be reproduced. It goes without saying that this can also be done using other methods.

In the method according to the above modification, the digital conversion value of the analog quantity to be stored only needs to be stored at one address of the start point, so the number of storage bits of the storage device can be reduced, and the circuit can be simplified. It is a characteristic.

(g) Effect In the present invention, since the method is such that the address is incremented one step at a time in response to a certain amount of change in the analog amount, the analog amount that changes when the address is incremented is Since it is constant and always stored or reproduced with a constant resolution, highly accurate analog storage is possible. Further, when the change in the analog quantity is small, fewer addresses are needed in the memory element, resulting in savings in memory capacity.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a conventional analog quantity storage device, FIG. 2 is a characteristic diagram showing various examples of changes in analog quantities, and FIG. 3 is a block diagram of an analog quantity storage device according to an embodiment of the present invention. FIG. 4 is a block diagram of another embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Analog-digital converter, 2... Interface circuit, 3... Digital-analog converter, 4... Read/write memory, 5... Counter, 6... Control circuit, 7... Oscillation circuit, 8 ……
Operation circuit, 9, 12... Gate circuit, 10, 41
...up-down counter, 11...oscillation circuit,
13, 35... Note circuit, 14, 36... Interface circuit, 15... Digital-to-analog converter, 16, 20, 21, 38, 39, 40...
...AND circuit, 17...J-K flip-flop, 18, 23...Analog comparator, 19
... Digital subtraction circuit, 22 ... Trigger adjustment circuit, 24 ... Flip-flop, 26 ... Read/write switching circuit, 27, 34 ... One shot circuit, 28, 31, 32, 33, 37, 42 ... OR circuit, 29...Read/write memory, 30...
Counter, 43... On-day delay circuit, 44, 4
5, 48... Gate circuit, 46, 71... Up-down counter, 47... Oscillator circuit, 62......
Note circuit, 49...Digital-analog converter, 50...Analog comparator, 51,5
4, 67, 68, 69...AND circuit, 52...
J-K flip-flop, 53... digital subtraction circuit, 55... read/write switching circuit, 56,
63...One shot circuit, 57, 60, 64,
66, 72, 73... OR circuit, 58... Read/write memory, 59, 65... Interface circuit, 61... Counter, 75... Memory circuit, 7
4...On-day circuit.

Claims (1)

[Scope of Claims] 1. An analog-to-digital converter that sequentially converts an analog quantity into a digital quantity, and digital quantities sequentially output from the analog-to-digital converter and digital data temporarily held from the output of the analog-to-digital converter. a deviation detection section that generates an output every time a predetermined deviation occurs and updates the temporarily held value; a step timer that outputs the step time value of the address measured from , and outputs the step step command of the address according to the size of the step time value during playback; Both the memorized analog amount and the step time value from the step timer are stored in an address that is incremented each time an input is made, and during playback, each time a step command from the step timer is input. An analog quantity storage device comprising: a data storage unit that increments an address and reads out a stored analog quantity. 2. The analog quantity storage device according to claim 1, wherein the analog quantity to be stored in the data storage section is a digital conversion value obtained by digitally converting the analog quantity. 3. When storing, the deviation is stored as a polarity code of the deviation compared in the deviation detection section, and when reproducing, the predetermined deviation is added or subtracted according to the polarity code stored as an initial value to obtain a digital converted value. 1
Analog quantity storage device as described in section.