JPS6023439B2 - waveform storage device - Google Patents

Description

[Detailed Description of the Invention] The present invention detects an abnormal state of the output voltage of a DC power supply, etc.
The present invention relates to a waveform storage device that is capable of time-compressing and reproducing either the voltage waveform before or after the detection, out of the voltage waveforms before and after the detection time.

To analyze the cause of abnormal output voltage in a DC power supply, etc., detect the output point of the abnormal output voltage, memorize the fin pressure waveform before and after this detection point, and analyze this stored voltage waveform later. It would be convenient if the cause and location of the abnormality could be estimated by doing so.

For this reason, a trigger signal is generated at the time of abnormal voltage detection, and the voltage waveforms before and after the abnormal voltage detection are stored using this trigger signal. According to this method, the signs of the cause of the abnormality can be detected. Even though the voltage waveform before the trigger signal was generated changes slowly over a long period of time, it is not possible to memorize this sufficiently due to storage capacity, making it difficult to analyze the cause of the abnormality. The reality is that there are. FIG. 1 shows a configuration diagram of a conventional waveform storage device. According to this diagram, the output voltage of a DC power supply 1 is supplied to a load 2, and is applied to an A/D comparator 3. After being sequentially analog-to-digital converted, the data is stored in the memory 4 as voltage waveform data.

The storage operation in this case is such that the clock signal from the clock generation circuit 5 is passed through the gate 10 and counted by the counter 6, and the count value is input to the memory 4 as the address of the memory 4, so that the voltage waveform data is stored in time. The data are stored in the memory 4 serially and in a loop. If the output voltage suddenly shifts to a no-voltage state in this state, this is detected by the comparator 7 which compares the voltage yd of the detection fin pressure source 8 with the output voltage Vout. When the comparator 7 detects that the output voltage Vout is abnormal (in this case, abnormally decreased), the output is delayed for a certain period of time in the delay circuit 9, and then the gate 10 is closed and the voltage waveform gate is stored in the memory of the voltage waveform gater. 4 is stopped. As a result, the voltage waveform before and after the abnormal voltage detection time toi is stored in the memory 4, and FIG. 2 shows that this is restored to the original exposure pressure waveform. In this Figure 2, an A/○ converter is connected to the readout output from memory 4, and the output is circulated in a loop from address 0 to the highest address in memory 4 and reproduced on the oscilloscope. . As can be seen from this figure, although the waveform of the output voltage Vout around the abnormal voltage detection time ttri is clearly clarified,
It can be understood that the waveform before the detection point ri is insufficient for analyzing the cause of the abnormality. This is because the waveform before the detection time ttri, which shows a sign of an abnormality, is important in analyzing the cause of the abnormality, and even though it has been changing for a long time, the detection point ratio ri is This is because only the voltage waveforms before and after a very short time range around the center are captured. Of course, there may be cases where it is sufficient to use only the voltage waveforms before and after the detection point ratio ri expressed without time compression on the same time axis, but in cases like this example, it is clear that this is not sufficient to analyze the cause of the abnormality. Dew. An object of the present invention is to enable, when an abnormality is detected in a waveform such as an output voltage, to reproduce the waveform before the detection point or after the detection point by compressing the time among the waveforms before and after the detection point. The objective is to obtain a waveform storage device with a For this purpose, the present invention is characterized in that the cycle of a clock signal for storing waveforms such as output voltages in a memory is automatically switched at the time of abnormality detection.

That is, in the present invention, a waveform showing a sign of a cause of an abnormality that lasts a relatively long time is stored in a memory with a large clock cycle, while a waveform after an abnormality occurs is stored in a memory with a clock cycle of 4, and the waveform is stored in a memory with a clock cycle of 4. If the waveform data is retrieved from the memory at the same speed during reproduction, the waveform in which the cause of the abnormality has been present for a long time will be reproduced in a compressed state. The present invention will be explained below with reference to FIGS. 3 to 5.

FIG. 3 shows a first embodiment of the invention.

The configuration shown in FIG. 3 differs from that shown in FIG. 1 in that the period of the clock signal supplied to the counter 6 via the gate 10 is different before and after the abnormality is detected. . In this case, automatic switching of the clock signal period is performed by the multiplexer 12. That is, the clock signals from the clock generation circuits 5 and 11 having different oscillation periods are inputted to the multi-breather 12 in this example, and which clock signal is output from the multi-breather 12 is determined by the comparator 7 described above. It is controlled by the output state, and since the output state of the comparator 7 changes when an abnormality is detected, the clock signal is automatically switched at the time when an abnormality is detected. The waveform storage device having the configuration shown in FIG. 3 is already described in the DC power source 1.
If this is applied to the output voltage waveform of the clock generating circuit 5, the oscillation periods of the clock generating circuits 5 and 11 will be made large and small, respectively, and the multiplexer 12 will keep the period rl of the clock generating circuit 5 until an abnormality in the waveform is detected. Gate the clock signal to 10
It is necessary to supply the counter 6 via the counter 6.

In this state, the count value of the counter 6 also changes with a period rl, and therefore the write rate of the output voltage waveform to the memory 4 is also performed with a period rl. However, if the waveform of the output voltage Vout drops abnormally, the comparator 7
The output state of
Since the clock signal from the clock generation circuit 11 of 1>r2) is outputted, the write rate of the output voltage waveform to the memory 4 is also performed at the cycle r2. That is, the writing of the output voltage waveform into the memory 4 is relatively slow until the comparator 7 detects an abnormality in the output voltage Vout, but after that detection, the writing is performed at high speed. After that, if the output voltage waveform is read out from the memory 4 at the same speed, the time axis before the abnormality detection time toi is sufficiently larger than the time axis after that time ttri, as shown in FIG. Since the waveform of the output voltage before ttri is reproduced in a compressed state, the cause of the abnormality can be easily analyzed. In the above explanation, the oscillation period rl of the clock generation circuits 5 and 11,
r2 was set as r1》r2, but conversely, if rl《r2,
It can be seen that the waveform of the output voltage Vout after the abnormality detection point is compressed.

In short, no matter how abnormal voltage or current waveforms are stored, in order to analyze abnormal changes in the waveform over a long period of time, it is necessary to memorize the waveform using a clock signal with a relatively large period. That's why. FIG. 5 shows the second embodiment of the present invention.
This figure shows an example of this.

In the embodiment shown in FIG. 4, the comparator 7 detects in an analog manner that the waveform of the output voltage Vout of the DC power supply 1 is abnormal, but in the embodiment shown in FIG. 5, this detection is also performed digitally. This is what I did. In FIG. 5, the parts excluding the DC power supply 1, load 2, and A/D converter 3 are configured with a microcomputer 17 as an integrated digital arithmetic processing device. It has the functions of clock generation circuits 5, 11, multiplexer 12, delay circuit 9, gate 10, and counter 6. The microcomputer 17 has two R/W capable memories 12,1.
3, the memory 12 corresponds to the memory 4 in FIG. 3, and the other memory 13 is for digitally setting the voltage Vd of the detection voltage source 8 in FIG. It is something. According to the configuration shown in FIG. 5, the voltage waveform data from the A/D converter 3 is stored in the memory 1.
2, and the memory 13 in the arithmetic unit 14.
If it is detected through this comparison that there is an abnormality in the waveform of the output voltage Vout, a signal is sent to the counter 16 via the accumulator 15 based on this detection result. By controlling the period of the input clock signal, the third
The same results as in the case shown in the figure are obtained.

In this case, counting control of the counter 6 is easy on a microcomputer, and the counter function can be controlled by creating a loop in the microcomputer program and providing several branch points in the loop to control the clock signal of any period. Let it occur. In addition, to determine the branch destination, either provide data in advance, or memorize the center value of the output voltage before the abnormality detection point in the output voltage waveform and the point at which signs of abnormality appear. Determination processing is possible by calculating the data and the voltage and time data at the time of abnormality detection and determining the clock signal period after the time of abnormality detection. As a result, the period of the clock signal before and after the abnormality detection time is automatically determined, making it possible to obtain a reproduced waveform as shown in Figure 4, which is convenient for analyzing the cause of the abnormality. It is something. Furthermore, the configuration of the microcomputer is not limited to the one shown in FIG. 5, and any general microcomputer can be used, and after the output from the A/D converter is processed, a memo is stored. is also possible. As described in detail above, the present invention is such that the speed at which waveform data is written into the memory by the clock signal is changed before and after the abnormal waveform is detected.

Therefore, according to the present invention, a relatively long period of time (several ms to
A waveform showing an abnormality sign before abnormal waveform detection for several seconds);
Since it becomes possible to simultaneously reproduce and observe the abnormal waveform over a short period of time (several hundred ms to several ms) after the abnormal waveform is detected, it becomes extremely easy to analyze the cause of the abnormality. In particular, the present invention mainly focuses on microphones. If it is constructed using a computer, it is even more advantageous because it can be expected to have flexibility in control, high functionality, and miniaturization of the device.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a conventional waveform storage device, and FIG. 2 is a reproduction diagram of a certain voltage waveform stored by the device in FIG.
FIG. 3 is a block diagram showing an embodiment of a waveform storage device according to the present invention, FIG. 4 is a reproduction diagram of a certain voltage waveform stored by the device of FIG. 3, and FIG. FIG. 2 is a configuration diagram showing an example. 3...A/D converter, 4...Memory, 5, 11...
. . . Clock generation circuit, 6 . . . Counter, 7.
．．・．． ．．・Comparator, 8...Detection voltage source,
9.... ．． ．． Delay circuit, 10...gate, 12.
…”Multiplexer, 17””“Microcomputer. Figure 1 Figure 2 Figure 3 Figure 4 Figure 5

Claims (1)

[Claims] 1. Controlling the cycle of a clock signal to a counter that provides address input to a memory based on means for detecting an abnormality in a voltage/current waveform, and converting the voltage/current waveform into an A/D converter.
It is stored in the memory in time series and in a loop via a converter, and the means switches the cycle of the clock signal to the counter at the time when an abnormality in the voltage and current waveform is detected, and then after a certain period of time has elapsed. A waveform storage device characterized by a configuration for stopping the counting operation of the counter. 2. The waveform according to claim 1, wherein the means for detecting an abnormality in the voltage and current waveform is a comparator that inputs the voltage and current waveform to one input, inputs the analog detection voltage to the other input, and outputs the output in a digital state. Storage device.